+

WO2003104974A3 - Using short references to access program elements in a large address space - Google Patents

Using short references to access program elements in a large address space Download PDF

Info

Publication number
WO2003104974A3
WO2003104974A3 PCT/US2003/011419 US0311419W WO03104974A3 WO 2003104974 A3 WO2003104974 A3 WO 2003104974A3 US 0311419 W US0311419 W US 0311419W WO 03104974 A3 WO03104974 A3 WO 03104974A3
Authority
WO
WIPO (PCT)
Prior art keywords
address
address space
access
desired element
access program
Prior art date
Application number
PCT/US2003/011419
Other languages
French (fr)
Other versions
WO2003104974A2 (en
Inventor
Oscar Montemayor
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/165,160 external-priority patent/US6865659B2/en
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Priority to AU2003226369A priority Critical patent/AU2003226369A1/en
Priority to EP03757249A priority patent/EP1563374A2/en
Publication of WO2003104974A2 publication Critical patent/WO2003104974A2/en
Publication of WO2003104974A3 publication Critical patent/WO2003104974A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44521—Dynamic linking or loading; Link editing at or after load time, e.g. Java class loading

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

One embodiment of the present invention provides a system that accesses a desired element during execution of a program. During operation, the system receives a reference to the desired element. The system determines if the reference is an internal reference to a location in a local package that is currently executing, or an external reference to a location in an external package. If the reference is an external reference, the system uses an index component of the reference to lookup an address for the desired element in a global reference table. Next, the system uses the address to access the desired element. Note that the address retrieved from the global reference table is larger than the reference, which allows the address to access a larger address space than is possible to access with the reference alone.
PCT/US2003/011419 2002-06-07 2003-04-11 Using short references to access program elements in a large address space WO2003104974A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
AU2003226369A AU2003226369A1 (en) 2002-06-07 2003-04-11 Using short references to access program elements in a large address space
EP03757249A EP1563374A2 (en) 2002-06-07 2003-04-11 Using short references to access program elements in a large address space

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US38685602P 2002-06-07 2002-06-07
US10/165,160 2002-06-07
US10/165,160 US6865659B2 (en) 2002-06-07 2002-06-07 Using short references to access program elements in a large address space
US60/386,856 2002-06-07

Publications (2)

Publication Number Publication Date
WO2003104974A2 WO2003104974A2 (en) 2003-12-18
WO2003104974A3 true WO2003104974A3 (en) 2005-06-02

Family

ID=29738941

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/011419 WO2003104974A2 (en) 2002-06-07 2003-04-11 Using short references to access program elements in a large address space

Country Status (3)

Country Link
EP (1) EP1563374A2 (en)
AU (1) AU2003226369A1 (en)
WO (1) WO2003104974A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10357257A1 (en) * 2003-12-08 2005-06-30 Giesecke & Devrient Gmbh Java smart card chip with memory area reserved for global variables
CN100442302C (en) * 2004-12-21 2008-12-10 国际商业机器公司 Method and system for metering usage of software products with fast run-time identification

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR119649A (en) * 1975-03-24

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
DAVID A. PATTERSON & JOHN L. HENNESSY: "Computer Architecture -- A Quantitative Approach", 1996, MORGAN KAUFMANN PUBLISHERS, SAN FRANCISCO, ISBN: 1-55860-329-8, XP002323845 *
JOHN R. LEVINE: "Linkers & Loaders", 2000, MORGAN KAUFMANN PUBLISHERS, SAN FRANCISCO, ISBN: 1-55860-496-0, XP002323846 *
MAURICE J. BACH: "The Design of the UNIX Operating System", 1990, PRENTICE HALL, USA, ISBN: 0-13-201799-7, XP002323844 *
PARHAMI B ED - SODERSTRAND M A ET AL: "Modular reduction by multi-level table lookup", CIRCUITS AND SYSTEMS, 1997. PROCEEDINGS OF THE 40TH MIDWEST SYMPOSIUM ON SACRAMENTO, CA, USA 3-6 AUG. 1997, NEW YORK, NY, USA,IEEE, US, vol. 1, 3 August 1997 (1997-08-03), pages 381 - 384, XP010272518, ISBN: 0-7803-3694-1 *
See also references of EP1563374A2 *

Also Published As

Publication number Publication date
EP1563374A2 (en) 2005-08-17
WO2003104974A2 (en) 2003-12-18
AU2003226369A8 (en) 2003-12-22
AU2003226369A1 (en) 2003-12-22

Similar Documents

Publication Publication Date Title
TWI264642B (en) Methods and apparatus for providing a software implemented cache memory
US9465750B2 (en) Memory protection circuit, method and processing unit utilizing memory access information register to selectively allow access to memory areas by virtual machines
WO2005003962A3 (en) Method for switching between at least two operating modes of a processor unit and corresponding processor unit
TW200745886A (en) Context based navigation
WO2008055271A3 (en) Seamless application access to hybrid main memory
MY143945A (en) Interrupt controller utilising programmable priority values
WO2006102635A3 (en) Branch target address cache storing two or more branch target addresses per index
US8959317B2 (en) Processor and method for saving designated registers in interrupt processing based on an interrupt factor
TW200702993A (en) Cache memory system and control method thereof
WO2012018525A3 (en) Supporting a secure readable memory region for pre-boot and secure mode operations
WO2007050349A3 (en) Lookup table addressing system and method
WO2008005825A3 (en) Methods, systems, and computer program products for providing access to addressable entities using a non-sequential virtual address space
TW200609730A (en) Information processing apparatus and information processing method
TW200746841A (en) Direct macroblock mode techniques for high performance hardware motion compensation
TWI266324B (en) Page buffer having dual register, semiconductor memory device having the same, and program method thereof
WO2002099648A8 (en) Streaming memory controller
AU2002332759A1 (en) An apparatus and method for extracting and loading data to/from a buffer
IL185303A0 (en) Method and apparatus for managing a return stack
WO2005008509A3 (en) Method of managing software components that are integrated into an embedded system
TW200703097A (en) Processor and method of indirect register read and write operations
RU2011108110A (en) TYPE DESCRIPTOR MANAGEMENT FOR FROZEN OBJECTS
WO2003104974A3 (en) Using short references to access program elements in a large address space
TW200731093A (en) DSP system with multi-tier accelerator architecture and method for operating the same
WO2005048113A3 (en) Dynamically caching engine instructions for on demand program execution
GB201018013D0 (en) Provision of access control data within a data processing system

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NI NO NZ OM PH PL PT RO RU SC SD SE SG SK SL TJ TM TN TR TT TZ UA UG UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
WWE Wipo information: entry into national phase

Ref document number: 2003757249

Country of ref document: EP

WWP Wipo information: published in national office

Ref document number: 2003757249

Country of ref document: EP

NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP

点击 这是indexloc提供的php浏览器服务，不要输入任何密码和下载