WO2003100849A1 - Semiconductor processor - Google Patents
Semiconductor processor Download PDFInfo
- Publication number
- WO2003100849A1 WO2003100849A1 PCT/JP2003/006541 JP0306541W WO03100849A1 WO 2003100849 A1 WO2003100849 A1 WO 2003100849A1 JP 0306541 W JP0306541 W JP 0306541W WO 03100849 A1 WO03100849 A1 WO 03100849A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- substrate
- processed
- mounting table
- charge
- back surface
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 47
- 238000012545 processing Methods 0.000 claims description 103
- 239000000758 substrate Substances 0.000 claims description 99
- 238000000034 method Methods 0.000 claims description 29
- 230000003028 elevating effect Effects 0.000 claims description 15
- 238000003795 desorption Methods 0.000 claims description 12
- 230000008569 process Effects 0.000 claims description 8
- 239000004020 conductor Substances 0.000 claims description 6
- 238000012544 monitoring process Methods 0.000 claims description 4
- 238000001514 detection method Methods 0.000 claims 4
- 238000000926 separation method Methods 0.000 abstract 2
- 239000007789 gas Substances 0.000 description 22
- 230000003068 static effect Effects 0.000 description 20
- 230000007246 mechanism Effects 0.000 description 15
- 230000008030 elimination Effects 0.000 description 14
- 238000003379 elimination reaction Methods 0.000 description 14
- 238000012546 transfer Methods 0.000 description 10
- 238000005530 etching Methods 0.000 description 7
- 230000005856 abnormality Effects 0.000 description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 5
- 238000013459 approach Methods 0.000 description 4
- 230000005611 electricity Effects 0.000 description 4
- 230000001965 increasing effect Effects 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 239000003989 dielectric material Substances 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 238000001179 sorption measurement Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- -1 for example Substances 0.000 description 2
- 239000011261 inert gas Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000006386 neutralization reaction Methods 0.000 description 2
- 230000010287 polarization Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- CAVCGVPGBKGDTG-UHFFFAOYSA-N alumanylidynemethyl(alumanylidynemethylalumanylidenemethylidene)alumane Chemical compound [Al]#C[Al]=C=[Al]C#[Al] CAVCGVPGBKGDTG-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 230000001174 ascending effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000009191 jumping Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000010926 purge Methods 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
- 230000001846 repelling effect Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
- H01L21/6833—Details of electrostatic chucks
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02N—ELECTRIC MACHINES NOT OTHERWISE PROVIDED FOR
- H02N13/00—Clutches or holding devices using electrostatic attraction, e.g. using Johnson-Rahbek effect
Definitions
- the present invention relates to a semiconductor processing apparatus and a method of detaching a substrate to be processed from an electrostatic chuck in the semiconductor processing apparatus.
- semiconductor processing refers to forming a semiconductor layer, an insulating layer, a conductive layer, and the like in a predetermined pattern on a substrate to be processed such as a semiconductor wafer or an LCD substrate. It means various processes performed to manufacture a structure including a semiconductor device II, wiring connected to the semiconductor device, electrodes, and the like on a processing substrate.
- FIG. 2 is a longitudinal sectional view showing the mounting table structure of FIG. 1, showing a state where a semiconductor wafer W is mounted on the mounting table 1.
- the mounting table 1 includes a base 11, an electrostatic chuck 12 disposed on the upper surface thereof, and a ring body 13 surrounding the electrostatic chuck 12.
- the electrostatic chuck 12 is made of an insulating layer 15 made of a dielectric material, for example, a polyimide, for example, on both sides of a sheet-like chuck electrode 14 having conductivity. It has a sandwiched configuration.
- a DC voltage chuck voltage
- a gap between the electrostatic chuck 12 and the wafer W is generated.
- a Coulomb force is generated, whereby the wafer W can be suction-held on the mounting table 1.
- support pins 17 (three in the circumferential direction) for detaching the wafer W from the electrostatic chuck 12 are provided so as to be able to protrude and retract. .
- the connection of the switch SWA is switched to the ground side when the wafer W is detached.
- the application of the positive voltage to the chuck electrode 14 is stopped, and the electric charge existing on the surface of the electrostatic chuck 12 is removed to attract the wafer W to the wafer W on the surface. Weaken power.
- the support pins 17 are raised to detach the wafer W from the surface of the electrostatic chuck 12.
- the switch SWB is closed, a part of the residual charges on the wafer W side is released to the ground via the conductive support pins 17.
- An object of the present invention is to prevent the occurrence of a detachment abnormality and to reduce the time required for detachment in a semiconductor processing apparatus when detaching a substrate from an electrostatic chuck. And.
- a first aspect of the present invention is a semiconductor processing apparatus for performing semiconductor processing on a substrate to be processed having a conductor or a back surface of a semiconductor,
- a processing chamber for storing the substrate to be processed
- the electrostatic chuck When the electrostatic chuck is electrostatically attracted by the electrostatic chuck, a charge of the first polarity is generated on the back surface;
- a detaching member for selectively detaching the substrate to be processed from the mounting table
- a charge supply unit that selectively supplies a charge of a second polarity opposite to the first polarity to the back surface of the substrate to be processed
- a control unit configured to control the operation of the detachment member and the charge supply unit; and the control unit supplies the charge supply immediately before the detachment of the substrate to be processed from the mounting table by the detachment member. Supplying the charge of the second polarity to the back surface of the substrate to be processed by a unit;
- a second aspect of the present invention is a semiconductor processing apparatus for performing semiconductor processing on a substrate to be processed having a conductor or a semiconductor back surface.
- the back surface of the substrate is electrostatically attracted by the electrostatic chuck, a charge of a first polarity is generated on the back surface.
- a third aspect of the present invention is a semiconductor processing apparatus for performing semiconductor processing on a substrate to be processed
- a processing chamber for storing the substrate to be processed
- a detaching member for selectively detaching the substrate to be processed from the mounting table
- a vibration supply unit that selectively supplies vibration to the elevating member; a control unit that controls operations of the detachment member and the vibration supply unit; Immediately before the substrate is detached from the substrate, the vibration supply unit may be in contact with the detaching member and the back surface of the substrate to be treated. Supplying the vibration to the substrate to be processed via the detachment member;
- the semiconductor substrate is separated from an electrostatic chuck that electrostatically attracts a back surface of the substrate to be processed on a mounting table.
- FIG. 1 is a longitudinal sectional view showing a semiconductor processing apparatus according to a first embodiment of the present invention.
- FIG. 2 is a flowchart showing a method of detaching the wafer from the electrostatic chuck in the apparatus shown in FIG.
- 3A and 3B are enlarged sectional views showing an electrical relationship between a wafer and an electrostatic chuck in the apparatus shown in FIG.
- FIG. 4 is a longitudinal sectional view showing a semiconductor processing apparatus according to a second embodiment of the present invention.
- FIG. 4 is a schematic plan view showing the positional relationship between and a support pin.
- FIG. 6 is a flowchart showing a method of detaching the wafer from the electrostatic chuck in the apparatus shown in FIG.
- 7A, 7B, and 7C are cross-sectional views illustrating a method of desorbing a wafer W in a process order.
- FIG. 8 is an enlarged cross-sectional view showing an electrical relationship between a wafer and an electrostatic chuck in the apparatus shown in FIG.
- FIG. 9 is a longitudinal sectional view showing a conventional mounting table structure used in a vacuum processing apparatus.
- FIG. 1 is a longitudinal sectional view showing an etching apparatus (vacuum processing apparatus) as a semiconductor processing apparatus according to a first embodiment of the present invention.
- this processing apparatus has a processing chamber 2 formed from a vacuum vessel.
- the vacuum chamber or processing chamber 2 is formed of, for example, aluminum so as to form an airtight structure and is grounded.
- a shower head 3 serving as a grounded upper electrode is provided on the ceiling.
- a mounting table 4 also serving as a lower electrode is disposed on the floor in the processing chamber 2 so as to face the shower head 3.
- a vacuum exhaust unit 21 composed of, for example, a turbo molecular pump or a dry pump is formed through an exhaust pipe 22 as a vacuum exhaust path.
- An opening 23 for carrying a substrate to be processed, for example, a wafer W, is formed in a side wall of the processing chamber 2 , and can be opened and closed by a gate valve G.
- ring-shaped permanent magnets 24 and 25 are disposed outside the side wall at positions sandwiching the opening 23 vertically.
- a gas supply unit 33 for supplying a processing gas such as a reactive gas or an inert gas is connected to an upper portion of the shower head 3 via a gas supply pipe 32.
- a processing gas such as a reactive gas or an inert gas
- a gas supply pipe 32 In the shower head 3, a large number of holes 31 are formed on the mounting table 4 at positions facing the wafer W.
- the processing gas supplied from the gas supply pipe 32 diffuses in the processing gas flow path formed in the shower head 3 and is uniformly supplied to the surface of the wafer W via the hole 31.
- the mounting table 4 includes, for example, a cylindrical base 41 made of aluminum.
- the base 41 is disposed on the floor of the processing chamber 2 in a state of being insulated by the insulating member 41a.
- a high frequency power supply 40 for applying a high frequency for bias is connected to the base 41 via a capacitor C 1 and a coil L 1.
- a baffle plate 44 for forming a uniform exhaust flow in the circumferential direction of the wafer W at the time of evacuation is disposed on the side wall of the mounting table 4.
- the baffle plate 44 is a ring-shaped plate member extending from the mounting table 4 to the vicinity of the inner wall surface of the processing chamber 2.
- Wafer W is held almost horizontally on the upper surface of base 41
- An electrostatic chuck 42 is provided to perform the operation.
- a conductive ring 43 which is a ring-shaped conductive member, is provided so as to surround the periphery of the electrostatic chuck 42.
- the conductive ring 43 plays a role of diffusing the dense plasma on the periphery of the wafer W and in the vicinity thereof, and improving the uniformity of the plasma.
- An insulating ring 43a which is a ring-shaped insulating member, is provided between the conductive ring 43 and the base 41.
- the electrostatic chuck 42 is made of a conductive sheet-like chuck electrode 46 which is made of a dielectric material such as polyimide, aluminum, aluminum nitride, or the like. It has a configuration sandwiched between insulating layers 45.
- the chuck electrode 46 is selectively connected to a DC power supply 47 and a ground via a switch SW1.
- the distance between the surface of the insulating layer 45 and the chuck electrode 46 is, for example, about 0.25 mm.
- a DC voltage chuck voltage
- a Coulomb force is generated between the electrostatic chuck 42 and the wafer W, which causes Thus, the wafer W can be suction-held on the mounting table 4.
- the switch SW1 is switched to release the electric charge near the electrostatic chuck 42 to the ground.
- the control unit 8 via the residual charge monitor 7 can grasp the progress of the electrostatic chuck 42 in the following manner when static elimination is performed. That is, for example, the charge amount Q 1 flowing when the switch SW 1 is connected to the DC power supply 47 is stored. Next, connect switch SW1. Measure the amount of charge Q 2 flowing when switching to the ground side. Then, the charge amount Q 2 is subtracted from the charge amount Q 1 (Q 1 ⁇ Q 2), and the charge remaining in the electrostatic chuck 42 is obtained.
- a plurality of support pins 51 which are detachable members, for example, elevating members, are provided. It is arranged to be freely retractable.
- the support pin 51 is moved up and down by a drive mechanism 53 via a connecting member 52.
- a bellows 54 is provided to maintain the airtightness between the through hole in which the support pins 51 are provided and the atmosphere side.
- a material selected from a conductor such as aluminum or stainless steel is used for example.
- a charge supply unit 6 for supplying a positive charge to the wafer W via the support pin 51 is connected to the connecting member 52.
- the polarity of the charge supplied by the charge supply unit 6 is set so as to be opposite to the charge generated on the back surface of the wafer W when the back surface of the wafer W is electrostatically attracted by the electrostatic chuck 42. Is done. That is, when a negative charge is generated on the back surface of the wafer W during electrostatic chucking, the charge supply unit 6 is set to supply a positive charge, and the positive charge is set on the back surface of the wafer W during electrostatic chucking. Is generated, the charge supply unit 6 is set to supply a negative charge.
- the charge supply section 6 includes a resistor 61 and a DC power supply 62, and the support pin 51 is selected between the DC power supply 62 and the ground section by switching the switch SW2. Connected.
- the operation of the drive mechanism 53 and the switching of the switches SW 1 and SW 2 are controlled by the control unit 8.
- the gate valve G is opened, and the load chamber (not shown) set to the adjacent vacuum atmosphere and the processing chamber 2 are communicated through the opening 23.
- a substrate to be processed in this example, a semiconductor wafer (silicon wafer) W, is loaded into the processing chamber 2 from the load lock chamber by a transfer arm (not shown).
- the wafer W is mounted on the mounting table 4, that is, on the electrostatic chuck 42, by the cooperative operation of the transfer arm and the support pins 51.
- the switch SW 1 is switched to the DC power supply 47 side to turn on the electrostatic chuck 42, and the wafer W is attracted to the surface of the mounting table 4.
- the gate valve G is closed, and the inside of the processing chamber 2 is evacuated via the exhaust pipe 22.
- a processing gas is supplied to the wafer W from the showerhead 3 while the vacuum is being drawn, and the pressure in the processing chamber 2 is, for example, 3 OmTorr to 100 mTorr (about: Adjust so that it is maintained at ⁇ 13.3 Pa).
- a high-frequency voltage is applied between the mounting table 4 serving as the lower electrode and the shower head 3 serving as the upper electrode by the high-frequency power source 40 to convert the processing gas into plasma, and the magnet 24 , 25 to increase the density of the plasma.
- the plasma generated in this manner is used to etch, for example, a silicon oxide film on the surface of the wafer W.
- the high-frequency power supply 40 is stopped. Then, the process proceeds to a step of detaching the wafer W from the electrostatic chuck 42.
- FIG. 2 shows a static state of the apparatus shown in FIG. This is a flowchart showing a method for detaching the wafer W from the electric chuck 42.
- the switch SW1 is switched to the ground side to remove static electricity from the electrostatic chuck 42.
- the drive mechanism 53 starts to raise the support pin 51 (step S1).
- the lifting operation of the support pin 51 is stopped at a predetermined lifting amount (step S2).
- the timing for stopping the raising operation of the support pin 51 is not limited to this.
- the support pin 51 can be raised to a predetermined contact pressure by using a pressure sensor.
- the support pin 51 may be raised for a preset time using a timer.
- the switch SW2 is switched to the DC power supply 62 side to start supplying the reverse charge to the wafer W (step S3). That is, since a negative charge is generated on the back surface of the wafer W by supplying a positive charge to the chuck electrode 46, the support pin 51 is used in this embodiment. A positive charge is supplied to the wafer W via the. As a result, the negative charges remaining on the rear surface side of the wafer W are neutralized by the injected positive charges.
- the control unit 8 monitors the residual charge by the residual charge monitor 7 and compares the residual charge with a predetermined set value (step S4).
- the set value of the residual charge can be a level when the negative charge on the back surface of the wafer W is completely neutralized.
- the set value can be set to a level at which the charge is removed to the extent that a suction force that does not cause a detachment abnormality even when the wafer W is pushed up by the support pins 51 remains.
- this set value may be set to a level at which a slight positive charge accumulates on the back surface of the wafer W to generate a small repulsive force with the electrostatic chuck 42 as described later. it can.
- FIGS. 3A and 3B are enlarged cross-sectional views showing an electrical relationship between the wafer W and the electrostatic chuck 42 in the apparatus shown in FIG. The mechanism of static elimination when the wafer W is detached in the apparatus shown in FIG. 1 will be described with reference to FIGS. 3A and 3B.
- the surface of the insulating layer 45 (the surface of the electrostatic chuck 42) becomes positively charged.
- polarization occurs in the case of an insulator, and in the case where a slight low-resistance element is contained in the insulating layer 45, the chuck electrode 46 is formed. It is considered that the positive charge moves to the surface and becomes positive.
- the wafer W is electrostatically attracted to the electrostatic chuck 42 by the action of 13 anchors (attraction).
- the electrostatic chucking force can be weakened and the wafer W can be detached. That is, since the wafer W is a semiconductor, the electric charge can move freely within the wafer W. For this reason, in the wafer W, negative charges are concentrated at the approach site P 1 during electrostatic attraction, and injected charges flow into a portion where the negative charges are concentrated when reverse charges are injected. Since the amount of neutralization (the amount of negative charge to cancel out) and the amount of injection correspond to each other, it is easy to control the injection of reverse charges, and the 03 06541
- the method for supplying the reverse charge to the wafer W is not limited to the method described above.
- reverse charges can be supplied in accordance with the amount of change in the residual charge detected by the residual charge monitor 7 per unit time. That is, for example, when the amount of change is large, the voltage is lowered to supply a reverse charge.
- the control feedback control
- the control may be performed by increasing the supply amount of the reverse charge. In this case, even if the amount of residual charge varies in each process, a minute charge corresponding to the residual charge can be supplied. Therefore, the electrostatic attraction force can be weakened in a short time, and the same effect as in the above case can be obtained.
- the reverse charge may be supplied in a pulse form using a pulse generator.
- the supply of the reverse charge may completely cancel the negative charges collected at the approaching part P 1 of the wafer w completely, and then the supply of the reverse charge may be continued.
- a Coulomb force repelling between the positive charge of the electrostatic chuck 42 and the positive force of the electrostatic chuck 42 acts, and the pushing force of the support pin 51 is reduced.
- the wafer W can be detached without any need. If the supply amount of the reverse charge is too large, the repulsive force acts so strongly that the wafer W may deviate from the predetermined mounting position. For this reason, it is preferable to determine the timing (set value of the residual charge) to stop the supply of the reverse charge by performing a preliminary test (switch the switch SW 2 to the ground part). .
- a member other than the support pins 51 of the elevating member can be used.
- a low-resistance charge supply member for charge supply may be separately provided. Even with such a configuration, the same effect as described above can be obtained.
- the substrate to be processed is not limited to the semiconductor wafer W, and the present embodiment can be applied to other substrates to be processed as long as they have a conductor or a back surface of a semiconductor.
- FIG. 4 is a longitudinal sectional view showing an etching apparatus (vacuum processing apparatus) as a semiconductor processing apparatus according to a second embodiment of the present invention.
- this processing apparatus has a processing chamber 102 formed from a vacuum vessel.
- the vacuum chamber or processing chamber 102 is formed of, for example, aluminum so as to form an airtight structure and is grounded.
- the ceiling in the processing chamber 1 0 within 2, head 1 2 1 is arranged to shower that also serves as a top of the electrode which is grounded.
- the floor in the processing chamber I 0 within 2 is disposed in head 1 2 1 and the counter to ⁇ table 1 0 3 starve catcher Wa one also serving as a lower electrode.
- an exhaust port connected to a vacuum evacuation unit 119 such as a turbo molecular pump or a dry pump via an exhaust pipe 120 as a vacuum evacuation path is provided on the bottom of the processing chamber 102. It is formed. Openings 122, 123 for loading and unloading a substrate to be processed, for example, a wafer W, are formed in the side wall of the processing chamber 102, which can be opened and closed by a gate valve G. . Outside the side walls, for example, ring-shaped permanent magnets 124 and 125 are arranged at positions vertically sandwiching the openings 122 and 123 respectively.
- a gas supply unit 129 for supplying a processing gas such as a reaction gas or an inert gas is connected to an upper portion of the shower head 127 via a gas supply pipe 127. Further, a large number of holes 126 are formed in the shower head 122 at positions facing the wafer W on the mounting table 103. The processing gas supplied from the gas supply pipe 127 is diffused in the processing gas flow path 128 formed in the shower head 121, and the processing gas is supplied to the wafer W through the hole 126. It is uniformly supplied to the surface.
- the mounting table 103 includes, for example, a cylindrical base 1311 made of aluminum carbide.
- the base 13 1 is disposed on the floor of the processing chamber 10 2 in a state of being insulated by the insulating member 13 1 a.
- a high frequency power supply 133 for applying a high frequency for bias is connected to the base 13 1 via a capacitor CI 1 and a coil LI 1.
- a baffle plate 134 for forming a uniform exhaust flow in the circumferential direction of the wafer W at the time of exhaust is disposed on the side wall of the mounting table 103.
- the baffle plate 134 is a ring-shaped plate member extending from the mounting table 1-03 to the vicinity of the inner wall surface of the processing chamber 102.
- An electrostatic chuck 104 for adsorbing and holding the wafer W substantially horizontally is provided on the upper surface of the base 13 1.
- a focus ring 132 is provided so as to surround the periphery of the electrostatic chuck 104.
- the electrostatic chuck 104 is made of a dielectric material, for example, polyimide, alumina, or aluminum nitride, on both sides of the conductive sheet-like chuck electrode 141. It has a structure sandwiched between insulating layers 142.
- Chuck electrode 144 is selected between DC power supply 144 and ground via switch SW 11 Connected.
- a residual charge monitor 144 serving as a residual charge monitoring means is provided in the circuit connecting the chuck electrode 144 and the DC power supply 144.
- the control unit 107 via the residual charge monitor 144 can grasp the progress of the electrostatic chuck 104 in the following manner when the static electricity is removed from the electrostatic chuck 104. That is, for example, the charge amount Q 1 flowing when the switch SW 11 is connected to the DC power supply 144 is stored. Next, the amount of charge Q 2 flowing when the switch SW 11 is switched to the ground side is measured. Then, the charge amount Q 2 is subtracted from the charge amount Q 1 (Q 1 ⁇ Q 2), and the charge remaining in the electrostatic chuck 104 is obtained.
- An elevating member 105 is provided inside the mounting table 103 in order to transfer the wafer W to and from an external transfer arm (not shown).
- the elevating member 105 constitutes a detaching means for detaching the wafer W from the surface 144 of the electrostatic chuck 104 after the processing is completed.
- the elevating member 105 includes a plurality of, for example, four support pins 153, and these are disposed in a hole 155 formed in the mounting table 103.
- the support pin 1553 extends in the vertical direction, and is attached to the common shaft 151 via the connecting member 152 in the mounting table 103.
- Shaft 15 1 is, for example, It is moved up and down by a drive mechanism 154 including an air cylinder and a ball screw mechanism, so that the support pin 153 protrudes and sinks against the surface 144 of the mounting table 103.
- FIG. 5 is a schematic plan view showing the positional relationship between the wafer W, the electrostatic chuck 104 and the support pins 153 in the apparatus shown in FIG.
- the support pins 153 are, for example, equidistant from the center 156 of the electrostatic chuck 104 (also the center of the wafer W) and along the circumferential direction. It is located at such a location.
- each support pin 153 has the same height at the tip, when ascending, the wafer W placed on the surface 144 can be lifted in a horizontal posture.
- the elevating member 105 also functions as a static eliminator after the electrostatic chuck 104 releases the suction.
- the support pins 15 3 are vibrated by the piezoelectric element 16 1 provided at the upper end of the shaft 15 1, and are brought into contact with the wafer W in such a state.
- the piezoelectric element 16 1 is connected to an AC power supply 16 2 via a capacitor C 12 and a coil L 12.
- the base 13 1 and the piezoelectric element 16 1 are grounded via a common resistor R 11 and a switch SW 12.
- the operation of the driving mechanism 154 and the piezoelectric element 161 and the switching of the switches SW11 and SW12 are controlled by the control unit 107.
- a substrate to be processed in this example, a semiconductor wafer (silicon wafer) W
- a transfer arm not shown
- the transfer arm and the support pin 15 3 (elevating member 105) cooperate with each other to put the surface on the mounting table 103, that is, the surface 14 of the electrostatic chuck 104. 3 Place wafer W on top.
- the switch SW 11 is switched to the DC power supply 144 side to turn on the electrostatic chuck 104, and the wafer W is attracted to the surface of the mounting table 103.
- the gate valve G is closed, and the inside of the processing chamber 102 is evacuated via the exhaust pipe 120.
- a processing gas such as C 4 F 8 gas, for example, C 4 F 8 gas is supplied to the wafer W while evacuating, and the pressure in the processing chamber 102 is set to, for example, Adjust so that it is maintained at 1 to 50 Pa.
- a high-frequency voltage is applied between the mounting table 103 serving as the lower electrode and the shower head 122 serving as the upper electrode by the high-frequency power supply 133 to convert the processing gas into plasma.
- the density of the plasma is increased by the magnets 124 and 125.
- a silicon oxide film on the surface of the Ueno and W surfaces is etched.
- the high frequency power supply 133 is stopped. Then, the process proceeds to a step of detaching the wafer W from the electrostatic chuck 104.
- FIG. 6 shows a method of detaching the wafer W from the electrostatic chuck 104 under the control of the control unit 107 in the apparatus shown in FIG. It is a flowchart. 7A, 7B, and 7C are cross-sectional views illustrating a method of detaching the wafer W in the order of steps.
- switch SW11 is switched to the ground side, and switch SW12 is closed to remove static electricity from electrostatic chuck 104. Further, the power supply to the piezoelectric element 161 is started, the piezoelectric element 161 is oscillated at a preset vibration frequency, and the lifting member 105 is oscillated (step S11). At this time, as shown in FIG. 7A, the height of the elevating member 105 is set such that the tip of the support pin 153 is buried inside the mounting table 103.
- the value of the vibration frequency of the piezoelectric element 161 varies depending on the size and type of the wafer, the type of the film formed on the wafer surface, or the contact pressure between the wafer W and the support pins 153 described later. . However, the value of the vibration frequency is set within a range where the wafer W does not move from the suction surface and only static elimination proceeds.
- the lifting member 105 is raised by the drive mechanism 154 (step S12).
- the control unit 107 determines whether or not the wafer W has come into contact with the support pins 153 (step S13), and until the contact is obtained, the elevating member 10 5 is continuously increased (step S14).
- the control unit 107 can continuously raise the elevating member 105 by a predetermined amount so that the wafer W and the support pin 1553 come into contact with each other. You.
- step S 15 When the wafer W comes into contact with the support pin 153 at a predetermined contact pressure (or when the lift of the lifting member 105 reaches a predetermined amount), the lifting of the lifting member 105 stops. While the piezoelectric element The vibration according to 16 1 is continued (step S 15). Therefore, as shown in FIG. 7B, the surface of the wafer W vibrates through the support pins 15 3, and as a result, the residual charges near the surface 14 3 are gradually discharged by the mechanism described later. Is done.
- the control unit 107 monitors the residual charge by the residual charge monitor 144 before the wafer W comes into contact with the support pins 153, and determines the residual charge and a predetermined set value. (Step S16).
- the power supply from the AC power supply 162 to the piezoelectric element 161 continues until the residual charge becomes equal to or less than the set value, and discharge is promoted (Step S17) 0
- the supporting pins 15 3 are raised again by the driving mechanism 15 4 and detached from the mounting table 10 3 so as to push up the wafer W.
- the set value of the residual charge can be a level when the negative charge on the back surface of the wafer W is completely neutralized.
- this set value can be set to a level at which the charge is removed to the extent that the suction force that does not cause the detachment abnormality even when the wafer W is pushed up by the support pin 153 is left.
- the driving mechanism 154 is stopped when the support pin 153 is raised to a predetermined height. Also, the power supply to the piezoelectric element 161 is stopped, and the vibration of the support pin 153 is stopped (step S19: Fig. 7C). Thereafter, the wafer W is unloaded from the processing chamber 102 in the reverse order of the loading.
- FIG. 8 is an enlarged cross-sectional view showing an electrical relationship between the wafer W and the electrostatic chuck 104 in the apparatus shown in FIG. Figure 4 The mechanism of static elimination when the wafer W is detached in the illustrated apparatus will be described with reference to FIG.
- the binding force of the electric charge for example, the negative charge on the wafer side and the positive charge on the electrostatic chuck side
- a Coulomb force (attraction) in which the positive charge of the electrostatic chuck 104 and the negative charge of the wafer W attract each other, acts, and the wafer W becomes electrostatic chuck 104. Is electrostatically attracted.
- the wafer W is vibrated to slightly increase the distance between the approaching parts Pl and P2 (for example, to such a degree that the wafer W does not detach and bounce), thereby reducing the capacitance in the area.
- the negative charges at the approaching part P 1 are released from the constraint of the Coulomb force, and can freely move around in the silicon wafer W as a semiconductor.
- the negative charges are discharged in the direction of lower resistance, and the residual charges on the back surface of the wafer W decrease.
- Most of the above-mentioned negative charges go to the processing chamber 102 through the gas space, and a part of them is placed on the mounting table 103 (support pins 153, base 131, etc.). It is considered that it works toward the ground contact.
- the piezoelectric element 161 is provided on the elevating member 105 for detaching the wafer W adsorbed on the electrostatic chuck 104, and the piezoelectric element 161 is provided via the support pin 153. Vibrates the wafer W. For this reason, the lifting member 105 is raised and the vicinity of the surface 144 is raised. Discharge can be performed quickly by dispersing the residual charges located nearby. As a result, the wafer W can be desorbed in a short time while preventing abnormal desorption.
- the vibration frequency of the piezoelectric element 161 does not need to be constant at all times.
- the vibration frequency is gradually changed according to the contact pressure between the wafer W and the support pin 1553. Is also good.
- the desorption operation can be started at appropriate timing.
- the timing of the transition from the charge removal to the desorption operation is not limited to the residual charge monitor 144.
- a configuration may be adopted in which a timer is provided in the control unit 107 so that the desorption operation is started at a time measured in advance.
- a low resistance grounding line dedicated to static elimination may be provided separately from the route shown in FIG. 4 to promote static elimination.
- the place where the piezoelectric element 16 1 is installed may be, for example, at or near the tip of the support pin 15 3.
- Supports piezoelectric element 1 6 1 When it is provided at the tip of the pin 15 3, it is preferable to coat the surface of the tip with an insulating film.
- the atmosphere in the processing chamber may be adjusted so as to be an atmosphere that is advantageous for facilitating charge removal. In this case, for example, the type, pressure or flow rate of the purge gas supplied into the processing chamber, or the temperature of the atmosphere can be adjusted.
- the electric charge remaining on the rear surface of the substrate to be processed is removed while the elevating member is raised, and the electric charge is removed.
- a series of steps of detaching a processing substrate can be performed almost simultaneously. For this reason, the desorption time can be significantly reduced while preventing desorption abnormalities in the electrostatic chuck.
- etching is mentioned as an example of the processing.
- these embodiments are also applied to the case of performing processing such as CVD, asshing, and sputtering. can do. '
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
A semiconductor processor comprises a mount stage (4) having an electrostatic chuck (42) that electrostatically chucks the rear face of a wafer (W) to be processed. When the rear face of the wafer (W) is electrostatically chucked by the electrostatic chuck (42), charge of first polarity develops on this rear face. A separation member (51) is arranged to selectively separate the wafer (W) from the mount stage (4). A charge supply section (6) is arranged to selectively supply charge of second polarity opposite to the first polarity to the rear face of the wafer (W). A control section (8) controls a charge supply section (6) to supply charge of the second polarity to the rear face of the wafer (W) immediately before the separation member (51) separates the wafer (W) from the mount stage (4).
Description
明 細 書 Specification
半導体処理装置 Semiconductor processing equipment
技術分野 Technical field
本発明は、 半導体処理装置と、 半導体処理装置において静 電チャ ックから被処理基板を脱離させる方法と に関する。 な お、 こ こで、 半導体処理と は、 半導体ウェハや L C D基板等 の被処理基板上に半導体層、 絶縁層、 導電層等を所定のパタ ーンで形成する こ と によ り 、 該被処理基板上に半導体デバイ スゃ、 半導体デバイスに接続される配線、 電極等を含む構造 物を製造するために実施される種々の処理を意味する。 The present invention relates to a semiconductor processing apparatus and a method of detaching a substrate to be processed from an electrostatic chuck in the semiconductor processing apparatus. Here, semiconductor processing refers to forming a semiconductor layer, an insulating layer, a conductive layer, and the like in a predetermined pattern on a substrate to be processed such as a semiconductor wafer or an LCD substrate. It means various processes performed to manufacture a structure including a semiconductor device II, wiring connected to the semiconductor device, electrodes, and the like on a processing substrate.
背景技術 Background art
半導体デバイ スの製造工程の中には、 例えば、 エッチング や C V D ( chemi cal vap or depo sitio n ) に よ る成膜等の よ う に基板の処理を真空雰囲気で行 う 処理が多数ある。 この よ う な処理を行う真空処理装置では、 被処理基板を載置する載置 台に基板を固定するため、 静電チャ ックが一般に用い られる 図 9 は、 真空処理装置で使用 される従来の載置台構造を示 す縦断面図であ り 、 載置台 1 上に半導体ウェハ Wが載置され た状態を示す。 載置台 1 は、 ベース 1 1 と、 その上面に配設 された静電チャ ック 1 2 と、 静電チャ ック 1 2 の側方を囲む リ ング体 1 3 と を含む。 静電チャ ック 1 2 は、 導電性を有す るシー ト状のチャ ック電極 1 4 の表裏を、 誘電体である、 例 えば、 ポ リ イ ミ ド等からなる絶縁層 1 5 で挟んだ構成を有す る。 直流電源 1 6 からチャ ック電極 1 4 に直流電圧 (チヤ ッ ク電圧) を印加する と、 静電チャ ック 1 2 と ウェハ Wと の間
にクーロ ン力が発生し、 これによ り ウェハ Wを載置台 1 上に 吸着保持する こ とができ る。 2. Description of the Related Art In a semiconductor device manufacturing process, there are many processes in which a substrate is processed in a vacuum atmosphere, such as, for example, film formation by etching or chemical vapor deposition (CVD). In a vacuum processing apparatus that performs such processing, an electrostatic chuck is generally used to fix a substrate to a mounting table on which a substrate to be processed is mounted.Figure 9 shows a conventional vacuum processing apparatus used in a vacuum processing apparatus. FIG. 2 is a longitudinal sectional view showing the mounting table structure of FIG. 1, showing a state where a semiconductor wafer W is mounted on the mounting table 1. The mounting table 1 includes a base 11, an electrostatic chuck 12 disposed on the upper surface thereof, and a ring body 13 surrounding the electrostatic chuck 12. The electrostatic chuck 12 is made of an insulating layer 15 made of a dielectric material, for example, a polyimide, for example, on both sides of a sheet-like chuck electrode 14 having conductivity. It has a sandwiched configuration. When a DC voltage (chuck voltage) is applied from the DC power supply 16 to the chuck electrode 14, a gap between the electrostatic chuck 12 and the wafer W is generated. Then, a Coulomb force is generated, whereby the wafer W can be suction-held on the mounting table 1.
載置台 1 の内部には、 静電チャ ック 1 2 から ウェハ Wを脱 離させるための支持ピ ン 1 7 (周方向に沿って 3 本存在す る) が突没自在に配設される。 ウェハ Wに対する処理が終了 し、 静電チャ ック 1 2 力、ら ウェハ Wを脱離させる時、 スイ ツ チ S W Aの接続を接地部側に切 り 替える。 これによ り 、 チヤ ッ ク電極 1 4への正電圧の印加を停止する と共に、 静電チヤ ック 1 2 の表面に存在する電荷の除去を行って当該表面にお ける ウェハ Wへの吸着力を弱める。 次に、 支持ピン 1 7 を上 昇させて、 ウェハ Wを静電チャ ック 1 2 の表面から脱離させ る。 こ の時、 ス ィ ッ チ S W B を閉 じる と、 ウェハ W側の残留 電荷の一部は導電性の支持ピン 1 7 を介して接地部に逃がさ れる。 Inside the mounting table 1, support pins 17 (three in the circumferential direction) for detaching the wafer W from the electrostatic chuck 12 are provided so as to be able to protrude and retract. . When the processing on the wafer W is completed and the electrostatic chuck 12 is removed, the connection of the switch SWA is switched to the ground side when the wafer W is detached. As a result, the application of the positive voltage to the chuck electrode 14 is stopped, and the electric charge existing on the surface of the electrostatic chuck 12 is removed to attract the wafer W to the wafer W on the surface. Weaken power. Next, the support pins 17 are raised to detach the wafer W from the surface of the electrostatic chuck 12. At this time, when the switch SWB is closed, a part of the residual charges on the wafer W side is released to the ground via the conductive support pins 17.
上記のよ う にウェハ Wを静電チャ ック 1 2 から脱離させる 時には当該静電チャ ック 1 2 の表面の除電が行われる。 しか し、 ウェハ Wの反り 、 絶縁層 1 5 の う ねり 等の要因によ り 、 電荷が強く 引き合う 部位がウェハ Wと静電チャ ック 1 2 (絶 縁層 1 5 ) と の表面に局在し、 除電が十分行われないこ とが ある。 このよ う な状態でウェハ Wの脱離を行 う と、 支持ピン 1 7 がウェハ Wを静電チャ ック 1 2から強制的に剥がすこ と と なる。 その結果、 例えば、 ウェハ Wの片側が跳ね上がる、 ウェハ Wが支持ピ ン 1 7 から落下する といった問題が生じる。 また上記の方法で除電を確実に行わせよ う とする と、 長い時 間が必要であ り 、 スループッ トが低下して しま う。
1 When the wafer W is detached from the electrostatic chuck 12 as described above, static elimination of the surface of the electrostatic chuck 12 is performed. However, due to factors such as the warpage of the wafer W and the undulation of the insulating layer 15, a site where the charge is strongly attracted is localized on the surface of the wafer W and the electrostatic chuck 12 (insulating layer 15). As a result, static elimination may not be performed sufficiently. When the wafer W is detached in such a state, the support pins 17 forcibly peel the wafer W from the electrostatic chuck 12. As a result, for example, problems such as one side of the wafer W jumping up and the wafer W falling from the support pin 17 occur. In addition, if the above method is used to ensure static elimination, a long time is required and the throughput is reduced. 1
3 発明の開示 3 Disclosure of the invention
本発明の 目的は、 半導体処理装置において、 静電チャ ック から被処理基板を脱離させるにあた り 、 脱離異常の発生を防 ぐと共に、 脱離に要する時間の短縮化を図る こ と にある。 An object of the present invention is to prevent the occurrence of a detachment abnormality and to reduce the time required for detachment in a semiconductor processing apparatus when detaching a substrate from an electrostatic chuck. And.
本発明の第 1 の視点は、 導体または半導体の裏面を有する 被処理基板に対して半導体処理を施すための半導体処理装置 であって、 A first aspect of the present invention is a semiconductor processing apparatus for performing semiconductor processing on a substrate to be processed having a conductor or a back surface of a semiconductor,
前記被処理基板を収納する処理室と、 A processing chamber for storing the substrate to be processed,
前記処理室内で前記被処理基板を載置する載置台と、 前記 載置台は前記被処理基板の前記裏面を静電吸着する静電チヤ ック を有する こ と と 、 前記被処理基板の前記裏面が前記静電 チヤ ック によ り 静電吸着される時に前記裏面には第 1 極性の 電荷が発生する こ と と、 A mounting table for mounting the substrate to be processed in the processing chamber; and the mounting table having an electrostatic chuck for electrostatically adsorbing the back surface of the substrate to be processed; and the back surface of the substrate to be processed. When the electrostatic chuck is electrostatically attracted by the electrostatic chuck, a charge of the first polarity is generated on the back surface;
前記載置台上から前記被処理基板を選択的に脱離させる脱 離部材と、 A detaching member for selectively detaching the substrate to be processed from the mounting table,
前記被処理基板の前記裏面に前記第 1極性と は反対の第 2 極性の電荷を選択的に供給する電荷供給部と、 A charge supply unit that selectively supplies a charge of a second polarity opposite to the first polarity to the back surface of the substrate to be processed;
前記脱離部材及び前記電荷供給部の動作を制御する制御部 と、 前記制御部は、 前記脱離部材によ り 前記載置台上から前 記被処理基板を脱離させる直前に、 前記電荷供給部によ り 前 記被処理基板の前記裏面に前記第 2極性の電荷を供給する こ と と 、 A control unit configured to control the operation of the detachment member and the charge supply unit; and the control unit supplies the charge supply immediately before the detachment of the substrate to be processed from the mounting table by the detachment member. Supplying the charge of the second polarity to the back surface of the substrate to be processed by a unit;
を具備する。 Is provided.
本発明の第 2 の視点は、 導体または半導体の裏面を有する 被処理基板に対して半導体処理を施すための半導体処理装置
において、 載置台上で前記被処理基板の前記裏面を静電吸着 する静電チヤ ック から脱離部材によ り 前記被処理基板を脱離 させる方法であって、 こ こで、 前記被処理基板の前記裏面が 前記静電チャ ッ ク によ り 静電吸着される時に前記裏面には第 1 極性の電荷が発生する こ と と、 前記方法は、 A second aspect of the present invention is a semiconductor processing apparatus for performing semiconductor processing on a substrate to be processed having a conductor or a semiconductor back surface. The method according to claim 1, wherein the substrate to be processed is detached by a detaching member from an electrostatic chuck that electrostatically attracts the back surface of the substrate to be processed on a mounting table. When the back surface of the substrate is electrostatically attracted by the electrostatic chuck, a charge of a first polarity is generated on the back surface.
前記静電チヤ ック のチヤ ック電極への電圧の印加を停止す る工程と、 Stopping the application of voltage to the chuck electrode of the electrostatic chuck;
次に、 前記被処理基板の前記裏面に前記第 1極性と は反対 の第 2極性の電荷を供給する工程と、 Next, supplying a charge of a second polarity opposite to the first polarity to the back surface of the substrate to be processed,
次に、 前記脱離部材によ り 前記載置台上から前記被処理基 板を脱離させる工程と、 Next, a step of detaching the substrate to be processed from the mounting table by the detachment member,
を具備する。 Is provided.
本発明の第 3 の視点は、 被処理基板に対して半導体処理を 施すための半導体処理装置であって、 A third aspect of the present invention is a semiconductor processing apparatus for performing semiconductor processing on a substrate to be processed,
前記被処理基板を収納する処理室と、 A processing chamber for storing the substrate to be processed,
前記処理室内で前記被処理基板を載置する載置台と、 前-記 載置台は前記被処理基板の裏面を静電吸着する静電チャ ック を有する こ と と 、 A mounting table for mounting the substrate to be processed in the processing chamber, and the mounting table having an electrostatic chuck for electrostatically adsorbing a back surface of the substrate to be processed;
前記載置台上から前記被処理基板を選択的に脱離させる脱 離部材と、 A detaching member for selectively detaching the substrate to be processed from the mounting table,
前記昇降部材に振動を選択的に供給する振動供給部と、 前記脱離部材及び前記振動供給部の動作を制御する制御部 と、 前記制御部は、 前記脱離部材によ り 前記载置台上から前 記被処理基板を脱離させる直前に、 前記脱離部材と前記被処 理基板の前記裏面と を接触させた状態で前記振動供給部によ
り 前記脱離部材を介して前記被処理基板に前記振動を供給す る こ と と 、 A vibration supply unit that selectively supplies vibration to the elevating member; a control unit that controls operations of the detachment member and the vibration supply unit; Immediately before the substrate is detached from the substrate, the vibration supply unit may be in contact with the detaching member and the back surface of the substrate to be treated. Supplying the vibration to the substrate to be processed via the detachment member;
を具備する。 Is provided.
本発明の第 4 の視点は、 被処理基板に対して半導体処理を 施すための半導体処理装置において、 載置台上で前記被処理 基板の裏面を静電吸着する静電チャ ックか ら脱離部材によ り 前記被処理基板を脱離させる方法であって、 According to a fourth aspect of the present invention, in a semiconductor processing apparatus for performing a semiconductor process on a substrate to be processed, the semiconductor substrate is separated from an electrostatic chuck that electrostatically attracts a back surface of the substrate to be processed on a mounting table. A method for detaching the substrate to be processed by a member,
前記静電チヤ ック のチヤ ック電極への電圧の印加を停止す る工程と、 Stopping the application of voltage to the chuck electrode of the electrostatic chuck;
次に、 前記脱離部材と前記被処理基板の前記裏面と を接触 させた状態で前記脱離部材を介 して前記被処理基板に振動を 供給する工程と、 Next, supplying vibration to the substrate to be processed via the detachment member in a state where the detachment member is brought into contact with the back surface of the substrate to be treated;
次に、 前記脱離部材によ り 前記載置台上から前記被処理基 板を脱離させる工程と、 Next, a step of detaching the substrate to be processed from the mounting table by the detachment member,
を具備する。 Is provided.
図面の簡単な説明 - - ■ 図 1 は、 本発明の第 1 の実施の形態に係る半導体処理装置 を示す縦断面図。 BRIEF DESCRIPTION OF THE DRAWINGS--FIG. 1 is a longitudinal sectional view showing a semiconductor processing apparatus according to a first embodiment of the present invention.
図 2 は、 図 1 図示の装置において、 静電チャ ックから ゥェ ハを脱離させる方法を示すフローチヤ一ト。 FIG. 2 is a flowchart showing a method of detaching the wafer from the electrostatic chuck in the apparatus shown in FIG.
図 3 A、 B は、 図 1 図示の装置における、 ウェハと静電チ ャ ッ ク と の間の電気的な関係を示す拡大断面図。 3A and 3B are enlarged sectional views showing an electrical relationship between a wafer and an electrostatic chuck in the apparatus shown in FIG.
図 4 は、 本発明の第 2 の実施の形態に係る半導体処理装置 を示す縦断面図。 FIG. 4 is a longitudinal sectional view showing a semiconductor processing apparatus according to a second embodiment of the present invention.
図 5 は、 図 4図示の装置における ウェハ及び静電チヤ ック
と支持ピン と の位置関係を示す概略平面図。 Figure 5 shows the wafer and electrostatic chuck in the device shown in Figure 4. FIG. 4 is a schematic plan view showing the positional relationship between and a support pin.
図 6 は、 図 4 図示の装置において、 静電チャ ックから ゥェ ハを脱離させる方法を示すフローチヤ一 ト。 FIG. 6 is a flowchart showing a method of detaching the wafer from the electrostatic chuck in the apparatus shown in FIG.
図 7 A、 B、 Cは、 ウェハ Wを脱離させる方法を工程順に 示す断面図。 7A, 7B, and 7C are cross-sectional views illustrating a method of desorbing a wafer W in a process order.
図 8 は、 図 4 図示の装置における、 ウェハと静電チャ ック と の間の電気的な関係を示す拡大断面図。 FIG. 8 is an enlarged cross-sectional view showing an electrical relationship between a wafer and an electrostatic chuck in the apparatus shown in FIG.
図 9 は、 真空処理装置で使用 される従来の載置台構造を示 す縦断面図。 FIG. 9 is a longitudinal sectional view showing a conventional mounting table structure used in a vacuum processing apparatus.
発明を実施するための最良の形態 BEST MODE FOR CARRYING OUT THE INVENTION
本発明の実施の形態について図面を参照 して以下に説明す る。 なお、 以下の説明において、 略同一の機能及び構成を有 する構成要素については、 同一符号を付し、 重複説明は必要 な場合にのみ行 う。 Embodiments of the present invention will be described below with reference to the drawings. In the following description, components having substantially the same functions and configurations are denoted by the same reference numerals, and repeated description will be made only when necessary.
ぐ第 1 の実施の形態〉 First Embodiment>
図 1 は、 本発明の第 1 の実施の形態に係る半導体処理装置 と して、 エ ッチング装置 (真空処理装置) を示す縦断面図で ある。 FIG. 1 is a longitudinal sectional view showing an etching apparatus (vacuum processing apparatus) as a semiconductor processing apparatus according to a first embodiment of the present invention.
図 1 に示すよ う に、 この処理装置は、 真空容器から形成さ れた処理室 2 を有する。 真空容器即ち処理室 2 は、 例えば、 アルミ ニ ウムによ り 気密構造をなすよ う に形成され且つ接地 される。 処理室 2 内で天井には、 接地された上部電極を兼用 するシャ ワーへッ ド 3 が配設される。 処理室 2 内で床上には、 下部電極を兼ねる載置台 4 がシャ ワーへッ ド 3 と対向 して配 設される。
処理室 2 の底面には、 真空排気路である排気管 2 2 を介し て、 例えば、 ターボ分子ポンプや ドライポンプな どからなる 真空排気部 2 1 に接続された排気口が形成される。 処理室 2 の側壁には、 被処理基板例えば、 ウェハ Wを搬入出するため の開 口部 2 3 が形成され、 これはゲー トバルブ Gによ り 開閉 自在と される。 側壁の外方には開 口部 2 3 を上下に挟む位置 に、 例えば、 夫々 リ ング状をなす永久磁石 2 4 、 2 5 が配設 される。 As shown in FIG. 1, this processing apparatus has a processing chamber 2 formed from a vacuum vessel. The vacuum chamber or processing chamber 2 is formed of, for example, aluminum so as to form an airtight structure and is grounded. In the processing room 2, a shower head 3 serving as a grounded upper electrode is provided on the ceiling. A mounting table 4 also serving as a lower electrode is disposed on the floor in the processing chamber 2 so as to face the shower head 3. On the bottom surface of the processing chamber 2, an exhaust port connected to a vacuum exhaust unit 21 composed of, for example, a turbo molecular pump or a dry pump is formed through an exhaust pipe 22 as a vacuum exhaust path. An opening 23 for carrying a substrate to be processed, for example, a wafer W, is formed in a side wall of the processing chamber 2 , and can be opened and closed by a gate valve G. For example, ring-shaped permanent magnets 24 and 25 are disposed outside the side wall at positions sandwiching the opening 23 vertically.
シャ ワ ー へッ ド 3 の上部には、 ガス供給管 3 2 を介して、 反応ガスや不活性ガスなどの処理ガスを供給するガス供給部 3 3 が接続される。 また、 シャ ワ ーヘッ ド 3 には、 載置台 4 上のウェハ Wに対向する位置に多数の孔部 3 1 が形成される。 ガス供給管 3 2 から供給される処理ガスは、 シャ ワー へッ ド 3 内に形成された処理ガス流路で拡散し、 孔部 3 1 を介して ウェハ Wの表面へ均一に供給される。 A gas supply unit 33 for supplying a processing gas such as a reactive gas or an inert gas is connected to an upper portion of the shower head 3 via a gas supply pipe 32. In the shower head 3, a large number of holes 31 are formed on the mounting table 4 at positions facing the wafer W. The processing gas supplied from the gas supply pipe 32 diffuses in the processing gas flow path formed in the shower head 3 and is uniformly supplied to the surface of the wafer W via the hole 31.
載置台 4 は、 例えば、 アル ミ ニ ウ ムからなる円柱状のベー ス 4 1 を含む。 ベース 4 1 は処理室 2 の床上に絶縁部材 4 1 a によ り 絶縁された状態で配設される。 ベース 4 1 には、 コ ンデンサ C 1 及びコイル L 1 を介 してバイ アス用高周波を印 加するため の高周波電源 4 0 が接続される。 載置台 4 の側壁 には、 排気時においてウェハ Wの周方向に均一な排気流を形 成するためのバッフル板 4 4が配設される。 バッ フル板 4 4 は載置台 4 から処理室 2 の内壁面近傍へと延びる リ ング状の 板状部材からなる。 The mounting table 4 includes, for example, a cylindrical base 41 made of aluminum. The base 41 is disposed on the floor of the processing chamber 2 in a state of being insulated by the insulating member 41a. A high frequency power supply 40 for applying a high frequency for bias is connected to the base 41 via a capacitor C 1 and a coil L 1. A baffle plate 44 for forming a uniform exhaust flow in the circumferential direction of the wafer W at the time of evacuation is disposed on the side wall of the mounting table 4. The baffle plate 44 is a ring-shaped plate member extending from the mounting table 4 to the vicinity of the inner wall surface of the processing chamber 2.
ベース 4 1 の上面上には、 ウェハ Wを概ね水平に吸着保持
する ための静電チャ ッ ク 4 2 が配設される。 静電チャ ック 4 2 の周囲を囲むよ う に、 リ ング状の導電部材である導電リ ン グ 4 3 が配設される。 導電リ ング 4 3 は、 ウェハ Wの周縁及 ぴその近傍の濃いプラズマを拡散させ、 プラズマの均一性を 高める役割を果たす。 導電リ ング 4 3 とベース 4 1 との間に は、 リ ング状の絶縁部材である絶縁リ ング 4 3 a が配設され る。 Wafer W is held almost horizontally on the upper surface of base 41 An electrostatic chuck 42 is provided to perform the operation. A conductive ring 43, which is a ring-shaped conductive member, is provided so as to surround the periphery of the electrostatic chuck 42. The conductive ring 43 plays a role of diffusing the dense plasma on the periphery of the wafer W and in the vicinity thereof, and improving the uniformity of the plasma. An insulating ring 43a, which is a ring-shaped insulating member, is provided between the conductive ring 43 and the base 41.
静電チャ ック 4 2 は、 導電性を有するシー ト状のチャ ック 電極 4 6 の表裏を、 誘電体である、 例えば、 ポリ イ ミ ド、 了 ルミ ナ、 或いは窒化アルミ ニウムな どからなる絶縁層 4 5 で 挟んだ構成を有する。 チャ ック電極 4 6 は、 ス ィ ッ チ S W 1 を介 して直流電源 4 7 と接地部と に選択的に接続される。 絶 縁層 4 5 の表面とチャ ック電極 4 6 と の距離は例えば、 0 . 2 5 m m程度である。 直流電源 4 7からチャ ック電極 4 6 に 直流電圧 (チャ ッ ク電圧) を印加する と、 静電チャ ック 4 2 と ウェハ Wとの間にク ーロ ン力が発生し、 これによ り ウェハ Wを載置台 4上に吸着保持する こ とができ る。 ウェハ Wの吸 着を解除する時には、 スィ ツチ S W 1 を切 り 替えて静電チヤ ック 4 2近傍の電荷を接地部に逃がす。 The electrostatic chuck 42 is made of a conductive sheet-like chuck electrode 46 which is made of a dielectric material such as polyimide, aluminum, aluminum nitride, or the like. It has a configuration sandwiched between insulating layers 45. The chuck electrode 46 is selectively connected to a DC power supply 47 and a ground via a switch SW1. The distance between the surface of the insulating layer 45 and the chuck electrode 46 is, for example, about 0.25 mm. When a DC voltage (chuck voltage) is applied from the DC power supply 47 to the chuck electrode 46, a Coulomb force is generated between the electrostatic chuck 42 and the wafer W, which causes Thus, the wafer W can be suction-held on the mounting table 4. When releasing the suction of the wafer W, the switch SW1 is switched to release the electric charge near the electrostatic chuck 42 to the ground.
チャ ッ ク電極 4 6 と直流電源 4 7 と を結ぶ回路の途中には 残留電荷監視手段である残留電荷モニ タ 7 が接続される。 残 留電荷モニタ 7 を介 して制御部 8 によ り 、 静電チャ ック 4 2 の除電を行う 際に、 その進行具合を下記の態様で把握でき る。 即ち、 例えば、 ス ィ ッ チ S W 1 を直流電源 4 7 に接続した時 に流れる電荷量 Q 1 を記憶する。 次に、 ス ィ ッ チ S W 1 を接
地部側に切 り替えた時に流れる電荷量 Q 2 を測定する。 そ し て、 電荷量 Q 1 から電荷量 Q 2 を差し引き ( Q 1 — Q 2 ) 、 静電チャ ック 4 2 に残留している電荷を求める。 A residual charge monitor 7, which is a residual charge monitoring means, is connected in the middle of a circuit connecting the chuck electrode 46 and the DC power supply 47. The control unit 8 via the residual charge monitor 7 can grasp the progress of the electrostatic chuck 42 in the following manner when static elimination is performed. That is, for example, the charge amount Q 1 flowing when the switch SW 1 is connected to the DC power supply 47 is stored. Next, connect switch SW1. Measure the amount of charge Q 2 flowing when switching to the ground side. Then, the charge amount Q 2 is subtracted from the charge amount Q 1 (Q 1 −Q 2), and the charge remaining in the electrostatic chuck 42 is obtained.
載置台 4 の内部には、 外部の搬送アーム (図示せず) と の 間でウェハ Wの受け渡 しを行 う ため、 脱離部材例えば、 昇降 部材である支持ピン 5 1 が複数例えば、 3 本突没自在に配設 される。 支持ピ ン 5 1 は連結部材 5 2 を介 して駆動機構 5 3 によ り 昇降される。 支持ピ ン 5 1 が配設された貫通孔と大気 側と の間の気密を保持するため、 ベローズ 5 4 が配設される。 支持ピン 5 1 、 連結部材 5 2及び駆動機構 5 3 には、 例えば、 アル ミ ニ ウ ム、 ス テ ン レス な どの導体から選択される材質が 用い られる。 In order to transfer the wafer W to and from an external transfer arm (not shown) inside the mounting table 4, a plurality of support pins 51, which are detachable members, for example, elevating members, are provided. It is arranged to be freely retractable. The support pin 51 is moved up and down by a drive mechanism 53 via a connecting member 52. A bellows 54 is provided to maintain the airtightness between the through hole in which the support pins 51 are provided and the atmosphere side. For the support pin 51, the connecting member 52, and the drive mechanism 53, for example, a material selected from a conductor such as aluminum or stainless steel is used.
連結部材 5 2 には、 支持ピン 5 1 を介して正の電荷をゥェ ハ Wに供給するための電荷供給部 6 が接続される。 電荷供給 部 6 が供給する電荷の極性は、 ウェハ Wの裏面が静電チヤ ッ ク 4 2 によ り 静電吸着される時にこ の裏面に発生する-電荷と は逆となる よ う に設定される。 即ち、 静電吸着時にウェハ W の裏面に負の電荷が発生する場合は、 電荷供給部 6 が正の電 荷を供給する よ う に設定され、 静電吸着時にウェハ Wの裏面 に正の電荷が発生する場合は、 電荷供給部 6 が負の電荷を供 給する よ う に設定される。 電荷供給部 6 は、 抵抗 6 1 及ぴ直 流電源 6 2 と を備えてお り 、 スィ ッチ S W 2 の切 り替えによ り支持ピン 5 1 が直流電源 6 2 と接地部と に選択的に接続さ れる。 なお、 駆動機構 5 3 の動作、 スィ ッチ S W 1 、 S W 2 の切 り替えなどは、 制御部 8 によ り制御される。
次に、 制御部 8 の制御下で行われる、 図 1 図示の処理装置 の作用について説明する。 ゲー トバルブ Gを開き、 開 口部 2 3 を介して、 隣接する真空雰囲気に設定されたロ ー ドロ ック 室 (図示せず) と処理室 2 と を連通させる。 次に、 この ロー ドロ ック室から搬送アーム (図示せず) によ り被処理基板、 この例では半導体ウェハ (シリ コ ンウェハ) Wを処理室 2内 に搬入する。 次に、 搬送アーム と支持ピン 5 1 と の協働動作 によ り載置台 4 の上につま り 静電チャ ック 4 2 の上に ウェハ Wを載置する。 次に、 スィ ッチ S W 1 を直流電源 4 7側に切 り 替えて静電チャ ック 4 2 をオンに し、 ウェハ Wを載置台 4 の表面に吸着する。 A charge supply unit 6 for supplying a positive charge to the wafer W via the support pin 51 is connected to the connecting member 52. The polarity of the charge supplied by the charge supply unit 6 is set so as to be opposite to the charge generated on the back surface of the wafer W when the back surface of the wafer W is electrostatically attracted by the electrostatic chuck 42. Is done. That is, when a negative charge is generated on the back surface of the wafer W during electrostatic chucking, the charge supply unit 6 is set to supply a positive charge, and the positive charge is set on the back surface of the wafer W during electrostatic chucking. Is generated, the charge supply unit 6 is set to supply a negative charge. The charge supply section 6 includes a resistor 61 and a DC power supply 62, and the support pin 51 is selected between the DC power supply 62 and the ground section by switching the switch SW2. Connected. The operation of the drive mechanism 53 and the switching of the switches SW 1 and SW 2 are controlled by the control unit 8. Next, the operation of the processing apparatus shown in FIG. 1 performed under the control of the control unit 8 will be described. The gate valve G is opened, and the load chamber (not shown) set to the adjacent vacuum atmosphere and the processing chamber 2 are communicated through the opening 23. Next, a substrate to be processed, in this example, a semiconductor wafer (silicon wafer) W, is loaded into the processing chamber 2 from the load lock chamber by a transfer arm (not shown). Next, the wafer W is mounted on the mounting table 4, that is, on the electrostatic chuck 42, by the cooperative operation of the transfer arm and the support pins 51. Next, the switch SW 1 is switched to the DC power supply 47 side to turn on the electrostatic chuck 42, and the wafer W is attracted to the surface of the mounting table 4.
一方、 搬送アームを処理室 2 から退出させた後、 ゲー トバ ルブ Gを閉 じ、 ー且排気管 2 2 を介して処理室 2 内を真空引 きする。 次に、 真空引 き しなが ら、 シャ ワーヘッ ド 3 力 ら処 理ガスをウェハ Wに供給し、 処理室 2 内の圧力が例えば、 3 O m T o r r ~ l O O m T o r r (約 : 〜 1 3 . 3 P a ) に 維持される よ う に調節を行 う。 次に、 高周波電源 4 0 によ り 下部電極をなす載置台 4 と 上部電極をなすシャ ワー へッ ド 3 と の間に高周波電圧を印加 して処理ガスをプラズマ化する と 共に、 磁石 2 4 、 2 5 によ り プラズマを高密度化する。 この よ う に して生成 したプラズマを使用 してウェハ W表面の例え ば、 シリ コ ン酸化膜をエッチングする。 所定時間のエツチン グを行った後、 高周波電源 4 0 を停止する。 そ して、 静電チ ャ ック 4 2 カゝら ウェハ Wを脱離させる工程へと移行する。 On the other hand, after the transfer arm has been withdrawn from the processing chamber 2, the gate valve G is closed, and the inside of the processing chamber 2 is evacuated via the exhaust pipe 22. Next, a processing gas is supplied to the wafer W from the showerhead 3 while the vacuum is being drawn, and the pressure in the processing chamber 2 is, for example, 3 OmTorr to 100 mTorr (about: Adjust so that it is maintained at ~ 13.3 Pa). Next, a high-frequency voltage is applied between the mounting table 4 serving as the lower electrode and the shower head 3 serving as the upper electrode by the high-frequency power source 40 to convert the processing gas into plasma, and the magnet 24 , 25 to increase the density of the plasma. The plasma generated in this manner is used to etch, for example, a silicon oxide film on the surface of the wafer W. After performing etching for a predetermined time, the high-frequency power supply 40 is stopped. Then, the process proceeds to a step of detaching the wafer W from the electrostatic chuck 42.
図 2 は、 図 1 図示の装置において、 制御部 8 の制御下で静
電チャ ック 4 2 から ウェハ Wを脱離させる方法を示すフ ロー チヤ一 トである。 FIG. 2 shows a static state of the apparatus shown in FIG. This is a flowchart showing a method for detaching the wafer W from the electric chuck 42.
先ず、 スィ ッチ S W 1 を接地部側に切 り 替えて静電チヤ ッ ク 4 2 の除電を行 う 。 次に、 駆動機構 5 3 によ り 支持ピン 5 1 の上昇を開始する (ステ ップ S 1 ) 。 次に、 例えば、 予め 設定した昇降量で支持ピン 5 1 の上昇動作を停止する (ステ ップ S 2 ) 。 この場合、 支持ピン 5 1 の先端がある程度の接 触圧でウェハ Wに押 し付け られて確実に接触する昇降量を予 め試験を行って決めておく のが好ま しい。 なお、 支持ピン 5 1 の上昇動作を停止するタイ ミ ングはこれに限られない。 例 えば、 圧力センサを用いて所定の接触圧になるまで支持ピン 5 1 を上昇させる こ と ができ る。 或いは、 タイマを用いて予 め設定した時間だけ支持ピン 5 1 を上昇させる よ う に しても よい。 First, the switch SW1 is switched to the ground side to remove static electricity from the electrostatic chuck 42. Next, the drive mechanism 53 starts to raise the support pin 51 (step S1). Next, for example, the lifting operation of the support pin 51 is stopped at a predetermined lifting amount (step S2). In this case, it is preferable to preliminarily carry out a test to determine the amount of elevating and lowering at which the tip of the support pin 51 is pressed against the wafer W with a certain contact pressure to ensure contact. The timing for stopping the raising operation of the support pin 51 is not limited to this. For example, the support pin 51 can be raised to a predetermined contact pressure by using a pressure sensor. Alternatively, the support pin 51 may be raised for a preset time using a timer.
次に、 スィ ッチ S W 2 を直流電源 6 2側に切 り 替えてゥェ ハ Wへ逆電荷の供給を開始する (ステ ップ S 3 ) 。 即ち、 チ - ャ ック電極 4 6 に正の電荷が供給される こ と によ り ウェハ W の裏面に発生するのは負の電荷であるため、 この実施の形態 においては、 支持ピン 5 1 を介 して正の電荷をウェハ Wに供 給する。 これによ り ウェハ Wの裏面側に残留している負電荷 が、 注入された正電荷に中和される。 この時、 制御部 8 は、 残留電荷モニタ 7 によ り 残留電荷を監視し、 この残留電荷と 予め決めておいた設定値と を比較する (ステ ップ S 4 ) 。 Next, the switch SW2 is switched to the DC power supply 62 side to start supplying the reverse charge to the wafer W (step S3). That is, since a negative charge is generated on the back surface of the wafer W by supplying a positive charge to the chuck electrode 46, the support pin 51 is used in this embodiment. A positive charge is supplied to the wafer W via the. As a result, the negative charges remaining on the rear surface side of the wafer W are neutralized by the injected positive charges. At this time, the control unit 8 monitors the residual charge by the residual charge monitor 7 and compares the residual charge with a predetermined set value (step S4).
残留電荷が設定値以下になる と、 駆動機構 5 3 によ り 支持 ピン 5 1 を再ぴ上昇させ、 ウェハ Wを突き上げる よ う に して
載置台 4 から脱離させる (ステ ップ S 5 ) 。 なお、 残留電荷 の設定値と は、 ウェハ Wの裏面の負の電荷が完全に中和され た時の レベルとする こ とができ る。 或いは、 この設定値は、 支持ピン 5 1 でウェハ Wを突き上げても脱離異常が生じない 程度の吸着力を残す程度に除電された時の レベルとする こ と ができ る。 或いは、 この設定値は、 後述する よ う にウェハ W の裏面に僅かに正の電荷が溜まって静電チヤ ック 4 2 と の間 で微小な斥力が発生する時のレベルとする こ とができ る。 When the residual charge falls below the set value, the support pins 51 are raised again by the drive mechanism 53 so that the wafer W is pushed up. Detach it from the mounting table 4 (step S5). It should be noted that the set value of the residual charge can be a level when the negative charge on the back surface of the wafer W is completely neutralized. Alternatively, the set value can be set to a level at which the charge is removed to the extent that a suction force that does not cause a detachment abnormality even when the wafer W is pushed up by the support pins 51 remains. Alternatively, this set value may be set to a level at which a slight positive charge accumulates on the back surface of the wafer W to generate a small repulsive force with the electrostatic chuck 42 as described later. it can.
図 3 A、 B は、 図 1 図示の装置における、 ウェハ Wと静電 チヤ ック 4 2 と の間の電気的な関係を示す拡大断面図である。 図 1 図示の装置における、 ウェハ Wを脱離する際の除電のメ 力ェズムについて図 3 A、 B を参照して説明する。 3A and 3B are enlarged cross-sectional views showing an electrical relationship between the wafer W and the electrostatic chuck 42 in the apparatus shown in FIG. The mechanism of static elimination when the wafer W is detached in the apparatus shown in FIG. 1 will be described with reference to FIGS. 3A and 3B.
図 3 Aに示すよ う に、 チャ ック電極 4 6 に正電圧が印加さ れる と、 絶縁層 4 5表面 (静電チャ ック 4 2表面) は正電荷 を帯びる。 このメ カニズムは完全に把握されていないが、 絶 縁体であれば分極化が起こ り 、 また絶縁層 4 5 内に僅かな低 抵抗体が含まれている場合にはチヤ ック電極 4 6 の正電荷が 表面まで移動して正電荷を帯びる と考えられる。 As shown in FIG. 3A, when a positive voltage is applied to the chuck electrode 46, the surface of the insulating layer 45 (the surface of the electrostatic chuck 42) becomes positively charged. Although this mechanism is not completely understood, polarization occurs in the case of an insulator, and in the case where a slight low-resistance element is contained in the insulating layer 45, the chuck electrode 46 is formed. It is considered that the positive charge moves to the surface and becomes positive.
静電チャ ック 4 2 の表面及びウェハ Wの裏面側は、 微視的 に捉えれば図 3 Aに示すよ う に両者共に凹凸を有する。 この 両者の凹凸が接近する接近部位 P l 、 P 2 の近傍では電荷 The surface of the electrostatic chuck 42 and the back side of the wafer W both have irregularities as shown in FIG. 3A when viewed microscopically. In the vicinity of the approaching parts P l and P 2 where these two irregularities approach, the charge is
(例えば、 ウェハ側の負電荷と静電チヤ ッ ク側の正電荷と) の結合力が強く 、 こ こに多く の電荷が集ま って強い吸着力を 生じている と考えられる。 このよ う な状態で、 静電チャ ック 4 2 の正電荷と ウェハ Wの負電荷とが互いに引き合う クーロ
6541 It is considered that the binding force between the negative charge on the wafer side and the positive charge on the electrostatic chuck side is strong, and a large amount of charge is gathered here to generate a strong adsorption force. In this state, the coulomb attracts the positive charge of the electrostatic chuck 42 and the negative charge of the wafer W to each other. 6541
1 3 ンカ (引力) が作用 してウェハ Wは静電チャ ック 4 2 に静電 吸着される。 The wafer W is electrostatically attracted to the electrostatic chuck 42 by the action of 13 anchors (attraction).
ウェハ Wのエ ッチングが終わる と、 接地部を介 して静電チ ャ ッ ク 4 2 の除電が行われる。 しかし、 残留電荷が残ってい る ので静電吸着力は弱く なっている ものの電気的には図 3 A 図示と同様の状態になっている。 After the etching of the wafer W is completed, the static electricity of the electrostatic chuck 42 is removed through the grounding portion. However, since the residual charge remains, the electrostatic attraction force is weakened, but the electrical state is the same as that shown in Fig. 3A.
一方、 図 3 B に示すよ う に、 電荷供給部 6 から支持ピン 5 1 を介して ウェハ Wに正の電荷を徐々 に注入する と、 この正 の電荷は半導体である ウェハ Wの内部を自 由に動き回る。 正 の電荷は、 接近部位 P 1 に集まっている負の電荷に引き寄せ られて集ま る こ とによ り 、 当該負電荷を電気的に中和する よ う に作用する。 このため、 ウェハ Wの負電荷は注入された正 の電荷に打ち消される。 また、 引き合 う相手がいなく なつた 静電チャ ッ ク 4 2 の正の電荷は、 チャ ッ ク電極 4 6 に接続さ れた接地部から逃げて残留電荷が減っていく 。 そのため、 静 電チャ ック 4 2 と ウェハ Wとの間に作用する静電吸着力が弱 め られる。 On the other hand, as shown in FIG. 3B, when positive charges are gradually injected from the charge supply unit 6 into the wafer W through the support pins 51, the positive charges are self-contained inside the semiconductor wafer W. Move around for free. The positive charge is attracted to and collected by the negative charge collected at the approach site P1, thereby acting to electrically neutralize the negative charge. Therefore, the negative charge of the wafer W is canceled by the injected positive charge. In addition, the positive charge of the electrostatic chuck 42 having no partner to be escaping escapes from the ground portion connected to the chuck electrode 46 and the residual charge decreases. Therefore, the electrostatic attraction force acting between electrostatic chuck 42 and wafer W is weakened.
本実施の形態によれば、 半導体ウェハ Wに逆電荷を供給す る こ と によ り 、 静電吸着力を弱めてウェハ Wを脱離する こ と ができ る。 即ち、 ウェハ Wは半導体であるのでその内部を電 荷が自 由に動き回る こ とができ る。 そのため、 ウェハ Wにお いて、 静電吸着時には接近部位 P 1 に負の電荷が集中 してお り 、 また逆電荷の注入時には当該負電荷の集中 している箇所 に注入電荷が流れ込む。 中和量 (打ち消す負電荷量) と注入 量と は対応する ので逆電荷の注入制御が容易であ り 、 ウェハ
03 06541 According to the present embodiment, by supplying a reverse charge to the semiconductor wafer W, the electrostatic chucking force can be weakened and the wafer W can be detached. That is, since the wafer W is a semiconductor, the electric charge can move freely within the wafer W. For this reason, in the wafer W, negative charges are concentrated at the approach site P 1 during electrostatic attraction, and injected charges flow into a portion where the negative charges are concentrated when reverse charges are injected. Since the amount of neutralization (the amount of negative charge to cancel out) and the amount of injection correspond to each other, it is easy to control the injection of reverse charges, and the 03 06541
1 4 14
Wの脱離に適切なタイ ミ ングを作り 出すこ とができ る。 その 結果、 ウェハ Wの脱離動作が安定し、 ウェハ Wが支持ピン 5 1 から落下する或いは位置ずれを起こすなどの脱離異常を抑 える こ と ができる。 また、 微小な電流でも中和量と注入量と が対応する ので除電がスムーズに行われ、 このためスループ ッ トの向上を図る こ と ができ る。 Appropriate timing for W desorption can be created. As a result, the detachment operation of the wafer W is stabilized, and detachment abnormalities such as the wafer W dropping from the support pins 51 or causing a displacement can be suppressed. In addition, since the amount of neutralization and the amount of injection correspond to each other even with a small current, static elimination is performed smoothly, and therefore, throughput can be improved.
なお、 静電チャ ック 4 2 に逆電荷を注入して残留電荷を打 ち消すよ う にする こ と も考えられる。 しかし、 この場合、 静 電吸着時に絶縁層 4 5 の内部が どのよ う な分極状態になの力 明確に把握されてお らず、 更には逆電荷を注入しても、 その 電荷が絶縁層 4 5 内を移動 して接近部位 P 2 までた どり 着く 保証がない。 また注入した電荷以外にも結晶内から出て く る 電荷が存在する可能性もある。 従って、 接近部位 P 2 の正の 電荷を打ち消さなければ脱離異常を起こ さずにウェハ Wを脱 離する こ と が困難である。 このよ う な理由から静電チャ ック 4 2 に逆電荷を徐々 に注入してもなかなか脱離しない。 一方 単位時間あた り の電荷供給量 (電流) を大き く する と電気的 に中和される状態を直ぐに過ぎて表面に負の電荷が溜ま り 、 ウェハ Wを再度吸着して しま う。 このよ う に静電チャ ック 4 2 に逆電荷を供給する場合には、 逆電荷の供給制御が難しい 問題がある。 It is also conceivable to inject a reverse charge into the electrostatic chuck 42 to cancel the residual charge. However, in this case, it is not clearly understood what polarization state the inside of the insulating layer 45 has at the time of electrostatic adsorption, and even if a reverse charge is injected, the charge is not transferred to the insulating layer 4. There is no guarantee that you will move within 5 to reach the approaching site P2. In addition to the injected charges, there may be charges coming out of the crystal. Therefore, it is difficult to detach the wafer W without causing the detachment abnormality unless the positive charge of the approaching part P 2 is canceled. For this reason, even if the reverse charge is gradually injected into the electrostatic chuck 42, it does not easily desorb. On the other hand, when the charge supply amount (current) per unit time is increased, negative charge is accumulated on the surface immediately after being electrically neutralized, and the wafer W is adsorbed again. When supplying the reverse charge to the electrostatic chuck 42 in this way, there is a problem that it is difficult to control the supply of the reverse charge.
ウェハ Wに逆電荷を供給する方法は上述のもの限られない。 例えば、 残留電荷モニタ 7 で検出される残留電荷の単位時間 あた り の変化量に応 じて逆電荷を供給する こ と ができ る。 つ ま り 、 例えば、 変化量が大きい時は電圧を下げて逆電荷の供
給量を小さ く し、 また変化量が小さい時は逆電荷の供給量を 大き く する といつた制御 (フィ ー ドバック制御) を行っても よい。 この場合、 各処理毎に残留電荷量がばらついていても、 その残留電荷に見合 う微小電荷を供給でき る。 このため、 短 時間で静電吸着力を弱める こ と ができ、 且つ上述の場合と 同 様の効果を得る こ と ができ る。 更に、 例えば、 パルスジェネ レータ を用いてパルス状に逆電荷を供給する よ う に しても よ い。 The method for supplying the reverse charge to the wafer W is not limited to the method described above. For example, reverse charges can be supplied in accordance with the amount of change in the residual charge detected by the residual charge monitor 7 per unit time. That is, for example, when the amount of change is large, the voltage is lowered to supply a reverse charge. When the supply amount is small, or when the change amount is small, the control (feedback control) may be performed by increasing the supply amount of the reverse charge. In this case, even if the amount of residual charge varies in each process, a minute charge corresponding to the residual charge can be supplied. Therefore, the electrostatic attraction force can be weakened in a short time, and the same effect as in the above case can be obtained. Further, for example, the reverse charge may be supplied in a pulse form using a pulse generator.
また、 逆電荷を供給 して完全にウェハ wの接近部位 P 1 に 集ま っている負の電荷を完全に打ち消 した後、 更に逆電荷の 供給を続ける よ う に しても よい。 この場合、 ウェハ Wが正電 荷を帯びるので、 静電チャ ック 4 2 の正電荷と の間で互いに 反発するクー ロ ン力 (斥力) が作用 し、 支持ピン 5 1 の押し 上げ力を要せずウェハ Wを脱離する こ とができ る。 なお、 逆 電荷の供給量が多すぎる と斥力が強く 作用 してウェハ Wが所 定の載置位置から外れて しま う 可能性がある。 このため、 予 め試験を行って逆電荷の供給を停止する (ス ィ ッ チ S W 2 を 接地部に切 り 替える) タイ ミ ング (残留電荷の設定値) を決 めておく のが好ま しい。 Alternatively, the supply of the reverse charge may completely cancel the negative charges collected at the approaching part P 1 of the wafer w completely, and then the supply of the reverse charge may be continued. In this case, since the wafer W bears a positive charge, a Coulomb force (repulsive force) repelling between the positive charge of the electrostatic chuck 42 and the positive force of the electrostatic chuck 42 acts, and the pushing force of the support pin 51 is reduced. The wafer W can be detached without any need. If the supply amount of the reverse charge is too large, the repulsive force acts so strongly that the wafer W may deviate from the predetermined mounting position. For this reason, it is preferable to determine the timing (set value of the residual charge) to stop the supply of the reverse charge by performing a preliminary test (switch the switch SW 2 to the ground part). .
また、 ウェハ Wに逆電荷を供給するため、 昇降部材の支持 ピン 5 1 以外の部材を使用する こ とができ る。 例えば、 電荷 供給用の低抵抗の電荷供給部材を別途設ける よ う に しても よ い。 こ の よ う な構成であっても上述と 同様の効果を得る こ と ができ る。 Further, in order to supply a reverse charge to the wafer W, a member other than the support pins 51 of the elevating member can be used. For example, a low-resistance charge supply member for charge supply may be separately provided. Even with such a configuration, the same effect as described above can be obtained.
また、 逆電荷の供給を停止して脱離動作へ移行する タイ ミ
PC蒙襄 541 In addition, the supply of the reverse charge is stopped and the operation shifts to the desorption operation. PC Mengxiang 541
1 6 ングは、 残留電荷モニタ 7 によ る ものに限定されない。 例え ば、 予め測定しておいた時間になる と脱離動作が開始される よ う に、 制御部 8 にタイマを設けた構成と しても よい。 また、 被処理基板は半導体ウェハ Wに限られず、 導体また半導体の 裏面を有する ものであれば、 他の被処理基板に本実施の形態 を適用する こ と ができ る。 16 is not limited to the one by the residual charge monitor 7. For example, a configuration may be adopted in which a timer is provided in the control unit 8 so that the desorption operation starts at a time measured in advance. In addition, the substrate to be processed is not limited to the semiconductor wafer W, and the present embodiment can be applied to other substrates to be processed as long as they have a conductor or a back surface of a semiconductor.
く第 2 の実施の形態 > Second Embodiment>
図 4 は、 本発明の第 2 の実施の形態に係る半導体処理装置 と して、 エ ッチング装置 (真空処理装置) を示す縦断面図で ある。 FIG. 4 is a longitudinal sectional view showing an etching apparatus (vacuum processing apparatus) as a semiconductor processing apparatus according to a second embodiment of the present invention.
図 4 に示すよ う に、 この処理装置は、 真空容器から形成さ れた処理室 1 0 2 を有する。 真空容器即ち処理室 1 0 2 は、 例えば、 アルミ ニウムによ り気密構造をなすよ う に形成され 且つ接地される。 処理室 1 0 2 内で天井には、 接地された上 部電極を兼用するシャ ワー へッ ド 1 2 1 が配設される。 処理 室 Ί 0 2 内で床上には、 下部電極を兼ねる载置台 1 0 3 がシ ャ ヮ一へッ ド 1 2 1 と対向 して配設される。 As shown in FIG. 4, this processing apparatus has a processing chamber 102 formed from a vacuum vessel. The vacuum chamber or processing chamber 102 is formed of, for example, aluminum so as to form an airtight structure and is grounded. The ceiling in the processing chamber 1 0 within 2, head 1 2 1 is arranged to shower that also serves as a top of the electrode which is grounded. The floor in the processing chamber I 0 within 2, is disposed in head 1 2 1 and the counter to载置table 1 0 3 starve catcher Wa one also serving as a lower electrode.
処理室 1 0 2 の底面には、 真空排気路である排気管 1 2 0 を介して、 例えば、 ターボ分子ポンプや ドライ ポンプな ど力 らなる真空排気部 1 1 9 に接続された排気口が形成される。 処理室 1 0 2 の側壁には、 被処理基板例えば、 ウェハ Wを搬 入出するための開口部 1 2 2 、 1 2 3 が形成され、 これはゲ ー トバルブ Gによ り 開閉自在と される。 側壁の外方には開口 部 1 2 2 、 1 2 3 を上下に挟む位置に、 例えば、 夫々 リ ング 状をなす永久磁石 1 2 4 、 1 2 5 が配設される。
PC確篇 541 On the bottom of the processing chamber 102, an exhaust port connected to a vacuum evacuation unit 119 such as a turbo molecular pump or a dry pump via an exhaust pipe 120 as a vacuum evacuation path is provided. It is formed. Openings 122, 123 for loading and unloading a substrate to be processed, for example, a wafer W, are formed in the side wall of the processing chamber 102, which can be opened and closed by a gate valve G. . Outside the side walls, for example, ring-shaped permanent magnets 124 and 125 are arranged at positions vertically sandwiching the openings 122 and 123 respectively. PC sure 541
1 7 シャ ワーへッ ド 1 2 1 の上部には、 ガス供給管 1 2 7 を介 して、 反応ガスや不活性ガスな どの処理ガスを供給するガス 供給部 1 2 9 が接続される。 また、 シャ ワーヘッ ド 1 2 1 に は、 載置台 1 0 3 上のウェハ Wに対向する位置に多数の孔部 1 2 6 が形成される。 ガス供給管 1 2 7 から供給される処理 ガスは、 シャ ワーへッ ド 1 2 1 内に形成された処理ガス流路 1 2 8 で拡散し、 孔部 1 2 6 を介 してウェハ Wの表面へ均一 に供給される。 A gas supply unit 129 for supplying a processing gas such as a reaction gas or an inert gas is connected to an upper portion of the shower head 127 via a gas supply pipe 127. Further, a large number of holes 126 are formed in the shower head 122 at positions facing the wafer W on the mounting table 103. The processing gas supplied from the gas supply pipe 127 is diffused in the processing gas flow path 128 formed in the shower head 121, and the processing gas is supplied to the wafer W through the hole 126. It is uniformly supplied to the surface.
载置台 1 0 3 は、 例えば、 アルミ ニ ウムカゝらなる円柱状の ベース 1 3 1 を含む。 ベー ス 1 3 1 は処理室 1 0 2 の床上に 絶縁部材 1 3 1 a によ り絶縁された状態で配設される。 ベー ス 1 3 1 には、 コ ンデンサ C I 1 及びコイル L I 1 を介 して バイアス用高周波を印加するための高周波電源 1 3 3 が接続 される。 載置台 1 0 3 の側壁には、 排気時においてウェハ W の周方向に均一な排気流を形成するためのバッフル板 1 3 4 が配設される。 バッフル板 1 3 4 は載置台 1- 0 3 から処理室 1 0 2 の内壁面近傍へと延びる リ ング状の板状部材からなる。 ベー ス 1 3 1 の上面上には、 ウェハ Wを概ね水平に吸着保 持するための静電チャ ック 1 0 4 が配設される。 静電チヤ ッ ク 1 0 4 の周囲を囲むよ う に、 フォーカス リ ング 1 3 2 が配 設される。 静電チャ ック 1 0 4 は、 導電性を有するシー ト状 のチャ ック電極 1 4 1 の表裏を、 誘電体である、 例えば、 ポ リ イ ミ ド、 アルミナ、 或いは窒化アルミ ニ ウムな どから なる 絶縁層 1 4 2 で挟んだ構成を有する。 チャ ック電極 1 4 1 は、 スィ ツチ S W 1 1 を介して直流電源 1 4 4 と接地部と に選択
的に接続される。 直流電源 1 4 4 力 らチャ ック電極 1 4 1 に 直流電圧 (チャ ック電圧) を印加する と、 静電チャ ック 1 0 4 と ウェハ Wと の間にクーロ ン力が発生し、 これによ り ゥェ ハ Wを載置台 1 0 3 上に吸着保持する こ と ができ る。 ウェハ Wの吸着を解除する時には、 スィ ッチ S W 1 1 を切 り 替えて 静電チャ ック 1 0 4近傍の電荷を接地部に逃がす。 The mounting table 103 includes, for example, a cylindrical base 1311 made of aluminum carbide. The base 13 1 is disposed on the floor of the processing chamber 10 2 in a state of being insulated by the insulating member 13 1 a. A high frequency power supply 133 for applying a high frequency for bias is connected to the base 13 1 via a capacitor CI 1 and a coil LI 1. On the side wall of the mounting table 103, a baffle plate 134 for forming a uniform exhaust flow in the circumferential direction of the wafer W at the time of exhaust is disposed. The baffle plate 134 is a ring-shaped plate member extending from the mounting table 1-03 to the vicinity of the inner wall surface of the processing chamber 102. An electrostatic chuck 104 for adsorbing and holding the wafer W substantially horizontally is provided on the upper surface of the base 13 1. A focus ring 132 is provided so as to surround the periphery of the electrostatic chuck 104. The electrostatic chuck 104 is made of a dielectric material, for example, polyimide, alumina, or aluminum nitride, on both sides of the conductive sheet-like chuck electrode 141. It has a structure sandwiched between insulating layers 142. Chuck electrode 144 is selected between DC power supply 144 and ground via switch SW 11 Connected. When a DC voltage (chuck voltage) is applied from the DC power supply 144 to the chuck electrode 1441, a Coulomb force is generated between the electrostatic chuck 104 and the wafer W. Thus, the wafer W can be suction-held on the mounting table 103. When releasing the suction of the wafer W, the switch SW11 is switched to release the electric charge near the electrostatic chuck 104 to the ground.
チャ ッ ク電極 1 4 1 と直流電源 1 4 4 と を結ぶ回路の途中 には残留電荷監視手段である残留電荷モニタ 1 4 5 が配設さ れる。 残留電荷モニタ 1 4 5 を介 して制御部 1 0 7 によ り 、 静電チャ ッ ク 1 0 4 の除電を行 う 際に、 その進行具合を下記 の態様で把握でき る。 即ち、 例えば、 スィ ッチ S W 1 1 を直 流電源 1 4 4 に接続した時に流れる電荷量 Q 1 を記憶する。 次に、 スィ ッチ S W 1 1 を接地部側に切 り 替えた時に流れる 電荷量 Q 2 を測定する。 そ して、 電荷量 Q 1 から電荷量 Q 2 を差し引き ( Q 1 — Q 2 ) 、 静電チャ ック 1 0 4 に残留 して レヽる電荷を求める。 A residual charge monitor 144 serving as a residual charge monitoring means is provided in the circuit connecting the chuck electrode 144 and the DC power supply 144. The control unit 107 via the residual charge monitor 144 can grasp the progress of the electrostatic chuck 104 in the following manner when the static electricity is removed from the electrostatic chuck 104. That is, for example, the charge amount Q 1 flowing when the switch SW 11 is connected to the DC power supply 144 is stored. Next, the amount of charge Q 2 flowing when the switch SW 11 is switched to the ground side is measured. Then, the charge amount Q 2 is subtracted from the charge amount Q 1 (Q 1 −Q 2), and the charge remaining in the electrostatic chuck 104 is obtained.
载置台 1 0 3 の内部には、 外部の搬送アーム (図示せず) と の間でウェハ Wの受け渡 しを行 う ため、 昇降部材 1 0 5 が 配設される。 昇降部材 1 0 5 は、 処理の終了後においてゥェ ハ Wを静電チャ ック 1 0 4 の表面 1 4 3 力、ら引き離すための 脱離手段を構成する。 昇降部材 1 0 5 は、 複数例えば、 4本 の支持ピン 1 5 3 を含み、 これらは载置台 1 0 3 内に形成さ れた孔部 1 5 5 内に配設される。 支持ピン 1 5 3 は鉛直方向 に延び、 載置台 1 0 3 内で連結部材 1 5 2 を介して共通のシ ャ フ ト 1 5 1 に取り 付けられる。 シャ フ ト 1 5 1 は、 例えば、
エアシリ ンダーやボールネジ機構な どからなる駆動機構 1 5 4 によ り 昇降され、 これによ り 支持ピ ン 1 5 3 が載置台 1 0 3 の表面 1 4 3 に対して突没する。 An elevating member 105 is provided inside the mounting table 103 in order to transfer the wafer W to and from an external transfer arm (not shown). The elevating member 105 constitutes a detaching means for detaching the wafer W from the surface 144 of the electrostatic chuck 104 after the processing is completed. The elevating member 105 includes a plurality of, for example, four support pins 153, and these are disposed in a hole 155 formed in the mounting table 103. The support pin 1553 extends in the vertical direction, and is attached to the common shaft 151 via the connecting member 152 in the mounting table 103. Shaft 15 1 is, for example, It is moved up and down by a drive mechanism 154 including an air cylinder and a ball screw mechanism, so that the support pin 153 protrudes and sinks against the surface 144 of the mounting table 103.
図 5 は、 図 4 図示の装置における ウェハ W及び静電チヤ ッ ク 1 0 4 と支持ピン 1 5 3 と の位置関係を示す概略平面図で ある。 図 5 に示すよ う に、 支持ピ ン 1 5 3 は、 例えば、 静電 チャ ック 1 0 4 の中心 1 5 6 (ウェハ Wの中心と もなる) ら等間隔且つ周方向に沿 う よ う な位置に配設される。 また、 各支持ピ ン 1 5 3 は先端の高さが等しいため、 上昇時には表 面 1 4 3 に载置された ウェハ Wを水平姿勢のまま持ち上げる こ と ができ る。 FIG. 5 is a schematic plan view showing the positional relationship between the wafer W, the electrostatic chuck 104 and the support pins 153 in the apparatus shown in FIG. As shown in FIG. 5, the support pins 153 are, for example, equidistant from the center 156 of the electrostatic chuck 104 (also the center of the wafer W) and along the circumferential direction. It is located at such a location. In addition, since each support pin 153 has the same height at the tip, when ascending, the wafer W placed on the surface 144 can be lifted in a horizontal posture.
昇降部材 1 0 5 は、 静電チャ ッ ク 1 0 4 によ る吸着解除後 における除電手段を兼ねる。 詳細は後述するが、 例えば、 シ ャ フ ト 1 5 1 の上端部に設けた圧電素子 1 6 1 によ り支持ピ ン 1 5 3 を振動させ、 かかる状態でウェハ Wと接触させる こ とで静電チャ ック 1 0 4及びウェハ W双方の除電を促す。 圧 電素子 1 6 1 はコ ンデンサ C 1 2 及びコイル L 1 2 を介 して 交流電源 1 6 2 に接続される。 また、 ベース 1 3 1 及ぴ圧電 素子 1 6 1 は夫々共通の抵抗 R l 1 及びスィ ッチ S W 1 2 を 介して接地される。 なお、 駆動機構 1 5 4及び圧電素子 1 6 1 の動作、 ス ィ ッチ S W 1 1 、 S W 1 2 の切 り 替えなどは、 制御部 1 0 7 によ り 制御される。 The elevating member 105 also functions as a static eliminator after the electrostatic chuck 104 releases the suction. Although details will be described later, for example, the support pins 15 3 are vibrated by the piezoelectric element 16 1 provided at the upper end of the shaft 15 1, and are brought into contact with the wafer W in such a state. Encourages static elimination of both electrostatic chuck 104 and wafer W. The piezoelectric element 16 1 is connected to an AC power supply 16 2 via a capacitor C 12 and a coil L 12. The base 13 1 and the piezoelectric element 16 1 are grounded via a common resistor R 11 and a switch SW 12. The operation of the driving mechanism 154 and the piezoelectric element 161 and the switching of the switches SW11 and SW12 are controlled by the control unit 107.
次に、 制御部 1 0 7 の制御下で行われる、 図 4 図示の処理 装置の作用について説明する。 先ず、 ゲー トバルブ Gを開き、 開 口部 1 2 2 (または 1 2 3 ) を介して、 隣接する真空雰囲
気に設定されたロー ドロ ック室 (図示せず) と処理室 1 0 2 と を連通させる。 次に、 こ のロー ドロ ック室から搬送アーム (図示せず) に よ り 被処理基板、 こ の例では半導体ウェハ (シ リ コ ンウェハ) Wを処理室 1 0 2 内に搬入する。 次に、 搬送アーム と支持ピン 1 5 3 (昇降部材 1 0 5 ) と の協働動 作によ り 載置台 1 0 3 の上につま り 静電チャ ック 1 0 4 の表 面 1 4 3 上にウェハ Wを載置する。 次に、 スィ ッチ S W 1 1 を直流電源 1 4 4側に切 り 替えて静電チヤ ック 1 0 4 をオン に し、 ウェハ Wを載置台 1 0 3 の表面に吸着する。 Next, the operation of the processing device shown in FIG. 4 performed under the control of the control unit 107 will be described. First, open the gate valve G and open the adjacent vacuum atmosphere through the opening 122 (or 123). The load chamber (not shown) that is set to the desired condition and the processing chamber 102 are communicated. Next, a substrate to be processed, in this example, a semiconductor wafer (silicon wafer) W, is carried into the processing chamber 102 from the load lock chamber by a transfer arm (not shown). Next, the transfer arm and the support pin 15 3 (elevating member 105) cooperate with each other to put the surface on the mounting table 103, that is, the surface 14 of the electrostatic chuck 104. 3 Place wafer W on top. Next, the switch SW 11 is switched to the DC power supply 144 side to turn on the electrostatic chuck 104, and the wafer W is attracted to the surface of the mounting table 103.
一方、 搬送アームを処理室 1 0 2から退出させた後、 ゲー トバルブ Gを閉 じ、 ー且排気管 1 2 0 を介 して処理室 1 0 2 内を真空引きする。 次に、 真空引 き しなが ら、 シャ ワーへッ ド 1 2 1 カゝら処理ガス、 例えば、 C 4 F 8 ガス を ウェハ Wに 供給し、 処理室 1 0 2 内の圧力が例えば、 1 〜 5 0 P a に維 持される よ う に調節を行う。 次に、 高周波電源 1 3 3 によ り 下部電極をなす载置台 1 0 3 と上部電極をなすシャ ワーへッ ド 1 2 1 と の間に高周波電圧を印加して処理ガスをプラズマ 化する と共に、 磁石 1 2 4、 1 2 5 によ り プラズマを高密度 化する。 このよ う に して生成したプラズマを使用 してウエノ、 W表面の例えば、 シリ コ ン酸化膜をエッチングする。 所定時 間のエッチングを行った後、 高周波電源 1 3 3 を停止する。 そ して、 静電チャ ック 1 0 4 から ウェハ Wを脱離させる工程 へと移行する。 On the other hand, after the transfer arm is withdrawn from the processing chamber 102, the gate valve G is closed, and the inside of the processing chamber 102 is evacuated via the exhaust pipe 120. Next, a processing gas such as C 4 F 8 gas, for example, C 4 F 8 gas is supplied to the wafer W while evacuating, and the pressure in the processing chamber 102 is set to, for example, Adjust so that it is maintained at 1 to 50 Pa. Next, a high-frequency voltage is applied between the mounting table 103 serving as the lower electrode and the shower head 122 serving as the upper electrode by the high-frequency power supply 133 to convert the processing gas into plasma. The density of the plasma is increased by the magnets 124 and 125. Using the plasma generated in this way, for example, a silicon oxide film on the surface of the Ueno and W surfaces is etched. After performing the etching for a predetermined time, the high frequency power supply 133 is stopped. Then, the process proceeds to a step of detaching the wafer W from the electrostatic chuck 104.
図 6 は、 図 4 図示の装置において、 制御部 1 0 7 の制御下 で静電チャ ック 1 0 4 から ウェハ Wを脱離させる方法を示す
フローチャー トである。 図 7 A、 B、 Cは、 ウェハ Wを脱離 させる方法を工程順に示す断面図である。 FIG. 6 shows a method of detaching the wafer W from the electrostatic chuck 104 under the control of the control unit 107 in the apparatus shown in FIG. It is a flowchart. 7A, 7B, and 7C are cross-sectional views illustrating a method of detaching the wafer W in the order of steps.
先ず、 ス ィ ッ チ S W 1 1 を接地部側に切 り 替える と共にス イ ッチ S W 1 2 を閉 じ、 静電チャ ック 1 0 4 の除電を行う。 また、 圧電素子 1 6 1 に対して電力供給を開始して圧電素子 1 6 1 を予め設定された振動周波数で発振させ、 昇降部材 1 0 5 を振動させる (ステ ップ S 1 1 ) 。 この時、 昇降部材 1 0 5 の高さは、 図 7 Aに示すよ う に、 支持ピ ン 1 5 3 の先端 が载置台 1 0 3 の内部に埋没する よ う に設定される。 圧電素 子 1 6 1 の振動周波数の値は、 ウェハのサイ ズ、 種類または ウェハ表面に形成される膜の種類、 或いは後述する ウェハ W と支持ピ ン 1 5 3 と の接触圧力な どによって変わる。 しかし、 こ の振動周波数の値は、 概ねウェハ Wが吸着面から動く こ と がな く 除電のみが進行する程度の範囲で設定される。 First, switch SW11 is switched to the ground side, and switch SW12 is closed to remove static electricity from electrostatic chuck 104. Further, the power supply to the piezoelectric element 161 is started, the piezoelectric element 161 is oscillated at a preset vibration frequency, and the lifting member 105 is oscillated (step S11). At this time, as shown in FIG. 7A, the height of the elevating member 105 is set such that the tip of the support pin 153 is buried inside the mounting table 103. The value of the vibration frequency of the piezoelectric element 161 varies depending on the size and type of the wafer, the type of the film formed on the wafer surface, or the contact pressure between the wafer W and the support pins 153 described later. . However, the value of the vibration frequency is set within a range where the wafer W does not move from the suction surface and only static elimination proceeds.
次に、 駆動機構 1 5 4 によ り 昇降部材 1 0 5 を上昇させる (ステップ S 1 2 ) 。 この際、 制御部 1 0 7 は、 ウェハ Wと 支持ピン 1 5 3 とが接触 したか否かを判断し (ス テ ッ プ S 1 3 ) 、 こ の接触が得られるまで、 昇降部材 1 0 5 を継続して 上昇させる (ステ ップ S 1 4 ) 。 これに代え、 制御部 1 0 7 は、 ウェハ Wと支持ピ ン 1 5 3 と が接触する よ う に、 予め設 定した量だけ昇降部材 1 0 5 を継続して上昇させる こ と もで さ る。 Next, the lifting member 105 is raised by the drive mechanism 154 (step S12). At this time, the control unit 107 determines whether or not the wafer W has come into contact with the support pins 153 (step S13), and until the contact is obtained, the elevating member 10 5 is continuously increased (step S14). Alternatively, the control unit 107 can continuously raise the elevating member 105 by a predetermined amount so that the wafer W and the support pin 1553 come into contact with each other. You.
ウェハ Wと支持ピ ン 1 5 3 とが所定の接触圧で接触 した時 点 (或いは昇降部材 1 0 5 の上昇が予め設定した量と なった 時点) で、 昇降部材 1 0 5 の上昇を停止する一方、 圧電素子
1 6 1 によ る振動を継続する (ステ ップ S 1 5 ) 。 従って、 図 7 B に示すよ う に ウェハ Wの表面は支持ピン 1 5 3 を介し て振動し、 その結果、 後に詳述する メ カニズムによ り表面 1 4 3 近傍の残留電荷が徐々 に放電される。 制御部 1 0 7 は、 ウェハ Wと支持ピン 1 5 3 とが接触する前から残留電荷モニ タ 1 4 5 によ り 残留電荷を監視し、 こ の残留電荷と予め決め ておいた設定値と を比較する (ステ ップ S 1 6 ) 。 交流電源 1 6 2から圧電素子 1 6 1 への電力供給は、 残留電荷が設定 値以下にな る まで継続 し、 放電を促進する (ステ ップ S 1 7 ) 0 When the wafer W comes into contact with the support pin 153 at a predetermined contact pressure (or when the lift of the lifting member 105 reaches a predetermined amount), the lifting of the lifting member 105 stops. While the piezoelectric element The vibration according to 16 1 is continued (step S 15). Therefore, as shown in FIG. 7B, the surface of the wafer W vibrates through the support pins 15 3, and as a result, the residual charges near the surface 14 3 are gradually discharged by the mechanism described later. Is done. The control unit 107 monitors the residual charge by the residual charge monitor 144 before the wafer W comes into contact with the support pins 153, and determines the residual charge and a predetermined set value. (Step S16). The power supply from the AC power supply 162 to the piezoelectric element 161 continues until the residual charge becomes equal to or less than the set value, and discharge is promoted (Step S17) 0
残留電荷が設定値以下になる と 、 駆動機構 1 5 4 によ り支 持ピ ン 1 5 3 を再ぴ上昇させ、 ウェハ Wを突き上げる よ う に して載置台 1 0 3 力 ら脱離させる (ステ ップ S 1 8 ) 。 なお、 残留電荷の設定値と は、 ウェハ Wの裏面の負の電荷が完全に 中和された時の レベルとする こ と ができる。 或いは、 この設 定値は、 支持ピ ン 1 5 3 でウェハ Wを突き上げても脱離異常 が生じない程度の吸着力を残す程度に除電された時のレベル とする こ と ができ る。 When the residual charge becomes equal to or less than the set value, the supporting pins 15 3 are raised again by the driving mechanism 15 4 and detached from the mounting table 10 3 so as to push up the wafer W. (Step S18). It should be noted that the set value of the residual charge can be a level when the negative charge on the back surface of the wafer W is completely neutralized. Alternatively, this set value can be set to a level at which the charge is removed to the extent that the suction force that does not cause the detachment abnormality even when the wafer W is pushed up by the support pin 153 is left.
こ う して支持ピン 1 5 3 を所定の高さまで上昇させた時点 で駆動機構 1 5 4 を停止させる。 また、 圧電素子 1 6 1 への 電力供給を停止 し、 支持ピ ン 1 5 3 の振動を停止させる (ス テツプ S 1 9 : 図 7 C ) 。 しかる後、 搬入時と逆の順序でゥ ェハ Wを処理室 1 0 2 から搬出する。 The driving mechanism 154 is stopped when the support pin 153 is raised to a predetermined height. Also, the power supply to the piezoelectric element 161 is stopped, and the vibration of the support pin 153 is stopped (step S19: Fig. 7C). Thereafter, the wafer W is unloaded from the processing chamber 102 in the reverse order of the loading.
図 8 は、 図 4 図示の装置における、 ウェハ Wと静電チヤ ッ ク 1 0 4 と の間の電気的な関係を示す拡大断面図である。 図
4図示の装置における、 ウェハ Wを脱離する際の除電のメ カ ニズムについて図 8 を参照 して説明する。 FIG. 8 is an enlarged cross-sectional view showing an electrical relationship between the wafer W and the electrostatic chuck 104 in the apparatus shown in FIG. Figure 4 The mechanism of static elimination when the wafer W is detached in the illustrated apparatus will be described with reference to FIG.
静電チャ ッ ク 1 0 4 の表面 1 4 3及びウェハ Wの裏面側は、 微視的に捉えれば図 8 に示すよ う に両者共に凹凸を有する。 この両者の凹凸が接近する接近部位 P 1 、 P 2の近傍では電 荷 (例えば、 ウェハ側の負電荷 と 静電チャ ッ ク側の正電荷 と) の結合力が強く 、 こ こ に多く の電荷が集まって強い吸着 力を生じている と考えられる。 このよ う な状態で、 静電チヤ ック 1 0 4 の正電荷と ウェハ Wの負電荷とが互いに引き合う クー ロ ン力 (引力) が作用 してウェハ Wは静電チャ ック 1 0 4 に静電吸着される。 The surface 144 of the electrostatic chuck 104 and the back side of the wafer W both have irregularities as shown in FIG. 8 when viewed microscopically. In the vicinity of the approaching portions P 1 and P 2 where the two irregularities approach, the binding force of the electric charge (for example, the negative charge on the wafer side and the positive charge on the electrostatic chuck side) is strong, and many It is considered that the charges gathered to generate a strong adsorption force. In such a state, a Coulomb force (attraction), in which the positive charge of the electrostatic chuck 104 and the negative charge of the wafer W attract each other, acts, and the wafer W becomes electrostatic chuck 104. Is electrostatically attracted.
従って、 ウェハ Wに振動を与え、 接近部位 P l 、 P 2 の間 隔を僅か (例えば、 ウェハ Wが脱離して跳ねる こ とがない程 度) に広げて、 当該領域における静電容量を小さ く する。 す る と 、 接近部位 P 1 の負電荷はク ーロ ン力の束縛から解放さ れ、 半導体であるシリ コ ンウェハ W内を自 由に動き回れる よ - う になる。 その結果、 負電荷は抵抗の低い方向に向かって放 電され、 ウェハ Wの裏面上を残留電荷が減少する。 なお、 上 記の負電荷の大部分はガス空間を介して処理室 1 0 2側に向 かい、 一部が載置台 1 0 3 (支持ピン 1 5 3やベース 1 3 1 等) カゝら接地部に向力 う もの と考えられる。 Therefore, the wafer W is vibrated to slightly increase the distance between the approaching parts Pl and P2 (for example, to such a degree that the wafer W does not detach and bounce), thereby reducing the capacitance in the area. Make Then, the negative charges at the approaching part P 1 are released from the constraint of the Coulomb force, and can freely move around in the silicon wafer W as a semiconductor. As a result, the negative charges are discharged in the direction of lower resistance, and the residual charges on the back surface of the wafer W decrease. Most of the above-mentioned negative charges go to the processing chamber 102 through the gas space, and a part of them is placed on the mounting table 103 (support pins 153, base 131, etc.). It is considered that it works toward the ground contact.
本実施の形態によれば、 静電チャ ック 1 0 4 に吸着 したゥ ェハ Wを脱離させるための昇降部材 1 0 5 に圧電素子 1 6 1 を設け、 支持ピン 1 5 3 を介して ウェハ Wを振動させる。 こ のため、 昇降部材 1 0 5 を上昇させる と共に表面 1 4 3 の近
傍に局在する残留電荷を分散して速やかに除電 (放電) を行 う こ とができ る。 その結果、 脱離異常を防ぎつつ、 短時間で ウェハ Wの脱離を行う こ と ができ る。 According to the present embodiment, the piezoelectric element 161 is provided on the elevating member 105 for detaching the wafer W adsorbed on the electrostatic chuck 104, and the piezoelectric element 161 is provided via the support pin 153. Vibrates the wafer W. For this reason, the lifting member 105 is raised and the vicinity of the surface 144 is raised. Discharge can be performed quickly by dispersing the residual charges located nearby. As a result, the wafer W can be desorbed in a short time while preventing abnormal desorption.
4本の支持ピ ン 1 5 3 を振動させているため、 ウェハ Wの 全面に概ね均一な振動を与える こ とができ、 均一な除電を行 う こ とができ る。 ウェハ Wの振動は支持ピ ン 1 5 3 を介 して ピンポイ ン ト で行われているため、 例えば、 載置台 1 0 3 の 表面全体で振動を与える場合に比べて、 振動に要するェネル ギ一が少な く て済む。 除電の開始に際 しては、 予め支持ピン Since the four support pins 15 3 are vibrated, substantially uniform vibration can be applied to the entire surface of the wafer W, and uniform charge removal can be performed. Since the vibration of the wafer W is performed at the pin points via the support pins 153, for example, the energy required for the vibration is smaller than when the vibration is applied to the entire surface of the mounting table 103. Need to be reduced. Before starting static elimination, support pins
1 5 3 を振動させているため、 振動の開始 (接触時) から終 了 (脱離時) までほぼ一貫して同様の条件を維持しなが ら除 電を行う こ とができ る。 なお、 圧電素子 1 6 1 における振動 周波数については常に一定である必要はなく 、 例えば、 ゥェ ハ Wと支持ピ ン 1 5 3 と の接触圧力に応じて徐々 に変化させ る よ う に しても よい。 Since 153 is vibrated, static elimination can be performed while maintaining similar conditions almost consistently from the start (at the time of contact) to the end (at the time of detachment) of the vibration. It should be noted that the vibration frequency of the piezoelectric element 161 does not need to be constant at all times. For example, the vibration frequency is gradually changed according to the contact pressure between the wafer W and the support pin 1553. Is also good.
残留電荷モニ タ 1 4 5 によ り 除電の進行状況を確認する よ う に しているため、 適切なタ イ ミ ングで脱離作業に移行する こ と ができ る。 なお、 除電から脱離作業へ移行するタイ ミ ン グは、 残留電荷モニ タ 1 4 5 によ る も の に限定されない。 例 えば、 予め測定しておいた時間になる と脱離作業が開始され る よ う に、 制御部 1 0 7 にタ イ マを設けた構成と しても よい。 Since the progress of static elimination is checked using the residual charge monitor 144, the desorption operation can be started at appropriate timing. Note that the timing of the transition from the charge removal to the desorption operation is not limited to the residual charge monitor 144. For example, a configuration may be adopted in which a timer is provided in the control unit 107 so that the desorption operation is started at a time measured in advance.
図 4 図示のルー ト と は別個に、 除電専用の低抵抗の接地部 線を設け、 これによ り 除電を促進する構成と しても よい。 圧 電素子 1 6 1 の設置個所は、 例えば、 支持ピ ン 1 5 3 の先端 部或いはその近傍であっても よい。 圧電素子 1 6 1 を支持ピ
ン 1 5 3 の先端に設ける場合には、 当該先端部の表面を絶縁 膜でコーティ ングする こ と が好ま しい。 ウェハ Wの脱離作業 を行う にあたっては、 処理室内の雰囲気が除電の促進に有利 な雰囲気と なる よ う に調節 しても よい。 この場合、 例えば、 処理室内に供給するパージガス の種類、 圧力または流量、 或 いは当該雰囲気の温度などを調節する こ とが可能である。 A low resistance grounding line dedicated to static elimination may be provided separately from the route shown in FIG. 4 to promote static elimination. The place where the piezoelectric element 16 1 is installed may be, for example, at or near the tip of the support pin 15 3. Supports piezoelectric element 1 6 1 When it is provided at the tip of the pin 15 3, it is preferable to coat the surface of the tip with an insulating film. In performing the desorption operation of the wafer W, the atmosphere in the processing chamber may be adjusted so as to be an atmosphere that is advantageous for facilitating charge removal. In this case, for example, the type, pressure or flow rate of the purge gas supplied into the processing chamber, or the temperature of the atmosphere can be adjusted.
上述の第 1 及び第 2 の実施の形態によれば、 チャ ック電極 への電圧印加を停止 した後、 昇降部材を上昇させなが ら被処 理基板の裏面に残留する電荷の除去と被処理基板の脱離とい う一連の工程をほぼ同時に行う こ とができ る。 このため静電 チャ ック における脱離異常を防ぎつつ、 脱離時間についても 大幅に短縮する こ と ができ る。 According to the above-described first and second embodiments, after the voltage application to the chuck electrode is stopped, the electric charge remaining on the rear surface of the substrate to be processed is removed while the elevating member is raised, and the electric charge is removed. A series of steps of detaching a processing substrate can be performed almost simultaneously. For this reason, the desorption time can be significantly reduced while preventing desorption abnormalities in the electrostatic chuck.
なお、 上述の第 1 及び第 2 の実施の形態において、 処理の 一例と してエッチングを挙げているが、 C V Dやア ツシング、 スパッタ処理な どの処理を行う場合にも これらの実施の形態 を適用する こ と ができ-る。 '
In the first and second embodiments described above, etching is mentioned as an example of the processing. However, these embodiments are also applied to the case of performing processing such as CVD, asshing, and sputtering. can do. '
Claims
1 . 導体または半導体の裏面を有する被処理基板に対して 半導体処理を施すための半導体処理装置であって、 1. A semiconductor processing apparatus for performing semiconductor processing on a substrate to be processed having a conductor or a semiconductor back surface,
前記被処理基板を収納する処理室と 、 A processing chamber for storing the substrate to be processed,
前記処理室内で前記被処理基板を載置する载置台と、 前記 載置台は前記被処理基板の前記裏面を静電吸着する静電チヤ ック を有する こ と と、 前記被処理基板の前記裏面が前記静電 チヤ ック によ り 静電吸着される時に前記裏面には第 1極性の 電荷が発生する こ と と、 A mounting table for mounting the substrate to be processed in the processing chamber; and the mounting table having an electrostatic chuck for electrostatically adsorbing the back surface of the substrate to be processed; and the back surface of the substrate to be processed. When the electrostatic chuck is electrostatically attracted by the electrostatic chuck, a charge of the first polarity is generated on the back surface;
前記載置台上から前記被処理基板を選択的に脱離させる脱 離部材と、 A detaching member for selectively detaching the substrate to be processed from the mounting table,
前記被処理基板の前記裏面に前記第 1 極性と は反対の第 2 極性の電荷を選択的に供給する電荷供給部 と、 A charge supply unit that selectively supplies a charge of a second polarity opposite to the first polarity to the back surface of the substrate to be processed;
前記脱離部材及び前記電荷供給部の動作を制御する制御部 と、 前記制御部は、 前記脱離部材によ り 前記載置台上から前 記被処理基板を脱離させる直前に、 前記電荷供給部によ り 前 記被処理基板の前記裏面に前記第 2極性の電荷を供給する こ と と ヽ A control unit configured to control the operation of the detachment member and the charge supply unit; and the control unit supplies the charge supply immediately before the detachment of the substrate to be processed from the mounting table by the detachment member. Supplying the charge of the second polarity to the back surface of the substrate to be processed by a unit;
を具備する。 Is provided.
2 . 前記脱離部材は導電性で且つ前記被処理基板の前記裏 面に接触しなが ら前記載置台上から前記被処理基板を脱離さ せる こ と と、 前記電荷供給部は前記脱離部材を介 して前記被 処理基板の前記裏面に前記第 2極性の電荷を供給する こ と と、 を具備する請求の範囲 1 に記載の処理装置。 2. The detachment member is electrically conductive and detaches the substrate to be processed from the mounting table while being in contact with the back surface of the substrate to be processed. 2. The processing apparatus according to claim 1, further comprising: supplying the second polarity charge to the rear surface of the substrate to be processed via a member.
3 . 前記電荷供給部は、 前記脱離部材を電源及び接地部に
選択的に接続するスィ ッチを具備し、 前記スィ ッチは前記制 御部によ り 制御される請求の範囲 2 に記載の処理装置。 3. The charge supply unit connects the detaching member to a power supply and a grounding unit. 3. The processing apparatus according to claim 2, further comprising a switch to be selectively connected, wherein the switch is controlled by the control unit.
4 . 前記載置台の残留電荷を監視するモニタ を更に具備し、 前記制御部は、 前記モニタ によ り 検出される前記残留電荷の 検出値が設定値以下と なった後、 前記脱離部材によ り 前記載 置台上から前記被処理基板を脱離させる請求の範囲 1 に記載 の処理装置。 4. The monitor further comprises a monitor for monitoring the residual charge of the mounting table, wherein the control unit controls the detachment member after the detection value of the residual charge detected by the monitor becomes equal to or less than a set value. 2. The processing apparatus according to claim 1, wherein the processing target substrate is detached from the mounting table.
5 . 前記静電チャ ッ ク のチャ ック電極を電源及ぴ接地部に 選択的に接続するスィ ッチを更に具備し、 前記モニタは前記 チャ ック電極と電源と の間に接続され、 前記チャ ック電極を 介して前記載置台の残留電荷を監視する請求の範囲 4 に記載 の処理装置。 5. A switch for selectively connecting a chuck electrode of the electrostatic chuck to a power supply and a grounding unit, wherein the monitor is connected between the chuck electrode and a power supply; The processing apparatus according to claim 4, wherein the residual charge on the mounting table is monitored via the chuck electrode.
6 . 前記制御部は、 前記電荷供給部によ り 前記被処理基板 の前記裏面に前記第 2極性の電荷を供給してから所定の時間 が経過した後、 前記脱離部材によ り 前記載置台上から前記被 処理基板を脱離させる請求の範囲 1 に記載の処理装置。 6. The control unit may further include a control unit configured to control the detachment member after a predetermined time has elapsed after supplying the charge of the second polarity to the back surface of the substrate to be processed by the charge supply unit. 2. The processing apparatus according to claim 1, wherein the substrate to be processed is detached from a table.
7 . 導体または半導体の裏面を有する被処理基板に対して 半導体処理を施すための半導体処理装置において、 載置台上 で前記被処理基板の前記裏面を静電吸着する静電チャ ックか ら脱離部材によ り 前記被処理基板を脱離させる方法であって、 こ こで、 前記被処理基板の前記裏面が前記静電チャ ック によ り 静電吸着される時に前記裏面には第 1 極性の電荷が発生す る こ と と、 前記方法は、 7. In a semiconductor processing apparatus for performing semiconductor processing on a substrate to be processed having a conductor or semiconductor back surface, a semiconductor substrate is removed from an electrostatic chuck that electrostatically attracts the back surface of the substrate to be processed on a mounting table. A method of detaching the substrate to be processed by a release member, wherein the back surface of the substrate to be processed is electrostatically attracted by the electrostatic chuck, and a second surface is formed on the rear surface. Generating a charge of one polarity; and
前記静電チヤ ック のチヤ ック電極への電圧の印加を停止す る工程と、
次に、 前記被処理基板の前記裏面に前記第 1 極性と は反対 の第 2極性の電荷を供給する工程と 、 Stopping the application of voltage to the chuck electrode of the electrostatic chuck; Next, supplying a charge of a second polarity opposite to the first polarity to the back surface of the substrate to be processed;
次に、 前記脱離部材によ り 前記載置台上から前記被処理基 板を脱離させる工程と 、 Next, a step of detaching the substrate to be processed from the mounting table by the detachment member,
を具備する。 Is provided.
8 . 前記脱離部材は導電性で且つ前記被処理基板の前記裏 面に接触しなが ら前記載置台上から前記被処理基板を脱離さ せ、 前記方法は、 前記脱離部材を介して前記被処理基板の前 記裏面に前記第 2極性の電荷を供給する請求の範囲 7 に記載 の方法。 8. The detaching member is electrically conductive and detaches the substrate to be processed from the mounting table while being in contact with the back surface of the substrate to be processed, and the method includes: 8. The method according to claim 7, wherein the second polarity charge is supplied to the back surface of the substrate to be processed.
9 . 前記載置台の残留電荷を監視し、 前記残留電荷の検出 値が設定値以下と なった後、 前記脱離部材によ り 前記載置台 上から前記被処理基板を脱離させる請求の範囲 7 に記載の方 法。 9. The residual charge on the mounting table is monitored, and after the detection value of the residual charge becomes equal to or less than a set value, the substrate is detached from the mounting table by the detachment member. The method described in 7.
1 0 . 前記被処理基板の前記裏面に前記第 2極性の電荷を 供給してから所定の時間が経過 した後、 前記脱離部材によ り 前記載置台上から前記被処理基板を脱離させる請求の範囲 7 に記載の方法。 10. After a predetermined time has elapsed since the supply of the second polarity charge to the back surface of the substrate, the substrate is detached from the mounting table by the detachment member. The method of claim 7.
1 1 . 被処理基板に対して半導体処理を施すための半導体 処理装置であって、 1 1. A semiconductor processing apparatus for performing semiconductor processing on a substrate to be processed,
前記被処理基板を収納する処理室と 、 A processing chamber for storing the substrate to be processed,
前記処理室内で前記被処理基板を載置する載置台と、 前記 載置台は前記被処理基板の裏面を静電吸着する静電チヤ ッ ク を有する こ と と 、 A mounting table for mounting the substrate to be processed in the processing chamber, and the mounting table having an electrostatic chuck for electrostatically adhering a back surface of the substrate to be processed;
前記載置台上から前記被処理基板を選択的に脱離させる脱
離部材と 、 The desorption for selectively detaching the substrate to be processed from the mounting table. Release member and,
前記昇降部材に振動を選択的に供給する振動供給部と、 前記脱離部材及び前記振動供給部の動作を制御する制御部 と、 前記制御部は、 前記脱離部材によ り 前記载置台上から前 記被処理基板を脱離させる直前に、 前記脱離部材と前記被処 理基板の前記裏面と を接触させた状態で前記振動供給部によ り 前記脱離部材を介 して前記被処理基板に前記振動を供給す る こ と と、 A vibration supply unit that selectively supplies vibration to the elevating member; a control unit that controls operations of the detachment member and the vibration supply unit; Immediately before the substrate to be detached from the substrate, the vibration supply unit causes the substrate to be detached from the substrate via the detachment member in a state where the detachment member is in contact with the back surface of the substrate to be treated. Supplying the vibration to the processing substrate;
を具備する。 Is provided.
1 2 . 前記脱離部材は導電性で且つ前記被処理基板を前記 裏面側から突き上げる こ と によ り 前記載置台上から前記被処 理基板を脱離させる請求の範囲 1 1 に記載の処理装置。 12. The process according to claim 11, wherein the detachment member is conductive and detaches the substrate to be processed from the mounting table by pushing up the substrate to be processed from the back surface side. apparatus.
1 3 . 前記振動供給部は前記脱離部材に取り付け られた圧 電素子を具備する請求の範囲 1 1 に記載の処理装置。 13. The processing apparatus according to claim 11, wherein the vibration supply unit includes a piezoelectric element attached to the detachable member.
1 4 . 前記脱離部材は前記載置台内で共通のシャ フ ト に接 続された複数の リ フ タ ピンを具備 し、 前記圧電素子は前記载 ' 置台内で前記共通のシャ フ ト に取り 付けられる請求の範囲 1 14. The detachment member includes a plurality of lifter pins connected to a common shaft in the mounting table, and the piezoelectric element is connected to the common shaft in the mounting table. Claims attached 1
3 に記載の処理装置。 3. The processing apparatus according to 3.
1 5 . 前記載置台の残留電荷を監視するモニタ を更に具備 し、 前記制御部は、 前記モユタ によ り 検出 される前記残留電 荷の検出値が設定値以下と なった後、 前記脱離部材によ り 前 記載置台上から前記被処理基板を脱離させる請求の範囲 1 1 に記載の処理装置。 15. The monitor further comprising: a monitor for monitoring a residual charge of the mounting table, wherein the control unit is configured to perform the desorption after the detection value of the residual charge detected by the monitor falls below a set value. 13. The processing apparatus according to claim 11, wherein the substrate is detached from the mounting table by a member.
1 6 . 前記静電チャ ック のチャ ック電極を電源及び接地部 に選択的に接続するス ィ ッ チを更に具備し、 前記モニ タは前
記チャ ッ ク電極と電源と の間に接続され、 前記チャ ッ ク電極 を介して前記載置台の残留電荷を監視する請求の範囲 1 5 に 記載の処理装置。 16. A switch for selectively connecting a chuck electrode of the electrostatic chuck to a power supply and a grounding unit, wherein the monitor is provided with a switch 16. The processing apparatus according to claim 15, wherein the processing apparatus is connected between the chuck electrode and a power supply, and monitors the residual charge of the mounting table via the chuck electrode.
1 7 . 被処理基板に対して半導体処理を施すための半導体 処理装置において、 載置台上で前記被処理基板の裏面を静電 吸着する静電チヤ ックから脱離部材によ り前記被処理基板を 脱離させる方法であって、 17. In a semiconductor processing apparatus for performing semiconductor processing on a substrate to be processed, the processing target is separated by a detachable member from an electrostatic chuck that electrostatically attracts the back surface of the substrate to be processed on a mounting table. A method of detaching a substrate,
前記静電チヤ ッ ク のチヤ ッ ク電極への電圧の印加を停止す る工程と 、 Stopping the application of voltage to the chuck electrode of the electrostatic chuck; and
次に、 前記脱離部材と前記被処理基板の前記裏面と を接触 させた状態で前記脱離部材を介して前記被処理基板に振動を 供給する工程と 、 Next, supplying vibration to the substrate to be processed via the detachment member in a state where the detachment member is brought into contact with the back surface of the substrate to be treated,
次に、 前記脱離部材によ り 前記載置台上から前記被処理基 板を脱離させる工程と、 Next, a step of detaching the substrate to be processed from the mounting table by the detachment member,
を具備する。 Is provided.
1 8 . 前記脱離部材は導電性で且つ前記被処理基板を前記 裏面側から突き上げる こ と によ り 前記載置台上から前記被処 理基板を脱離させる請求の範囲 1 7 に記載の方法。 18. The method according to claim 17, wherein the detachment member is conductive and detaches the substrate to be processed from the mounting table by pushing up the substrate to be processed from the back surface side. .
1 9 . 前記載置台の残留電荷を監視し、 前記残留電荷の検 出値が設定値以下と なった後、 前記脱離部材によ り 前記載置 台上から前記被処理基板を脱離させる請求の範囲 1 7 に記載 の方法。 19. The residual charge on the mounting table is monitored, and after the detection value of the residual charge becomes equal to or less than a set value, the substrate is detached from the mounting table by the detachment member. The method of claim 17.
2 0 . 前記脱離部材と前記被処理基板の前記裏面と が接触 する前に、 前記脱離部材への前記振動の供給を開始する請求 の範囲 1 7 に記載の方法。
20. The method according to claim 17, wherein the supply of the vibration to the detachment member is started before the detachment member comes into contact with the back surface of the substrate to be processed.
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002-154241 | 2002-05-28 | ||
JP2002154241A JP2003347395A (en) | 2002-05-28 | 2002-05-28 | Method of releasing electrostatic chuck and processing apparatus |
JP2002-198721 | 2002-07-08 | ||
JP2002198721A JP2004040046A (en) | 2002-07-08 | 2002-07-08 | Treatment apparatus and method for releasing electrostatic chuck |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2003100849A1 true WO2003100849A1 (en) | 2003-12-04 |
Family
ID=29585994
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2003/006541 WO2003100849A1 (en) | 2002-05-28 | 2003-05-26 | Semiconductor processor |
Country Status (1)
Country | Link |
---|---|
WO (1) | WO2003100849A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111863691A (en) * | 2019-04-26 | 2020-10-30 | 东京毅力科创株式会社 | Electricity elimination method and substrate processing device |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0513556A (en) * | 1991-07-01 | 1993-01-22 | Toshiba Corp | Electrostatic chuck |
JPH0645342U (en) * | 1992-11-26 | 1994-06-14 | 住友金属工業株式会社 | Sample holder |
US5382311A (en) * | 1992-12-17 | 1995-01-17 | Tokyo Electron Limited | Stage having electrostatic chuck and plasma processing apparatus using same |
JPH10163306A (en) * | 1996-12-04 | 1998-06-19 | Sony Corp | Method and apparatus for manufacturing semiconductor device |
JPH11233601A (en) * | 1998-02-10 | 1999-08-27 | Hitachi Ltd | Electrostatic suction device and sample processing device using the same |
JP2002134601A (en) * | 2000-10-27 | 2002-05-10 | Toto Ltd | Method and apparatus for removing subject to be attracted from electrostatic chuck |
JP2002252275A (en) * | 2001-02-27 | 2002-09-06 | Riipuru:Kk | Wafer conduction mechanism, conduction method and electron beam proximity aligner |
-
2003
- 2003-05-26 WO PCT/JP2003/006541 patent/WO2003100849A1/en unknown
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0513556A (en) * | 1991-07-01 | 1993-01-22 | Toshiba Corp | Electrostatic chuck |
JPH0645342U (en) * | 1992-11-26 | 1994-06-14 | 住友金属工業株式会社 | Sample holder |
US5382311A (en) * | 1992-12-17 | 1995-01-17 | Tokyo Electron Limited | Stage having electrostatic chuck and plasma processing apparatus using same |
JPH10163306A (en) * | 1996-12-04 | 1998-06-19 | Sony Corp | Method and apparatus for manufacturing semiconductor device |
JPH11233601A (en) * | 1998-02-10 | 1999-08-27 | Hitachi Ltd | Electrostatic suction device and sample processing device using the same |
JP2002134601A (en) * | 2000-10-27 | 2002-05-10 | Toto Ltd | Method and apparatus for removing subject to be attracted from electrostatic chuck |
JP2002252275A (en) * | 2001-02-27 | 2002-09-06 | Riipuru:Kk | Wafer conduction mechanism, conduction method and electron beam proximity aligner |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111863691A (en) * | 2019-04-26 | 2020-10-30 | 东京毅力科创株式会社 | Electricity elimination method and substrate processing device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7799238B2 (en) | Plasma processing method and plasma processing apparatus | |
TWI502681B (en) | Method and apparatus for reduction of voltage potential spike during dechucking | |
KR100978166B1 (en) | Plasma processing equipment | |
JP2005136350A (en) | Electrostatic chuck, plasma processing apparatus, and plasma processing method | |
JP2004531883A (en) | Semiconductor wafer lifting device and mounting method thereof | |
WO2004084298A1 (en) | Substrate holding mechanism using electrostaic chuck and method of manufacturing the same | |
JP2004047511A (en) | Method for releasing, method for processing, electrostatic attracting device, and treatment apparatus | |
JP2004014868A (en) | Electrostatic chuck and processing apparatus | |
JP3264391B2 (en) | Removal device for electrostatic attraction | |
JP4322484B2 (en) | Plasma processing method and plasma processing apparatus | |
US20080242086A1 (en) | Plasma processing method and plasma processing apparatus | |
JPH09120988A (en) | Plasma processing method | |
JP4346877B2 (en) | Electrostatic adsorption device and processing device | |
JP2009054746A (en) | Electrostatic chuck, and electrostatic chucking method | |
US20090301516A1 (en) | Substrate transfer device and cleaning method thereof and substrate processing system and cleaning method thereof | |
JP2004040047A (en) | Treatment apparatus and method for releasing material to be released from electrostatic chuck | |
JP2015095580A (en) | Substrate processing device and method for separating substrate | |
JP4060941B2 (en) | Plasma processing method | |
JPH06302678A (en) | Electrostatic chuck | |
JP2004040046A (en) | Treatment apparatus and method for releasing electrostatic chuck | |
JPH07321097A (en) | Treating device and washing method for ring body or baffle board used in the treating device | |
JP2003347395A (en) | Method of releasing electrostatic chuck and processing apparatus | |
WO2003100849A1 (en) | Semiconductor processor | |
JP3162272B2 (en) | Plasma processing method | |
JPH11111830A (en) | Electrostatic sucking device and method, and method and device for treatment apparatus using them |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): KR US |