WO2003038900A1 - Image displaying method and image displaying device - Google Patents

Image displaying method and image displaying device Download PDF

Info

Publication number: WO2003038900A1
Authority: WO; WIPO (PCT)
Prior art keywords: semiconductor layer; image displaying; type semiconductor; diode; memory cell
Prior art date: 2001-10-31

Application number

PCT/JP2002/011248

Other languages

English (en)

French (fr)

Inventor

Kohji Kiramura

Toshio Sunaga

Hisatada Miyatake

Original Assignee

International Business Machines Corporation

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2001-10-31

Filing date

2002-10-29

Publication date

2003-05-08

2002-10-29 Application filed by International Business Machines Corporation filed Critical International Business Machines Corporation

2002-10-29 Priority to US10/494,479 priority Critical patent/US7084437B2/en

2002-10-29 Priority to EP02777998A priority patent/EP1463118B1/en

2002-10-29 Priority to KR1020047000374A priority patent/KR100641667B1/ko

2002-10-29 Priority to JP2003541056A priority patent/JP4072125B2/ja

2002-10-29 Priority to CA002462940A priority patent/CA2462940C/en

2002-10-29 Priority to MXPA04004099A priority patent/MXPA04004099A/es

2003-05-08 Publication of WO2003038900A1 publication Critical patent/WO2003038900A1/ja

Links

239000004065 semiconductor Substances 0.000 abstract 5
239000000758 substrate Substances 0.000 abstract 2
238000002955 isolation Methods 0.000 abstract 1
230000003071 parasitic effect Effects 0.000 abstract 1

Classifications

- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
- H10B61/10—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having two electrodes, e.g. diodes or MIM elements
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
- G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment

Landscapes

Engineering & Computer Science (AREA)
Computer Hardware Design (AREA)
Mram Or Spin Memory Techniques (AREA)
Semiconductor Memories (AREA)
Hall/Mr Elements (AREA)
Element Separation (AREA)
Electrodes Of Semiconductors (AREA)
Thin Film Transistor (AREA)

PCT/JP2002/011248 2001-10-31 2002-10-29 Image displaying method and image displaying device WO2003038900A1 (en)

Priority Applications (6)

Application Number	Priority Date	Filing Date	Title
US10/494,479 US7084437B2 (en)	2001-10-31	2002-10-29	Semiconductor device
EP02777998A EP1463118B1 (en)	2001-10-31	2002-10-29	Magnetic random access memory (MRAM)
KR1020047000374A KR100641667B1 (ko)	2001-10-31	2002-10-29	반도체 장치 및 그 제조 방법
JP2003541056A JP4072125B2 (ja)	2001-10-31	2002-10-29	半導体装置およびその製造方法
CA002462940A CA2462940C (en)	2001-10-31	2002-10-29	Semiconductor device and fabricating method thereof
MXPA04004099A MXPA04004099A (es)	2001-10-31	2002-10-29	Dispositivo semiconductor y metodo de fabricacion del mismo.

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
JP2001334801		2001-10-31
JP2001-334801		2001-10-31

Publications (1)

Publication Number	Publication Date
WO2003038900A1 true WO2003038900A1 (en)	2003-05-08

Family

ID=19149879

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
PCT/JP2002/011248 WO2003038900A1 (en)	2001-10-31	2002-10-29	Image displaying method and image displaying device

Country Status (8)

Country	Link
US (1)	US7084437B2 (ja)
EP (1)	EP1463118B1 (ja)
JP (1)	JP4072125B2 (ja)
KR (1)	KR100641667B1 (ja)
CN (1)	CN1309086C (ja)
CA (1)	CA2462940C (ja)
MX (1)	MXPA04004099A (ja)
WO (1)	WO2003038900A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP2006135322A (ja) *	2004-11-05	2006-05-25	Samsung Electronics Co Ltd	半導体メモリ装置の回路配線配置構造とその配置方法

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US6927996B2 (en) *	2003-09-30	2005-08-09	Hewlett-Packard Development Company, L.P.	Magnetic memory device
US7476945B2 (en) *	2004-03-17	2009-01-13	Sanyo Electric Co., Ltd.	Memory having reduced memory cell size
JP2006024598A (ja) *	2004-07-06	2006-01-26	Fujitsu Ltd	半導体装置の製造方法
JP2007103809A (ja) *	2005-10-07	2007-04-19	Oki Electric Ind Co Ltd	半導体装置及び半導体装置の製造方法
JP2007157854A (ja) *	2005-12-01	2007-06-21	Toshiba Corp	不揮発性半導体記憶装置及びその製造方法
US7875931B2 (en) *	2006-04-28	2011-01-25	Semiconductor Energy Laboratory Co., Ltd.	Semiconductor device with isolation using impurity
JP2008010739A (ja) *	2006-06-30	2008-01-17	Toshiba Corp	半導体装置およびその製造方法
US20080318420A1 (en) *	2007-06-22	2008-12-25	Wong Denny K	Two step chemical mechanical polish
US7706177B2 (en) *	2007-12-28	2010-04-27	Sandisk 3D Llc	Method of programming cross-point diode memory array
KR101019893B1 (ko) *	2008-12-23	2011-03-04	주식회사 하이닉스반도체	플로팅 바디 효과를 이용한 자기저항 메모리셀, 이를 포함하는 메모리 소자 및 그 동작 방법
US20100220512A1 (en) *	2009-03-02	2010-09-02	Seagate Technology Llc	Programmable power source using array of resistive sense memory cells
US8526221B2 (en) *	2010-10-11	2013-09-03	Magsil Corporation	Semiconductor integrated circuit for low and high voltage operations
US8901687B2 (en)	2012-11-27	2014-12-02	Industrial Technology Research Institute	Magnetic device with a substrate, a sensing block and a repair layer
KR102189684B1 (ko)	2013-12-05	2020-12-11	삼성전자주식회사	반도체 메모리 장치의 동작 방법
US20180254290A1 (en) *	2017-03-01	2018-09-06	Government Of The United States, As Represented By The Secretary Of The Air Force	Metal Oxide Thin Film Semiconductor Device Monolithically Integrated With Dissimilar Device on the Same Wafer
US11222970B2 (en)	2017-12-28	2022-01-11	Integrated Silicon Solution, (Cayman) Inc.	Perpendicular magnetic tunnel junction memory cells having vertical channels
US10468293B2 (en)	2017-12-28	2019-11-05	Spin Memory, Inc.	Methods of forming perpendicular magnetic tunnel junction memory cells having vertical channels
US10658425B2 (en)	2017-12-28	2020-05-19	Spin Memory, Inc.	Methods of forming perpendicular magnetic tunnel junction memory cells having vertical channels
US10460778B2 (en)	2017-12-29	2019-10-29	Spin Memory, Inc.	Perpendicular magnetic tunnel junction memory cells having shared source contacts
US11410714B2 (en) *	2019-09-16	2022-08-09	Taiwan Semiconductor Manufacturing Co., Ltd.	Magnetoresistive memory device and manufacturing method thereof
US11663455B2 (en) *	2020-02-12	2023-05-30	Ememory Technology Inc.	Resistive random-access memory cell and associated cell array structure

Citations (4)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5640343A (en) *	1996-03-18	1997-06-17	International Business Machines Corporation	Magnetic memory array using magnetic tunnel junction devices in the memory cells
US6097625A (en) *	1998-07-16	2000-08-01	International Business Machines Corporation	Magnetic random access memory (MRAM) array with magnetic tunnel junction (MTJ) cells and remote diodes
US6130935A (en) *	1996-08-08	2000-10-10	Mci Communications Corporation	Virtual networking work at home system and method
US20020001223A1 (en) *	2000-06-30	2002-01-03	Yoshiaki Saito	Solid-state magnetic memory

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Publication number	Priority date	Publication date	Assignee	Title
US6130835A (en) *	1997-12-02	2000-10-10	International Business Machines Corporation	Voltage biasing for magnetic RAM with magnetic tunnel memory cells
US6611405B1 (en) *	1999-09-16	2003-08-26	Kabushiki Kaisha Toshiba	Magnetoresistive element and magnetic memory device
JP3891540B2 (ja) *	1999-10-25	2007-03-14	キヤノン株式会社	磁気抵抗効果メモリ、磁気抵抗効果メモリに記録される情報の記録再生方法、およびｍｒａｍ
US6625057B2 (en) *	2000-11-17	2003-09-23	Kabushiki Kaisha Toshiba	Magnetoresistive memory device
JP4818519B2 (ja) *	2001-02-06	2011-11-16	ルネサスエレクトロニクス株式会社	磁気記憶装置
US6589180B2 (en) *	2001-06-20	2003-07-08	Bae Systems Information And Electronic Systems Integration, Inc	Acoustical array with multilayer substrate integrated circuits

2002
- 2002-10-29 US US10/494,479 patent/US7084437B2/en not_active Expired - Fee Related
- 2002-10-29 CN CNB028196201A patent/CN1309086C/zh not_active Expired - Fee Related
- 2002-10-29 CA CA002462940A patent/CA2462940C/en not_active Expired - Lifetime
- 2002-10-29 EP EP02777998A patent/EP1463118B1/en not_active Expired - Lifetime
- 2002-10-29 JP JP2003541056A patent/JP4072125B2/ja not_active Expired - Fee Related
- 2002-10-29 MX MXPA04004099A patent/MXPA04004099A/es active IP Right Grant
- 2002-10-29 KR KR1020047000374A patent/KR100641667B1/ko not_active Expired - Fee Related
- 2002-10-29 WO PCT/JP2002/011248 patent/WO2003038900A1/ja active Application Filing

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5640343A (en) *	1996-03-18	1997-06-17	International Business Machines Corporation	Magnetic memory array using magnetic tunnel junction devices in the memory cells
US6130935A (en) *	1996-08-08	2000-10-10	Mci Communications Corporation	Virtual networking work at home system and method
US6097625A (en) *	1998-07-16	2000-08-01	International Business Machines Corporation	Magnetic random access memory (MRAM) array with magnetic tunnel junction (MTJ) cells and remote diodes
US20020001223A1 (en) *	2000-06-30	2002-01-03	Yoshiaki Saito	Solid-state magnetic memory

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
BOEVE H. ET AL.: "Bit-selective read and write with coincident current scheme in spin-valve/diode MRAM cells", ELECTRONICS LETTERS, vol. 34, no. 18, 3 September 1998 (1998-09-03), pages 1754 - 1755, XP006010280 *
See also references of EP1463118A4 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP2006135322A (ja) *	2004-11-05	2006-05-25	Samsung Electronics Co Ltd	半導体メモリ装置の回路配線配置構造とその配置方法

Also Published As

Publication number	Publication date
CA2462940A1 (en)	2003-05-08
EP1463118B1 (en)	2012-09-19
US20050042825A1 (en)	2005-02-24
MXPA04004099A (es)	2004-07-23
CN1309086C (zh)	2007-04-04
KR100641667B1 (ko)	2006-11-08
EP1463118A4 (en)	2008-07-02
US7084437B2 (en)	2006-08-01
EP1463118A1 (en)	2004-09-29
KR20040058165A (ko)	2004-07-03
CA2462940C (en)	2009-11-17
CN1565058A (zh)	2005-01-12
JP4072125B2 (ja)	2008-04-09
JPWO2003038900A1 (ja)	2005-02-24

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WO2003038900A1 - Image displaying method and image displaying device - Google Patents

Info

Links

Classifications

Landscapes

Priority Applications (6)

Applications Claiming Priority (2)

Publications (1)

Family

ID=19149879

Family Applications (1)

Country Status (8)

Cited By (1)

Families Citing this family (21)

Citations (4)

Family Cites Families (6)

Patent Citations (4)

Non-Patent Citations (2)

Cited By (1)

Also Published As

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