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WO2003032402A1 - Structure hybride de systemes microelectromecaniques (mems) a couche de silicium basculee au moyen de montants externes - Google Patents

Structure hybride de systemes microelectromecaniques (mems) a couche de silicium basculee au moyen de montants externes Download PDF

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Publication number
WO2003032402A1
WO2003032402A1 PCT/US2002/032400 US0232400W WO03032402A1 WO 2003032402 A1 WO2003032402 A1 WO 2003032402A1 US 0232400 W US0232400 W US 0232400W WO 03032402 A1 WO03032402 A1 WO 03032402A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
actuatable
silicon
mems
standoffs
Prior art date
Application number
PCT/US2002/032400
Other languages
English (en)
Inventor
Bryan P. Staker
Douglas L. Teeter, Jr.
Andres Fernandez
David T. Amm
Original Assignee
Glimmerglass Networks, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Glimmerglass Networks, Inc. filed Critical Glimmerglass Networks, Inc.
Publication of WO2003032402A1 publication Critical patent/WO2003032402A1/fr

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B3/00—Devices comprising flexible or deformable elements, e.g. comprising elastic tongues or membranes
    • B81B3/0064—Constitution or structural means for improving or controlling the physical properties of a device
    • B81B3/0086—Electrical characteristics, e.g. reducing driving voltage, improving resistance to peak voltage

Definitions

  • This invention relates to electro ceramic components such as MEMS arrays and methods for fabricating electro ceramic components that can tolerate higher actuation voltages and operate with higher efficiency.
  • Components are MEMS arrays or other micromachined elements.
  • Conventional MEMS array structures comprise Silicon on Insulator
  • SOI semiconductor-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator-on-insulator.
  • Typical structures have a conductive handle which is electrically connected to the thin actuatable layer. When these devices are connected to a potential, the fringing fields are forced beneath the mirror, reducing the available electrostatic force for a given amount of voltage.
  • a plate comprises a thin actuatable layer of conductive silicon, such as a MEMS actuatable element, and a thicker handle layer of conductive silicon to provide structural integrity which are separated by a thin oxide, together forming an SOI wafer.
  • This plate is mounted to a substrate, typically a ceramic, with the thin actuatable layer facing the substrate and separated by an airgap that is formed by creating, on the substrate, standoffs which come in contact with the plate.
  • a suitable dielectric material useful as a standoff on the substrate is a photoresist that permits high aspect ratios (such as a 5:1 height to width ratio).
  • Separation may be effected by other materials and deposition methods, such as by a screen printed adhesive, an electroformed standoff or glass beads.
  • the plate may be attached using a mechanical fastening technique that permits heterogeneous expansion, as for example through a form of rivet.
  • the plate of this structure typically formed of Silicon on Insulator is referred to as a "Flipped SOI" because the handle is not mounted on the substrate, which is typical of these devices. Instead, the handle is unmounted, and the support is by means of standoffs.
  • the applied voltage and resultant force can be boosted because the fringing fields can now spread onto the standoff (where the standoff is a dielectric or conductive material of a high resistivity).
  • the standoff is a dielectric or conductive material of a high resistivity.
  • the fringing field problem which increases with the aspect ratio of the air gap to the size of the device, is mitigated by this invention, permitting larger airgaps, greater tilt angle, faster displacement for a given voltage and higher breakdown voltage for a given gap.
  • the second problem solved is control of the airgap.
  • the airgap of the actuatable element is now controlled by a separate deposition or electro-forming process. This decouples the airgap height from the handle thickness. Handle thickness is constrained to be within a narrow range. A handle thickness that is greater than or less than this range causes difficulties in fabrication and handling of the device due to its fragility.
  • the standoff according to the invention introduces a potential problem of susceptibility to fringing fields that may penetrate through them, causing crosstalk to adjacent MEMS elements.
  • the substrate is coated with a highly resistive conductive material.
  • a further problem that arises by using this technique is vignetting of light for cases where light is obstructed by the handles of the flipped SOI structure. This problem is mitigated by construction of the handle with chamfered or terraced walls
  • Figure 1 is a perspective view in partial cutaway of the device according to the invention.
  • Figure 2 is a cross-sectional view of a device according to the invention.
  • Figure 3 is a cross-sectional view of a device according to the invention with a highly resistive conductive coating.
  • Figure 4 is a cross-sectional view of another device not in accordance with the invention showing field lines illustrating less than ideal distribution of forces.
  • Figure 5 is a cross-sectional view of a device in accordance with the invention showing field lines illustrating improved distribution of forces.
  • FIG. 1 and Figure 2 in which is shown an array 10 of MEMS elements as for example 12 and 14.
  • a plate 19 is provided. It is formed of a thin actuatable layer of conductive silicon 20, structured as for example as a MEMS mirror, and a thicker handle layer 22 of conductive silicon which provides structural integrity. These layers 20, 22 are separated by a thin oxide 23, which together form the plate 19, herein called an SOI wafer.
  • This plate 19 is mounted to a substrate 24, typically of ceramic, with the thin actuatable layer 20, according to the invention, facing the substrate 24 and separated by an airgap that is formed by providing, on the substrate, standoffs 26, 27 and 28.
  • the standoffs which may or may not be formed of a contiguous material, come in contact with the plate 19.
  • the standoffs may be formed of a single element with cutouts for the mirrors 12 and 14, etc. and associated cavities, or they may be ribs laid down between the cavities, or they may be squared cutouts providing contiguous spars. Still further the standoffs could be formed by beads or the like serving as spacers between the plate 19 and the substrate 24.
  • Several adjacent electrodes 30, 32, 34, and 36 are disposed on or embedded in the substrate structure 24 wherein vias 38 and 40 provide feeds to a control module (not shown).
  • the structure comprising elements 19 and 24 is not specific to a particular material combination.
  • the structure may be for example silicon mounted to ceramic, silicon to polyimide materials, silicon to FLEX circuit board materials, silicon mounted to silicon, silicon bonded to silicon, silicon to thick film on any substrate material, or silicon to thin film on any substrate material.
  • the standoff could be of SU-8, a type of photoresist that can give high aspect ratios.
  • the handle 22 can be chamfered or stepped at the edge of the cavity to accommodate shallow angles of incident light directed to the mirrors.
  • FIG. 3 illustrates a still further embodiment of the invention.
  • a highly resistive conductive surface 50 is disposed as a coating over the electrodes 32, 34 and adjacent surfaces, including the nonconductive spacers or walls of the cavities formed by the spacers.
  • the conductive surface 50 serves to suppress lateral field line penetration or crosstalk between the fields of the actuatable elements as hereinafter explained.
  • Figure 4 is an illustration of a hypothetical cavity (not in accordance with the invention) showing field lines A associated with high potential differences over short distances (depicted by dashed isopotential lines B).
  • the Figure also illustrates field lines C between the top surface of the electrostatic actuation electrodes 32 and the facing bottom surface of the MEMS actuatable element 12.
  • the potential difference between elements 12 and 32 (depicted by dashed isopotential lines D) is limited by the breakdown potential in the region 52 due to the high potential gradient over the length of the region of concentrated isopotential lines B.
  • a number of the field lines also terminate on the conductive side walls and thus do not contribute to the electrostatic force on the actuatable element 12s.
  • the structure in Figure 4 is not of a flipped SOI structure.
  • field lines terminating on the side walls represent wasted energy and a potential source of breakdown and nonlinear field distortion. It should be understood that the field lines should desirably terminate on the MEMS actuatable element 12 for maximum utilization of field energy.
  • a further disadvantage is that the air gap (the distance between elements 12 and 32) is constrained by structural considerations. Due to limitations of minimum wafer thickness of an SOI wafer where the air gap is nominally set by wafer thickness, there is a minimum possible gap between an electrode and an actuatable element, thus limiting the force that can be applied to the actuatable element 12.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mechanical Light Control Or Optical Switches (AREA)
  • Micromachines (AREA)

Abstract

L'invention concerne une structure de MEMS hybride dans laquelle une plaquette comprend une couche mince de silicium conducteur pouvant être actionnée, telle qu'un élément de MEMS pouvant être actionné, et une couche de manipulation plus épaisse de silicium conducteur permettant d'obtenir une intégrité structurelle, ces couches étant séparées par une couche mince d'oxyde et formant ensemble une plaquette SOI. Cette plaque est montée sur un substrat, généralement en céramique, la couche mince pouvant être actionnée faisant face au substrat et en étant séparée par une couche d'air formée par création, sur le substrat, de montants isolants venant en contact avec la plaquette. Un matériau diélectrique approprié utile comme montant à apposer sur le substrat est un support de base permettant d'obtenir des facteurs de forme élevés.
PCT/US2002/032400 2001-10-09 2002-10-08 Structure hybride de systemes microelectromecaniques (mems) a couche de silicium basculee au moyen de montants externes WO2003032402A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/975,119 US6649987B1 (en) 2001-10-09 2001-10-09 MEMS hybrid structure having flipped silicon with external standoffs
US09/975,119 2001-10-09

Publications (1)

Publication Number Publication Date
WO2003032402A1 true WO2003032402A1 (fr) 2003-04-17

Family

ID=25522716

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/032400 WO2003032402A1 (fr) 2001-10-09 2002-10-08 Structure hybride de systemes microelectromecaniques (mems) a couche de silicium basculee au moyen de montants externes

Country Status (2)

Country Link
US (1) US6649987B1 (fr)
WO (1) WO2003032402A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109883603A (zh) * 2019-03-13 2019-06-14 中国电子科技集团公司第四十九研究所 一种基于soi的硅微谐振式压力敏感芯片谐振器

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060214266A1 (en) * 2005-03-23 2006-09-28 Jordan Larry L Bevel dicing semiconductor components
JP2009014768A (ja) * 2007-06-29 2009-01-22 Fujitsu Ltd メムスデバイスおよびその製造方法
JP5218455B2 (ja) * 2010-03-17 2013-06-26 株式会社デンソー 半導体力学量センサおよびその製造方法
US9171793B2 (en) * 2011-05-26 2015-10-27 Hewlett-Packard Development Company, L.P. Semiconductor device having a trace comprises a beveled edge
US9335544B2 (en) * 2013-03-15 2016-05-10 Rit Wireless Ltd. Electrostatically steerable actuator
US10780704B2 (en) 2016-07-01 2020-09-22 Hewlett-Packard Development Company, L.P. Ink-jet print head assemblies with a spacer surrounding an ink fill port and method of manufacturing
DE102016223203A1 (de) * 2016-11-23 2018-05-24 Robert Bosch Gmbh MEMS-Bauelement mit niederohmiger Verdrahtung und Verfahren zur Herstellung desselben

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5682053A (en) * 1992-03-30 1997-10-28 Awa Microelectronics Pty. Limited Silicon transducer with composite beam
US6159385A (en) * 1998-05-08 2000-12-12 Rockwell Technologies, Llc Process for manufacture of micro electromechanical devices having high electrical isolation
US6233087B1 (en) * 1998-12-18 2001-05-15 Eastman Kodak Company Electro-mechanical grating device
US6383832B1 (en) * 2001-04-16 2002-05-07 Mitsubishi Denki Kabushiki Kaisha Pressure responsive device and method of manufacturing semiconductor substrate for use in pressure responsive device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5682053A (en) * 1992-03-30 1997-10-28 Awa Microelectronics Pty. Limited Silicon transducer with composite beam
US6159385A (en) * 1998-05-08 2000-12-12 Rockwell Technologies, Llc Process for manufacture of micro electromechanical devices having high electrical isolation
US6233087B1 (en) * 1998-12-18 2001-05-15 Eastman Kodak Company Electro-mechanical grating device
US6383832B1 (en) * 2001-04-16 2002-05-07 Mitsubishi Denki Kabushiki Kaisha Pressure responsive device and method of manufacturing semiconductor substrate for use in pressure responsive device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109883603A (zh) * 2019-03-13 2019-06-14 中国电子科技集团公司第四十九研究所 一种基于soi的硅微谐振式压力敏感芯片谐振器

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