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WO2003015145A1 - Micromachining method using ionbeam - Google Patents

Micromachining method using ionbeam Download PDF

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Publication number
WO2003015145A1
WO2003015145A1 PCT/JP2002/007999 JP0207999W WO03015145A1 WO 2003015145 A1 WO2003015145 A1 WO 2003015145A1 JP 0207999 W JP0207999 W JP 0207999W WO 03015145 A1 WO03015145 A1 WO 03015145A1
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Prior art keywords
layer
ion
ion beam
oxide film
ions
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PCT/JP2002/007999
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French (fr)
Japanese (ja)
Inventor
Tadaaki Kaneko
Yasushi Asaoka
Naokatsu Sano
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The New Industry Research Organization
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Publication of WO2003015145A1 publication Critical patent/WO2003015145A1/en

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00436Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
    • B81C1/00523Etching material
    • B81C1/00531Dry etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2201/00Manufacture or treatment of microstructural devices or systems
    • B81C2201/01Manufacture or treatment of microstructural devices or systems in or on a substrate
    • B81C2201/0101Shaping material; Structuring the bulk substrate or layers on the substrate; Film patterning
    • B81C2201/0128Processes for removing material
    • B81C2201/0143Focussed beam, i.e. laser, ion or e-beam

Definitions

  • the present invention is a compound semiconductor substrate, in particular, G a x I was market shares epitaxial growth G a A s and I n P substrate - relates sy ion beam microfabrication methods P -y layer surface.
  • Si which is a typical device material
  • a dry etching process using fluorine and chlorine-based halogen gas has been studied.
  • the dry etching process for fabricating finer quantum devices has not yet been completed.
  • compound semiconductors such as 0 a x I i x x A sy P ⁇ y including 0 & 3
  • the technical means that enable the fabrication of quantum devices is still not discussed.
  • the fact is that it is not completed.
  • GaAs is a material that has a higher electron mobility than Si and can operate at higher frequency and higher speed than Si.
  • the present inventor has developed a method of dry etching the surface of a semiconductor crystal with a bromide in units of one atomic layer as a dry etching method for overcoming the technical limitations of a conventional dry etching method using halogen gas for compound semiconductors and the like. It is disclosed in Japanese Patent Application Laid-Open No. 8-321483.
  • the Ga As layer surface, naturally As 2 0 3, As 2 ⁇ , and surface oxide film, such as Ga 2 ⁇ is formed, per to form a mask for dry etching, removing the surface oxide film I also needed to.
  • the present invention has been made in view of the above problems, G a A G containing s a x I ni X A s yP - on y layer surface, A s 2 0 3 which is naturally formed, A s 2 0, G a 2 0 no need for prior removal of surface Sani ⁇ such, also double
  • a dry etching mask to form a coarse and miniaturized circuit pattern
  • a fine circuit pattern used for quantum devices can be formed on the surface of the Ga x Ini — xA S yP — y layer.
  • An object of the present invention is to provide an ion beam microfabrication method formed in a field. Disclosure of the invention
  • the ion beam microfabrication method of the present invention for solving the above-mentioned problem includes a single ion beam diameter and an arbitrary ion beam diameter on the surface of a Ga x I n ⁇ A s y P y layer including a single GaAs and InP substrate.
  • the Ga ion controlled to the ion current density is injected, and the Ga x I
  • the implantation G a ion in the presence or under the oxygen molecules radiating surface oxide film which is after selectively to substituted or generated G a 2 0 3 or 0 a 2 0 oxide layer, wherein G a x I n x _ x A s And Delahaye Tsuchingu one atomic layer of the bromide, the G a 2 0 3 or G a 2 wherein the surface oxide film other than substituted moiety to ⁇ and Ga x I one xA S Is to be removed.
  • the G a x I n X _ X A s y P x layer surface by controlling the injection amount of the G a ion, negative, in which can be processed in any of the positive type.
  • G a x I ⁇ ⁇ - X A s Directly injecting G a ions adjusted to any ion beam diameter and the ion current density, G a x I eta iota one xA S yP - As to the y layer surface is naturally formed 2 0 3, As 2 0 , replacing the oxide such as G a 2 0 selectively chemically stable G a 2 0 3.
  • Their to so selectively thermally desorbed other As 2 0 3 an oxide such as A s 2 0 under a reduced pressure environment of lower than about 10- 8 P a.
  • Ga x I r ⁇ - X A s yPi It becomes possible to process an arbitrary circuit pattern on the y-layer. Also, depending on the amount of Ga ions implanted during Ga ion implantation, the surface of the Ga x Ir x AsyP y layer can be processed into either a positive type or a negative type.
  • the ion beam microfabrication method of the present invention does not require the production and use of the dry etching mask used in the dry etching, and the control of the amount of Ga ions implanted enables the G a it is possible to freely adjust the x I ni _ x a s y P x _ y layer pattern formed on the surface. For this reason, it is possible to deal with complicated and miniaturized circuit patterns, such as circuit patterns used in recent quantum devices.
  • FIG. 1 is a view for explaining a difference in a forming process due to a difference in ion dose (quantity of ion implantation) in an embodiment of an ion beam fine processing method according to the present invention.
  • FIG. 2 is a diagram showing AFM images of substrate surfaces having different ion doses (ion implantation amounts) in the ion beam fine processing method according to the present invention.
  • 1 is a G a A s layer
  • 2 denotes a front surface oxide film of A s 2 0 3 or the like the surface of which is naturally formed on the G a A s layer 1 surface.
  • FIG. 1 it is shown that the implantation amount of Ga ions increases from the left to the right of the page, that is, as it moves from FIG. 1 (a) to (d).
  • the surface oxide film Irradiate the Ga ion 4 in a vacuum with the ion beam diameter of 0.5 ⁇ m or less, preferably 0.3 / m or less, more preferably 0. Inject Ga ions into 2.
  • oxides such as A s 2 0 is the Sani ⁇ G a 2 0 3 3 in injection volume or less was chemically stable in It is replaced (see Figure 1 (a) upper row).
  • the surface oxide film 2 other than G a 2 0 3 3 By heating the G aA s layer 1 a part of the surface oxide film 2 was replaced by G a 2 0 3 3 to 5 8 0 ° C heat desorbed, then the surface is dry-etched by atomic layer more units by morphism irradiation with bromides, removing the non-replacement portion of the Ga 2 0 3 3 (FIG. 1 (a) see bottom). At this time, if the surface of the GaAs layer 1 is patterned with a Ga ion so as to have a predetermined circuit pattern, an arbitrary circuit pattern can be processed on the surface of the GaAs layer 1.
  • the atoms to be etched are the atoms at the step positions and the kink positions on the surface, and the step kinks that constitute the surface irregularities.
  • the atomic layer can be etched one layer at a time. The surface obtained as a result of such single layer etching is extremely flat. That is, a flat surface at the atomic level can be obtained. Furthermore, this method enables the same etching regardless of the index of the surface, even on the cleaved (110) plane.
  • the surface of the GaAs crystal is etched in a single layer regardless of the surface index on any of the (100), (110), and (111) surfaces, that is, the etching depth in nano-order units. , And the side shape of the processing area can be controlled on the spot.
  • a bromide gas is used in an ultra-high vacuum, for example, with a pressure of 10 to 8 Pa, and then 500 to 600 at 10 to 16 : L 0 to 5 Pa V Etching can be performed by introducing an etchant gas under a partial pressure of a group III molecular gas.
  • the bromide used as a Etsu etchant gas is preferably exemplified as PB r 3 which is a compound of the A s B r 3, also P is a compound with A s is the typical . Of course, it may be of another kind.
  • Ga x I! ! G xA S It is possible to surface oxide film present on the layer surface is processed in a chemically stable G a 2 0 3 nano portions other than substituted in 'order unit of fine size formed by irradiation of the Ga ions.
  • a fine structure having a high aspect ratio can be easily formed with good reproducibility, and negative lithography can be performed.
  • a part of the surface oxide film 2 are dry-etched with G a 2 O 3 3 to substituted G a
  • a s layer atomic layer more units by bromide surface 1 is replaced by a G a 2 0 3 3 and other portions, and removal of the sputtered-ring portion depends on G a ion ⁇ Pi G a 2 ⁇ 3 3, it is patterned surface in a predetermined pattern in which the grooves are formed in the apex portion (Fig. 1 (B) See below).
  • the surface of the 0 & 3 layer 1 is evacuated to a level of 10 -8 Pa in an ultra-high vacuum using a bromide gas, and then, at 500 to 600 ° C, 10 to 6 to 10 —
  • dry etching is performed by introducing an etchant gas at a gas partial pressure of 5 Pa, the etching is performed faster than the portion where Ga ions 4 are not implanted, as shown in the lower part of Fig. 1 (c).
  • the etched amount is larger than the outside of the groove, and a deeply etched V-groove is formed inside.
  • the range of amorphousization of the GaAs layer 1 is expanded, and sputtering is performed by the Ga ions (see the upper part of Fig. 1 (d)).
  • the surface of the G aA s layer 1 after evacuation of the in ultrahigh vacuum using the aforementioned Similarly odor-fluorinated gases, for example to 1 0 _ 8 P a level, at 500 ⁇ 600 ° C 10- 6 ⁇ 1 0-5 Etchiyan in gas partial pressure P a
  • dry etching is performed by introducing gas, deep grooves can be machined on the surface (see the lower part of Fig. 1 (d)).
  • the ion beam microfabrication method without having to remove the surface oxide film such as A s 2 0 3 which is naturally formed on the Ga A s layer surface, said surface oxide film by implanting G a ion, it is possible to form a chemically stable G a 2 0 3 on the surface.
  • the surface of the GaAs layer after dry etching with bromide can be processed into either a negative type or a positive type.
  • an arbitrary circuit pattern can be easily processed with good reproducibility. This makes it possible to apply not only to semiconductor devices, but also to wavelength discrimination devices, micromachining of micromachining 'and microcomponents, and quantum wires and quantum boxes.
  • G a A s layer if G a x I n! _ X A s y P i_ y layer is, G a A s layer described in this embodiment and The same effect is achieved, and the present invention is not limited to the GaAs layer.
  • G a A s layer A s which is naturally formed on the surface 2 0 3 or the like toward the surface of the surface oxide film of the G a ions focused ion beam diameter 0. 1 ⁇ in vacuo 6 X 10 13 Irradiation is performed at an acceleration voltage of 30 kV / cm 2 and Ga ions are implanted into the surface oxide film.
  • the temperature was raised to 580 ° C, after removal of the oxide film other than G a 2 0 3, 500-630 ° introducing a s B r 3 gas at the gas partial pressure of C at 10- 6 ⁇ 10- 5 P a performing Etsuchingu by.
  • Figure 2 (a) shows an atomic force microscope (AFM) image of the surface.
  • AFM atomic force microscope
  • the surface was dry-etched with AsBr 3 gas.
  • Second diagram (b) injecting the region center portion dose (injection amount) is locally increased stable G a 2 0 3 is sputtering, a groove on the apex portion is formed pattern is formed Can be observed.
  • the surface was dry-etched with AsBr 3 gas.
  • Figure 2 (c) shows an AFM image of the surface.
  • the Ga ions were implanted in the same manner as in Example 1 except that the amount of implanted Ga ions was set to 6 ⁇ 10 17 Zcm 2 , the surface was dry-etched with AsBr 3 gas.
  • Figure 2 (d) shows an AFM image of the surface.
  • the GaAs layer is amorphous on the surface of the GaAs layer by Ga ions. By reduction, the easier becomes deep trench etched into As B r 3 are formed can be observed.
  • G a A a surface oxide film s layer formed on the surface by injecting G a I O emissions, such etched by bromide les,-chemical stable G a 2 0 3
  • G a I O emissions such etched by bromide les,-chemical stable G a 2 0 3
  • the present invention Ga x I ni - x As yPi- y layer without removing the front surface oxide film which is naturally formed on the semiconductor crystal surface comprising a compound semiconductor such as, the surface oxidation by injecting G a Ion membrane, it is possible to form a chemically stable G a 2 0 3 that is not etched by bromide. Therefore, an arbitrary circuit pattern can be processed on the surface without using a mask for etching at the time of etching as in the related art.
  • G a x I ni _ x A s y Pi- y layer pattern of a positive type formed on the surface can be processed in any of the negative Becomes This will enable the realization of useful elements, such as quantum wires, quantum boxes, diffraction gratings, and micromachines, utilizing various quantum device characteristics. Further, since it is possible to E Tsuchingu every one atomic layer, the crystal orientation of G a x I ni _ x A s y layer, the shape of the groove to be formed can freely controllable.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
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Abstract

A micromachining method using an ionbeam, characterized in that it comprises injecting an Ga ion controlled to have a predetermined ion beam diameter and ion current density into the surface of a GaxIn1-xAsyP1-y (0 ≤ x, y ≤ 1) layer, including a GaAs and InP substrate, in a condition wherein an oxide film is formed on its surface or the surface is being irradiated with oxygen molecules, to thereby convert the oxide selectively to Ga2O3 or Ga2O or form the gallium oxide, and then subjecting the surface of the GaxIn1-xAsyP1-y layer to a dry etching on one atomic layer basis by the use of a bromide to remove the above oxide film formed on the surface and the GaxIn1-xAsyP1-y layer which have not converted to Ga2O3 or Ga2O.

Description

明 細 書  Specification
ィオンビーム微細加工方法 技術分野 Ion beam fine processing method
本発明は、 化合物半導体基板、 特に、 G a A s及び I n P基板上にェ ピタキシャル成長した G a x I — s y P —y層表面のイオンビーム 微細加工方法に関するものである。 背景技術 The present invention is a compound semiconductor substrate, in particular, G a x I was market shares epitaxial growth G a A s and I n P substrate - relates sy ion beam microfabrication methods P -y layer surface. Background art
近年、 マイクロエレクトロ二タスの中核をなす U L S Iの集積度の向 上とともに、 これら量子デバィスにおける回路パターンは微細化の一途 をたどっている。 従来、 半導体デバイスの作製プロセスでは、 絶縁膜や 金属薄膜の不要部分を、 レジストパターン通りに高精度で取り除くため の基礎技術として、 半導体結晶のエッチング法が広く採用されている。 このエッチング法のための手段として、 ハロゲンガスを用いたドライエ ツチングの検討も進められている。 このドライエッチングは、 超高真空 中の比較的清浄な雰囲気でェツチングを行うため、 微細な量子デバィス の加工が可能なものとして期待されている。  In recent years, with the increase in the integration of ULSI, which is the core of microelectronics, the circuit patterns in these quantum devices are becoming ever smaller. Conventionally, in semiconductor device fabrication processes, semiconductor crystal etching has been widely adopted as a basic technique for removing unnecessary portions of insulating films and metal thin films with high precision according to a resist pattern. As means for this etching method, dry etching using a halogen gas is being studied. Since this dry etching is performed in a relatively clean atmosphere in an ultra-high vacuum, it is expected that a fine quantum device can be processed.
例えば、 デバイス材料として代表的な S iについては、 フッ素および 塩素系のハロゲンガスによるドライエッチングプロセスが検討されて きている。 しかしながら、 これまでのところ、 このシリコンの場合につ いても、 より微細な量子素子を作製するためのドライエッチングプロセ スはいまだ完成していないのが実情である。 そして、 0 & 3を含む0 a x I i^ x A s y P ^y等の化合物半導体についてもドライエッチング プロセスに関する報告は多いが、 量子素子の作製を可能とする技術的手 段についてはいまだ S i同様に、 完成していないのが実情である。 例えば、 G a A sは S iに比べ電子の移動度が大きく、 S iより高周 波、 高速の動作が可能な材料である。 加えて、 資源の豊かさ、 結晶の完 全性等の点から工業規模の大きさで発展し、 S iに代わり、 その限界を 克服する化合物半導体の 1種としてその優れた性質と多様性で注目さ れているものである。 また、 この G a As等の化合物半導体のェピタキ シャル結晶技術として、 MBE (分子線ェピタキシャル成長) 法や、 M OCVD (有機金属気相成長) 法等の技術が進歩し、 一様な結晶成長が 可能になってきており、化合物半導体のデバイス材料としての重要度は 増してきている。 For example, with respect to Si, which is a typical device material, a dry etching process using fluorine and chlorine-based halogen gas has been studied. However, so far, even in the case of silicon, the dry etching process for fabricating finer quantum devices has not yet been completed. Although there are many reports on the dry etching process for compound semiconductors such as 0 a x I i x x A sy P ^ y including 0 & 3, the technical means that enable the fabrication of quantum devices is still not discussed. As in i, the fact is that it is not completed. For example, GaAs is a material that has a higher electron mobility than Si and can operate at higher frequency and higher speed than Si. In addition, it has developed on an industrial scale in terms of the abundance of resources and the perfection of crystals, and has been replaced by Si as a kind of compound semiconductor that overcomes its limitations. It is the focus of attention. In addition, technologies such as MBE (Molecular Beam Epitaxy) and MOCVD (Metal Organic Chemical Vapor Deposition) have been developed as epitaxy crystal technologies for compound semiconductors such as Ga As, Is becoming possible, and the importance of compound semiconductors as device materials is increasing.
そこで、 本発明者は、 化合物半導体等に対する従来のハロゲンガスに よるドライエッチング方法の技術的限界を克服するドライエッチング 方法として、 半導体結晶表面を臭素化物により一原子層単位でドライエ ツチングする方法を開発し、特開平 8— 321483号公報で開示して いる。  Accordingly, the present inventor has developed a method of dry etching the surface of a semiconductor crystal with a bromide in units of one atomic layer as a dry etching method for overcoming the technical limitations of a conventional dry etching method using halogen gas for compound semiconductors and the like. It is disclosed in Japanese Patent Application Laid-Open No. 8-321483.
しかしながら、 Ga As層表面に精度良く回路パターンを形成するた めには、 前述の一原子層単位でドライエツチングする場合であっても、 ドライエッチング用マスクを形成する必要があった。 近年の、 量子デバ イスにおける回路パターンは微細化、 複雑化に伴い、 このドライエッチ ング用マスクそのものの作製も困難となり、 形状、 寸法の再現性が悪く なるという問題があった。  However, in order to form a circuit pattern with high accuracy on the surface of the Ga As layer, it was necessary to form a dry etching mask even when dry etching was performed on a single atomic layer basis. In recent years, as circuit patterns in quantum devices have become finer and more complex, it has become difficult to fabricate the dry etching mask itself, and there has been a problem that the reproducibility of the shape and dimensions has been poor.
また、 Ga As層表面には、 自然に As 203、 As 2〇、 Ga2〇等の 表面酸化膜が形成されており、 ドライエッチング用マスクを形成するに あたり、 この表面酸化膜を除去する必要もあった。 Moreover, the Ga As layer surface, naturally As 2 0 3, As 2 〇, and surface oxide film, such as Ga 2 〇 is formed, per to form a mask for dry etching, removing the surface oxide film I also needed to.
本発明は、 前記問題点に鑑みなされたものであり、 G a A sを含む G a x I n i XA s yP — y層表面に、 自然に形成されている A s 203、 A s 20、 G a 20等の表面酸ィ匕膜を予め除去する必要性がなく、 また、複 雑で微細化された回路パターンを形成するためのドライエッチング用 マスクを形成することなく、 Gax I n i— xA S yP — y層表面に、 量子 デバイスに用いられる微細な回路パタ一ンをその場で形成するイオン ビーム微細加工方法を提供することを目的とする。 発明の開示 The present invention has been made in view of the above problems, G a A G containing s a x I ni X A s yP - on y layer surface, A s 2 0 3 which is naturally formed, A s 2 0, G a 2 0 no need for prior removal of surface Sani匕膜such, also double Without forming a dry etching mask to form a coarse and miniaturized circuit pattern, a fine circuit pattern used for quantum devices can be formed on the surface of the Ga x Ini — xA S yP — y layer. An object of the present invention is to provide an ion beam microfabrication method formed in a field. Disclosure of the invention
前記課題を解決するための本発明のィオンビーム微細加工方法は、 単 体の G a As及ぴ I nP基板を含む、 Ga x I n ^ A s y P y層表面 に、 任意のイオンビーム径、 イオン電流密度に制御した G aイオンを注 入し、 前記 Ga x I
Figure imgf000005_0001
されている表面酸化 膜の存在又は酸素分子放射のもとでの G aイオン打ち込みにより酸化 層を選択的に G a 203又は0 a 20に置換又は生成させた後、前記 G a x I nx_xA s
Figure imgf000005_0002
を臭素化物により一原子層単位でドライエ ツチングし、 前記 G a 203又は G a 2〇に置換した部分以外の前記表面 酸化膜及び Gax I 一 xA S
Figure imgf000005_0003
を除去するものである。 また、 前 記臭素化物に、 As B r 3、 PB r 3を用いるものである。 また、 前記 G aイオンの注入量を制御することによって前記 G a x I n X_XA s y P x 層表面を、ネガ型、ポジ型のいずれにも加工することができるもので ある。
The ion beam microfabrication method of the present invention for solving the above-mentioned problem includes a single ion beam diameter and an arbitrary ion beam diameter on the surface of a Ga x I n ^ A s y P y layer including a single GaAs and InP substrate. The Ga ion controlled to the ion current density is injected, and the Ga x I
Figure imgf000005_0001
The implantation G a ion in the presence or under the oxygen molecules radiating surface oxide film which is after selectively to substituted or generated G a 2 0 3 or 0 a 2 0 oxide layer, wherein G a x I n x _ x A s
Figure imgf000005_0002
And Delahaye Tsuchingu one atomic layer of the bromide, the G a 2 0 3 or G a 2 wherein the surface oxide film other than substituted moiety to 〇 and Ga x I one xA S
Figure imgf000005_0003
Is to be removed. Also, before Symbol bromide, it is to use a As B r 3, PB r 3 . Further, the G a x I n X _ X A s y P x layer surface by controlling the injection amount of the G a ion, negative, in which can be processed in any of the positive type.
本発明は、 G a x I η ιXA s
Figure imgf000005_0004
直接、 任意のイオン ビーム径及びイオン電流密度に調整した G aイオンを注入し、 G a x I η ι一 xA S yP — y層表面に自然に形成されている As 203、 As 20、 G a 20等の酸化物を選択的に化学的に安定な G a 203に置換する。 そ して、 それ以外の As 203、 A s 20等の酸化物を 10— 8P a以下程度 の減圧環境下において選択的に熱脱離させる。 このとき、 安定な酸化膜 (G a 203)に置換された酸化膜が従来のリソグラフィ法に用いられて いたマスクと同等の役割を果たし、 G a x I n x A s y P ^γ層母材を、 As B r 3等の臭素化物の雰囲気で一原子層毎にエッチングすると、 ィ匕 学的に安定な酸化膜である G a 203が G a x I n x A s y P y層表面 に残り、 Gax I
Figure imgf000006_0001
ーンを形成できる ものである。 したがって、 G aイオン注入時にイオンビームによって、 G a x I n !_XA s y P 層表面に回路パターン等を描くことによって、 G a x I n i_xA s y y層表面の G aイオン注入部には、 化学的に安 定な G a 203が形成され、この G a 203が臭素化物によるドライエッチ ング時にエッチングされずに残り、 Gax I r^— XA s yPi— y層に任意 のパターンの回路パターンを加工することが可能となる。 また、 Gaィ オン注入時の G aイオン注入量によって、 Gax I r^ xA S yP y層 表面をポジ型、 ネガ型のいずれにも加工することが可能となる。 このよ うに、 本発明のイオンビーム微細加工方法は、 ドライエッチングの際に 用いていたドライエッチング用マスクを作製して使用する必要もなく、 G aイオンの注入量を制御することによって、 G a x I n i_xA s yPx_ y層表面に形成されるパターンを自在に調整することが可能となる。 こ のため、 近年の量子デバイスに用いられる回路パターンのように、 複雑 化し、 微細化した回路パターンにも対応が可能となる。 図面の簡単な説明
The present invention, G a x I η ι - X A s
Figure imgf000005_0004
Directly injecting G a ions adjusted to any ion beam diameter and the ion current density, G a x I eta iota one xA S yP - As to the y layer surface is naturally formed 2 0 3, As 2 0 , replacing the oxide such as G a 2 0 selectively chemically stable G a 2 0 3. Their to so selectively thermally desorbed other As 2 0 3, an oxide such as A s 2 0 under a reduced pressure environment of lower than about 10- 8 P a. At this time, it was replaced by a stable oxide film (G a 2 0 3) oxide film is used in conventional lithography Plays a mask equivalent role which had, G a a x I n x A s y P ^ γ layer base material is etched per one atomic layer in an atmosphere of bromides such as As B r 3, spoon histological so G a 2 0 3 a stable oxide film remains on the G a x I n x a s y P y layer surface, Ga x I
Figure imgf000006_0001
Can be formed. Thus, the ion beam when G a ion implantation, G a x I n! _ X A s by drawing a circuit pattern or the like y P layer surface, G a ion of G a x I ni _ x A s yy layer surface the injection unit is chemically formed From Jona G a 2 0 3, remained without being etched during the dry etching ing this G a 2 0 3 is due bromide, Ga x I r ^ - X A s yPi — It becomes possible to process an arbitrary circuit pattern on the y-layer. Also, depending on the amount of Ga ions implanted during Ga ion implantation, the surface of the Ga x Ir x AsyP y layer can be processed into either a positive type or a negative type. As described above, the ion beam microfabrication method of the present invention does not require the production and use of the dry etching mask used in the dry etching, and the control of the amount of Ga ions implanted enables the G a it is possible to freely adjust the x I ni _ x a s y P x _ y layer pattern formed on the surface. For this reason, it is possible to deal with complicated and miniaturized circuit patterns, such as circuit patterns used in recent quantum devices. BRIEF DESCRIPTION OF THE FIGURES
第 1図は、本発明に係るイオンビーム微細加工方法の実施形態例をィ オン' ドーズ量 (イオン注入量) の違いによる形成過程の違いを説明す るための図である。 第 2図は、 本発明に係るイオンビーム微細加工方法 のイオン · ドーズ量 (イオン注入量) が異なる基板表面の AFM像を示 す図である。 発明を実施するための最良の形態 FIG. 1 is a view for explaining a difference in a forming process due to a difference in ion dose (quantity of ion implantation) in an embodiment of an ion beam fine processing method according to the present invention. FIG. 2 is a diagram showing AFM images of substrate surfaces having different ion doses (ion implantation amounts) in the ion beam fine processing method according to the present invention. BEST MODE FOR CARRYING OUT THE INVENTION
以下、 図面を参照しつつ本発明に係るイオンビーム微細加工方法の実 施の形態の一例を説明する。 第 1図において、 1は G a A s層であり、 2は G a A s層 1表面に自然に形成されている A s 203等の表面の表 面酸化膜を示している。また、第 1図において、紙面左から右にかけて、 即ち、 第 1図 (a) 〜 (d) に移るにしたがって G aイオンの注入量が 増加していることを示している。 Hereinafter, an example of an embodiment of an ion beam fine processing method according to the present invention will be described with reference to the drawings. In Figure 1, 1 is a G a A s layer, 2 denotes a front surface oxide film of A s 2 0 3 or the like the surface of which is naturally formed on the G a A s layer 1 surface. Further, in FIG. 1, it is shown that the implantation amount of Ga ions increases from the left to the right of the page, that is, as it moves from FIG. 1 (a) to (d).
本実施形態例に係るイオンビーム微細加工方法は、 まず、 G a A s層 1表面に自然に形成されている A s 203等の表面酸化膜 2を除去する ことなく、 この表面酸化膜 2の表面に向ってイオンビーム径を 0. 5 μ m以下、 好ましくは 0. 3 / m以下、 更に好ましくは 0. 以下に 絞った G aイオン 4を真空中で照射して、表面酸化膜 2に G aイオンを 注入する。 G aイオンの注入により、表面酸化膜 2の A s 203や、 A s 20等の酸化物は、ある注入量以下では化学的に安定した酸ィ匕物 G a 20 33に置換される (第 1図 (a) 上段参照)。 次に、 表面酸化膜 2の一部 を G a 2033に置換した G aA s層 1を 5 8 0°Cに昇温する事により G a 2033以外の表面酸化膜 2が熱脱離し、その後表面を臭素化物で照 射する事により原子層一層単位でドライエッチングし、 Ga 2033に置 換された部分以外を除去する (第 1図 (a) 下段参照)。 この時、 Ga A s層 1の表面を所定の回路パターンとなるように、 G aイオンによつ てパターニングすると、 GaA s層 1表面に任意の回路パターンを加工 することが可能となる。 Ion beam micromachining process according to the present embodiment, first, without removing the surface oxide film 2 such as A s 2 0 3 which is naturally formed on the G a A s layer 1 surface, the surface oxide film Irradiate the Ga ion 4 in a vacuum with the ion beam diameter of 0.5 μm or less, preferably 0.3 / m or less, more preferably 0. Inject Ga ions into 2. By injection of G a ion, and A s 2 0 3 of the surface oxide film 2, oxides such as A s 2 0 is the Sani匕物G a 2 0 3 3 in injection volume or less was chemically stable in It is replaced (see Figure 1 (a) upper row). Then, the surface oxide film 2 other than G a 2 0 3 3 By heating the G aA s layer 1 a part of the surface oxide film 2 was replaced by G a 2 0 3 3 to 5 8 0 ° C heat desorbed, then the surface is dry-etched by atomic layer more units by morphism irradiation with bromides, removing the non-replacement portion of the Ga 2 0 3 3 (FIG. 1 (a) see bottom). At this time, if the surface of the GaAs layer 1 is patterned with a Ga ion so as to have a predetermined circuit pattern, an arbitrary circuit pattern can be processed on the surface of the GaAs layer 1.
ここで、 このドライエッチングによると、 平坦性のよい表面を再現性 よく得ることを可能としている。 具体的には、 この臭素化物によるエツ チングでは、 エッチングされていく原子が表面のステップ位置おょぴキ ンク位置の原子であって、 表面の凹凸を構成しているステップ'キンク を優先的に取り除くため、原子層を一層単位でエッチングすることがで きる。 このような一層単位でのエッチングの結果得られる表面はきわめ て平坦性の高いものである。 すなわち原子レベルで平坦な表面を得るこ とができる。 さらにこの方法はへき開面である (110) 面でも、 面指 数に関わらない同様なエッチングを可能としている。 このため、 GaA s結晶の表面は (100)、 (110)、 (1 1 1) のいずれの面でも面指 数によらず一層単位でのエッチング、 すなわち、 ナノ 'オーダー単位で のェツチング深さ、及び加工領域の側面形状をその場で制御することが 可能となる。 Here, according to this dry etching, it is possible to obtain a surface with good flatness with good reproducibility. Specifically, in this bromide etching, the atoms to be etched are the atoms at the step positions and the kink positions on the surface, and the step kinks that constitute the surface irregularities. In order to remove Pb preferentially, the atomic layer can be etched one layer at a time. The surface obtained as a result of such single layer etching is extremely flat. That is, a flat surface at the atomic level can be obtained. Furthermore, this method enables the same etching regardless of the index of the surface, even on the cleaved (110) plane. For this reason, the surface of the GaAs crystal is etched in a single layer regardless of the surface index on any of the (100), (110), and (111) surfaces, that is, the etching depth in nano-order units. , And the side shape of the processing area can be controlled on the spot.
このドライエッチングにおいては、臭素化物ガスを用いて超高真空中 で、 たとえば 10— 8 P aレべノレへのお気後、 500〜 600でで 10一 6〜: L 0— 5 P aの V族分子ガス分圧下でのエツチャントガスの導入によ りエッチングを実施することができる。 ここで、 エツチャントガスとし て用いられる臭素化物としては、好ましくは A sとの化合物である A s B r 3、又 Pとの化合物である PB r 3がその代表的なものとして例示さ れる。 もちろん、 他種のものであってもよレ、。 In this dry etching, a bromide gas is used in an ultra-high vacuum, for example, with a pressure of 10 to 8 Pa, and then 500 to 600 at 10 to 16 : L 0 to 5 Pa V Etching can be performed by introducing an etchant gas under a partial pressure of a group III molecular gas. Examples of the bromide used as a Etsu etchant gas is preferably exemplified as PB r 3 which is a compound of the A s B r 3, also P is a compound with A s is the typical . Of course, it may be of another kind.
このように、表面原子層一層単位毎にエッチングすることが可能であ るため、 Gax I!!ト xA S
Figure imgf000008_0001
層表面に存在する表面酸化膜が Ga イオンの照射によって形成される微細寸法の化学的に安定な G a 203 に置換された以外の部分をナノ'オーダー単位で加工することが可能と なり、再現性良く且つ容易に高ァスぺクト比の微細構造を形成すること ができ、 ネガ型リソグラフィを行う事が可能となる。
As described above, since it is possible to etch the surface atomic layer one layer at a time, Ga x I! ! G xA S
Figure imgf000008_0001
It is possible to surface oxide film present on the layer surface is processed in a chemically stable G a 2 0 3 nano portions other than substituted in 'order unit of fine size formed by irradiation of the Ga ions In addition, a fine structure having a high aspect ratio can be easily formed with good reproducibility, and negative lithography can be performed.
G aイオン 4を、 前述の場合よりも高いイオン電流密度で照射して、 その注入量を多くすると、 第 1図 (b) に示すように、 ある所定の注入 量を超えると G a 2033膜はスパッタリングされ G aイオンは G a A s層 1に侵入し、 Ga As層 1に G aイオンが注入される。 そして、 G aイオンが注入されることによって、 G aA s層 1は、 非晶質化された G a A s層 5となり、表面には溝が形成される(第 1図(b)上段参照)。 次に、表面酸化膜 2の一部を G a 2 O 33に置換した G a A s層 1の表面 を臭素化物により原子層一層単位でドライエッチングし、 G a 2033に 置換された部分以外、及ぴ G a 233の G aイオンに依りスパッタリン グされた部分を除去すると、頂点部分に溝が形成された所定のパターン にパターニングされた表面ができる (第 1図 (b) 下段参照)。 By irradiating the Ga ions 4 at a higher ion current density than in the case described above and increasing the injection amount, as shown in FIG. 1 (b), when the predetermined injection amount is exceeded, G a 20 The 33 film is sputtered, and the Ga ions enter the GaAs layer 1 and the Ga ions are implanted into the GaAs layer 1. And G By the implantation of the a ions, the GaAs layer 1 becomes an amorphized GaAs layer 5, and a groove is formed on the surface (see the upper part of FIG. 1 (b)). Then, a part of the surface oxide film 2 are dry-etched with G a 2 O 3 3 to substituted G a A s layer atomic layer more units by bromide surface 1, is replaced by a G a 2 0 3 3 and other portions, and removal of the sputtered-ring portion depends on G a ion及Pi G a 23 3, it is patterned surface in a predetermined pattern in which the grooves are formed in the apex portion (Fig. 1 (B) See below).
また、 第 1図 (c) に示すように、 表面酸化膜 2への Gaイオン 4の 注入量を多くすると、 表面に形成されている A s 203、 3 20等が0 a 2033に置換していく力 前述同様、 ある所定の G aイオン注入量を 超えると、 G a 2033が G aイオンによってスパッタリングされるよう になる (第 1図 (c) 上段参照)。 そして、 0 & 3層1に0 ィォン が注入されることで、 0& 3層1は非晶質化した0 & 3層5となる。 この非晶質ィ匕した G a A s層 5は、 単結晶 G a A sに比べ大きなェツチ ング速度を示す。 このため、 0 & 3層1の表面を、 臭素化物ガスを用 いて超高真空中で、 たとえば 10 -8 P aレベルへの排気後、 500〜 6 00°Cで 1 0— 6〜 1 0— 5P aのガス分圧でのエツチャントガスの導入 によりドライエッチングを行うと、 G aイオン 4が注入されていない部 分に比べて早くエッチングされ、 第 1図 (c) 下段に示すように、 溝の 外側に比べエッチングされる量が多く、 内側に深いエッチングの V溝が 形成される。 As shown in FIG. 1 (c), when the amount of Ga ions 4 implanted into the surface oxide film 2 is increased, As 2 0 3 and 3 2 0 formed on the surface become 0 a 2 0 3 3 gradually replaced the force the same manner as described above, it exceeds a certain predetermined G a ion dose, G a 2 0 3 3 is to be sputtered by G a ion (FIG. 1 (c) refer to top) . Then, 0 & 3 layers 1 to 0 Ion By is injected, 0 & 3 layer 1 becomes 0 and 3-layer 5 was amorphous. The amorphous GaAs layer 5 exhibits a higher etching rate than the single crystal GaAs. For this reason, the surface of the 0 & 3 layer 1 is evacuated to a level of 10 -8 Pa in an ultra-high vacuum using a bromide gas, and then, at 500 to 600 ° C, 10 to 6 to 10 — When dry etching is performed by introducing an etchant gas at a gas partial pressure of 5 Pa, the etching is performed faster than the portion where Ga ions 4 are not implanted, as shown in the lower part of Fig. 1 (c). In addition, the etched amount is larger than the outside of the groove, and a deeply etched V-groove is formed inside.
さらに、 注入する G aイオン量を増やしていくと、 G aA s層 1の非 晶質化の範囲が拡大して、 G aイオンによってスパッタリングされる (第 1図 (d) 上段参照)。 この G aA s層 1の表面を、 前述同様に臭 素化物ガスを用いて超高真空中で、たとえば 1 0 _8 P aレベルへの排気 後、 500〜600°Cで 10— 6〜1 0— 5P aのガス分圧でのエッチヤン トガスの導入により ドライエッチングを行うと、表面に深い溝を加工す ることができる (第 1図 (d) 下段参照)。 Furthermore, when the amount of implanted Ga ions is increased, the range of amorphousization of the GaAs layer 1 is expanded, and sputtering is performed by the Ga ions (see the upper part of Fig. 1 (d)). The surface of the G aA s layer 1, after evacuation of the in ultrahigh vacuum using the aforementioned Similarly odor-fluorinated gases, for example to 1 0 _ 8 P a level, at 500~600 ° C 10- 6 ~1 0-5 Etchiyan in gas partial pressure P a When dry etching is performed by introducing gas, deep grooves can be machined on the surface (see the lower part of Fig. 1 (d)).
このように、 本発明に係るイオンビーム微細加工方法によると、 Ga A s層表面に自然に形成されている A s 203等の表面酸化膜を除去す ることなく、 該表面酸化膜に G aイオンを注入することで、表面に化学 的に安定な G a 203を形成することが可能となる。 そして、注入する G aィォン量を制御することによつて臭素化物によるドライエッチング 後の G a A s層表面をネガ型、 ポジ型のいずれにも加工することが可能 となる。 また、 G aイオン注入時に所定の回路パターンとなるように G a A s層表面をイオンビームで描画することによって、容易に任意の回 路パターンを再現性良く加工することができる。 これによつて、 半導体 デバイスはもちろんであるが、 波長弁別デバイス、 マイクロマシニンク' やマイクロコンポーネント等の微細加工、 量子細線■量子箱等へ応用が 可能となる。 Thus, according to the ion beam microfabrication method according to the present invention, without having to remove the surface oxide film such as A s 2 0 3 which is naturally formed on the Ga A s layer surface, said surface oxide film by implanting G a ion, it is possible to form a chemically stable G a 2 0 3 on the surface. By controlling the amount of Ga ion to be injected, the surface of the GaAs layer after dry etching with bromide can be processed into either a negative type or a positive type. Further, by drawing the surface of the GaAs layer with an ion beam so as to form a predetermined circuit pattern at the time of the Ga ion implantation, an arbitrary circuit pattern can be easily processed with good reproducibility. This makes it possible to apply not only to semiconductor devices, but also to wavelength discrimination devices, micromachining of micromachining 'and microcomponents, and quantum wires and quantum boxes.
なお、 本実施形態例では、 G a A s層について説明したが、 G a x I n !_XA s y P i_y層であれば、本実施形態例で説明した G a A s層と同 様の効果を奏し、 G a A s層に限定されるものではない。 In the present embodiment has described the G a A s layer, if G a x I n! _ X A s y P i_ y layer is, G a A s layer described in this embodiment and The same effect is achieved, and the present invention is not limited to the GaAs layer.
以下、 実施例によって本宪明を更に具体的に説明する。  Hereinafter, the present invention will be described more specifically with reference to examples.
(実施例 1 )  (Example 1)
G a A s層表面に自然に形成されている A s 203等の表面酸化膜の 表面に向ってイオンビーム径を 0. 1 μπιに絞った G aイオンを真空中 で 6 X 1013個/ c m2、 加速電圧 30 k Vで照射して、 表面酸化膜に G aイオンを注入する。 G aイオン注入後、 超高真空装置に設置し、 1 0~8P aレベルへ排気後、 580°Cに昇温し、 G a 203以外の酸化膜の 除去後に、 500-630°Cで 10— 6〜10— 5P aのガス分圧での A s B r 3ガスを導入してェツチングを行なう。 第 2図 (a) に、 その表面の原子間力顕微鏡 (以下、 AFMという。) 像を示す。 第 2図 (a) に示すように、 Ga As層表面には、 As B r 3ガスによってエッチングされなかった G aイオンが注入されて表面酸 化膜が G a 203に置換された部分が凸状に形成されているのが観察で きる。 G a A s layer A s which is naturally formed on the surface 2 0 3 or the like toward the surface of the surface oxide film of the G a ions focused ion beam diameter 0. 1 μπι in vacuo 6 X 10 13 Irradiation is performed at an acceleration voltage of 30 kV / cm 2 and Ga ions are implanted into the surface oxide film. After G a ion implantation, and placed in an ultra-high vacuum device, after evacuation to 1 0 ~ 8 P a level, the temperature was raised to 580 ° C, after removal of the oxide film other than G a 2 0 3, 500-630 ° introducing a s B r 3 gas at the gas partial pressure of C at 10- 6 ~10- 5 P a performing Etsuchingu by. Figure 2 (a) shows an atomic force microscope (AFM) image of the surface. As shown in FIG. 2 (a), the Ga As layer surface, part G a ion that has not been etched by As B r 3 gas is injected surface oxidation film is replaced by a G a 2 0 3 It can be observed that is formed in a convex shape.
(実施例 2)  (Example 2)
G aイオンの注入量を 6 X 1014個/ cm2とした以外、 実施例 1と 同様にして、 G aイオンを注入した後、 表面を A s B r 3ガスでドライ エッチングをおこなった。 After the Ga ions were implanted in the same manner as in Example 1 except that the amount of implanted Ga ions was 6 × 10 14 / cm 2 , the surface was dry-etched with AsBr 3 gas.
第 2図 (b) に、 注入領域中心部分ではドーズ量 (注入量) が局部的 に増大し安定な G a 203がスパッタリングされ、頂点部分に溝が形成さ れたパターンが形成されているのが観察できる。 Second diagram (b), injecting the region center portion dose (injection amount) is locally increased stable G a 2 0 3 is sputtering, a groove on the apex portion is formed pattern is formed Can be observed.
(実施例 3 )  (Example 3)
G aイオンの注入量を 6 X 1015個 /cm2とした以外、 実施例 1と 同様にして、 G aイオンを注入した後、 表面を A s B r 3ガスでドライ エッチングをおこなった。 After the Ga ions were implanted in the same manner as in Example 1 except that the implanted amount of Ga ions was 6 × 10 15 / cm 2 , the surface was dry-etched with AsBr 3 gas.
第 2図 (c) に、 その表面の A FM像を示す。 第 2図 (c) に示すよ うに、 GaAs層表面には、 G aイオンによって、 GaAs層がァモノレ ファス化することで、 A s B r 3にエッチングされ易くなり深い溝が形 成されているのが観察できる。 Figure 2 (c) shows an AFM image of the surface. Uni shown in FIG. 2 (c), the GaAs layer surface, by G a ion, that the GaAs layer is Amonore Fas reduction, tends deep trench etched into the A s B r 3 is made form Can be observed.
(実施例 4)  (Example 4)
G aイオンの注入量を 6 X 1017個 Zc m2とした以外、 実施例 1と 同様にして、 G aイオンを注入した後、 表面を As B r 3ガスでドライ ェツチングをおこなつた。 After the Ga ions were implanted in the same manner as in Example 1 except that the amount of implanted Ga ions was set to 6 × 10 17 Zcm 2 , the surface was dry-etched with AsBr 3 gas.
第 2図 (d) に、 その表面の A FM像を示す。 第 2図 (d) に示すよ うに、 GaAs層表面には、 G aイオンによって、 GaAs層が非晶質 化することで、 As B r 3にエッチングされ易くなり深い溝が形成され ているのが観察できる。 Figure 2 (d) shows an AFM image of the surface. As shown in Fig. 2 (d), the GaAs layer is amorphous on the surface of the GaAs layer by Ga ions. By reduction, the easier becomes deep trench etched into As B r 3 are formed can be observed.
以上のように、 G a A s層表面に形成されている表面酸化膜に G aィ ォンを注入することによって、臭素化物によってエッチングされなレ、化 学的に安定な G a 203を形成することができ、 さらに、 G aイオンの注 入量を制御することによって、 GaAs層表面に形成されるパターンを ポジ型、 ネガ型のいずれにも加工することが可能となる。 産業上の利用可能性 As described above, G a A a surface oxide film s layer formed on the surface by injecting G a I O emissions, such etched by bromide les,-chemical stable G a 2 0 3 By controlling the amount of injected Ga ions, the pattern formed on the GaAs layer surface can be processed into either a positive type or a negative type. Industrial applicability
以上詳しく説明した通り、 この発明により、 Gax I n ixAs yPi— y層等の化合物半導体を含む半導体結晶表面に自然に形成されている表 面酸化膜を除去することなく、その表面酸化膜に G aィオンを注入する ことによって、臭素化物によってエッチングされない化学的に安定な G a 203を形成することができる。 このため、従来のようにエッチングの 際にェツチング用マスクを使用することなく表面に任意の回路パター ンを加工することができる。 さらに、 G aイオンの注入量を制御するこ とによって、 G a x I n i_xA s y Pi— y層表面に形成されるパターンを ポジ型、ネガ型のいずれにも加工することが可能となる。これによつて、 多様な量子デバイス特性を生かした有用な素子例えば量子細線、 量子箱、 回折格子、 マイクロマシンの実現も可能となる。 また、 一原子層毎にェ ツチングすることが可能であるため、 G a x I n i_xA s y 層の結 晶方位によって、 形成される溝の形状を自在に制御可能とできる。 As described above in detail, the present invention, Ga x I ni - x As yPi- y layer without removing the front surface oxide film which is naturally formed on the semiconductor crystal surface comprising a compound semiconductor such as, the surface oxidation by injecting G a Ion membrane, it is possible to form a chemically stable G a 2 0 3 that is not etched by bromide. Therefore, an arbitrary circuit pattern can be processed on the surface without using a mask for etching at the time of etching as in the related art. Furthermore, by the child controls the injection amount of G a ion, G a x I ni _ x A s y Pi- y layer pattern of a positive type formed on the surface, can be processed in any of the negative Becomes This will enable the realization of useful elements, such as quantum wires, quantum boxes, diffraction gratings, and micromachines, utilizing various quantum device characteristics. Further, since it is possible to E Tsuchingu every one atomic layer, the crystal orientation of G a x I ni _ x A s y layer, the shape of the groove to be formed can freely controllable.

Claims

請 求 の 範 囲 The scope of the claims
1. 単体の G a A s及び I n P基板を含む、 G a x I n ^ A s y P卜 y (0≤x, y≤ 1) 層表面に、 任意のイオンビーム径、 イオン電流密 度に制御した G aイオンを注入し、 前記 Ga x I n ^ A s y P y層表 面に形成されている表面酸化膜の存在又は酸素分子照射のもとでの G aイオン打ち込みにより酸化層を選択的に G a 23又は G a 2〇に置換 又は生成させた後、 前記 G a x I η α_χΑ s y P 7層表面を臭素化物に より一原子層単位でドライエッチングし、 前記 G a 2 O 3又は G a 2 Oに 置換した部分以外の前記表面酸化膜及び G a x I n !_XA s y Pト y基板 を除去するネガ型リソグラフィを可能にするイオンビーム微細加工方 法。 1. containing a simple substance of G a A s and I n P substrate, G a x I n ^ A s y P Bok y (0≤x, y≤ 1) on layer surface, any ion beam diameter, the ion current density implanting G a ions control whenever, the Ga x I n ^ a s y G a ion implantation by oxidation in the presence or oxygen molecules irradiation of the surface oxide film P is formed on the y layer table surface after selectively to substituted or generated G a 23 or G a 2 〇 layer, the G a x I η α _ χ Α s dry more monoatomic layer units y P 7 layer surface bromide etched to permit a negative lithography for removing the G a 2 O 3 or G a 2 O wherein the surface oxide film other than substituted moiety to and G a x I n! _ X a s y P DOO y substrate Ion beam fine processing method.
2. 単体の G a A s及ぴ I n P基板を含む、 G a x I n ^ A s y P y (0≤xN y≤ 1) 層表面に、 任意のイオンビーム径、 イオン電流密 度に制御した G aイオンを注入し、 前記 Ga x I n卜 x A s y P y層表 面に形成されている表面酸化膜の存在又は酸素分子照射のもとでの G aイオン打ち込みにより酸ィヒ層を選択的に G a 203又は G a 20に置換 又は生成させ、 前記 G aイオンにより前記 G a203又は G a 20の一部 をスパッタリングし、 前記 G a203又は G a 20のスパッタリングされ た部分から該 G aイオンを前記 G a x I n X_XA s y層に注入して 前記 Gax I xA S
Figure imgf000013_0001
y層を非晶質化させた後、 臭素化物により 一原子層単位でドライエッチングし、 前記 G a 203又は0 a 20に置換 した部分以外の前記表面酸化膜及びその部分の G ax l n i xA S yPi —y層と G aイオン注入で非晶質化された Ga x I n卜 x A s y P卜 y層を 除去するポジ型リソグラフィを可能にするイオンビーム微細加工方法。
2. containing a simple substance of G a A s及Pi I n P substrate, G a x I n ^ A s y P y (0≤x N y≤ 1) on layer surface, any ion beam diameter, the ion current density Controlled ion implantation, and the presence of a surface oxide film formed on the surface of the Ga x In x A s y P y layer or implantation of Ga ions under irradiation of oxygen molecules. the acid I arsenide layer selectively is substituted or generated G a 2 0 3 or G a 2 0, by sputtering a portion of said G a 2 0 3 or G a 2 0 by the G a ion, wherein G a 2 0 3 or G a 2 0 sputtered portion wherein the G a ions from G a x I n X _ X a s said injected into y layer Ga x I xA S
Figure imgf000013_0001
After the y layer is amorphous, and dry etching in one atomic layer unit by bromide, G a of the G a 2 0 3 or 0 a 2 0 the surface oxide film and portions thereof other than the substituted part in x l ni xA S yPi - y layer and G a ion implantation has been amorphized Ga x I n Bok x a s y P Bok y layer ion beam microfabrication method that allows a positive lithography for removing.
3. 前記臭素化物に、 As B r 3、 PB r 3を用いる請求の範囲第 1項 に記載のイオンビーム微細加工方法。 3. The bromine compound, As B r 3, ion beam micromachining process according to claim 1 using a PB r 3.
4. 前記 G aイオンの注入量を制御することによって前記 G a x I η ιXA s yPi y層表面を、 ナノ 'オーダー単位でエッチング深さ、 及ぴ 加工領域の側面形状をその場で制御することが可能な請求の範囲第 1 項に記載のィオンビーム微細加工方法。 4. The G a x I eta iota by controlling the injection amount of the G a ion - X A s yPi y layer surface nano 'order units etching depth situ side shape of及Pi machining area The ion beam micromachining method according to claim 1, wherein the ion beam micromachining method can be controlled by:
5. 前記 G aイオンの注入量を制御することによって前記 G a x I nx 5. By controlling the dose of the G a ion, the G a x I n x
S yPi-y層表面を、 ナノ 'オーダー単位でエッチング深さ、 及ぴ 加工領域の側面形状をその場で制御することが可能な請求の範囲第 3 項に記載のイオンビーム微細加工方法。 4. The ion beam micromachining method according to claim 3, wherein the etching depth of the surface of the SyPi-y layer and the side surface shape of the machining region can be controlled on the spot in nanometer order.
6. 前記臭素化物に、 As B r 3、 PB r 3を用いる請求の範囲第 2項 に記載のイオンビーム微細加工方法。 6. The bromine compound, As B r 3, ion beam micromachining process according to claim 2 using the PB r 3.
7. 前記 G aイオンの注入量を制御することによって前記 G a x I n! _XA s
Figure imgf000014_0001
ナノ 'オーダー単位でエッチング深さ、 及び 加工領域の側面形状をその場で制御することが可能な請求の範囲第 2 項に記載のィオンビーム微細加工方法。
7. The by controlling the injection amount of the G a ion G a x I n! _ X A s
Figure imgf000014_0001
3. The ion beam fine processing method according to claim 2, wherein the etching depth and the side surface shape of the processing area can be controlled in situ in nano-order units.
8. 前記 G aイオンの注入量を制御することによって前記 G ax I nx 8. The G a x I n x by controlling the dose of the G a ion
S y層表面を、 ナノ 'オーダー単位でエッチング深さ、 及ぴ 加工領域の側面形状をその場で制御することが可能な請求の範囲第 6 項に記載のイオンビーム微細加工方法。 S The y layer surface, a nano 'order units etch depth, range capable of controlling the side shape of及Pi machining region in situ according according to paragraph 6 ion beam microfabrication methods.
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