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WO2003012981A1 - Circuit de polarisation a element actif pour entree de transistor a puissance rf - Google Patents

Circuit de polarisation a element actif pour entree de transistor a puissance rf Download PDF

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Publication number
WO2003012981A1
WO2003012981A1 PCT/IB2002/002902 IB0202902W WO03012981A1 WO 2003012981 A1 WO2003012981 A1 WO 2003012981A1 IB 0202902 W IB0202902 W IB 0202902W WO 03012981 A1 WO03012981 A1 WO 03012981A1
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WO
WIPO (PCT)
Prior art keywords
active element
signal
transistor
input
gate
Prior art date
Application number
PCT/IB2002/002902
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English (en)
Other versions
WO2003012981B1 (fr
Inventor
Lennart Mathe
Thomas Marra
Original Assignee
Telefonaktiebolaget Lm Ericsson
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget Lm Ericsson filed Critical Telefonaktiebolaget Lm Ericsson
Publication of WO2003012981A1 publication Critical patent/WO2003012981A1/fr
Publication of WO2003012981B1 publication Critical patent/WO2003012981B1/fr

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/193—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters

Definitions

  • the present invention pertains generally to the field of radio frequency (RF) amplifier devices and, more specifically, to techniques for direct current (DC) biasing the input of a transistor used for amplifying a RF signal without incurring memory effect problems.
  • RF radio frequency
  • DC direct current
  • the invention relates to RF power amplification circuits in wireless communication devices and networks.
  • GaAs FETs Gallium Arsenide field effect transistors
  • GaAs FETs have been preferred for power amplification applications, such as, e.g., use in mobile communication devices to provide power amplification for RF signals.
  • GaAs FETs have a relatively high saturation power efficiency at frequencies of a few giga-hertz, e.g., at 2 GHZ.
  • a GaAs FET When a GaAs FET is operated as a common source amplifier, such as in a metal- semiconductor field effect transistor (MESFET), the transistor gate is supplied with both the RF input signal to be amplified, as well as a DC bias voltage. Since the gate of a GaAs FET is a Shottky barrier, the relatively strong RF input signal power will rectify the Shottky barrier and generate high positive gate current, which can destroy the transistor device. As a result, the DC bias supply circuitry is conventionally designed to prevent a high gate current.
  • MOSFET metal- semiconductor field effect transistor
  • FIG. 1 illustrates a conventional power amplifier circuit 10 for amplifying a RF input signal, designated as "RFIN,” with the amplified output signal designated as "RFou ⁇ .”
  • the amplifier 10 includes a GaAs FET 15 operated as a common-source amplifier, with the input signal RFIN applied to the gate terminal, the output signal RFOUT received off the drain terminal, and the source terminal providing a relative ground for the common element current path.
  • the amplifier 10 further comprises a gate bias circuit 20 for coupling a DC source 35 to the gate terminal of the GaAs FET 15.
  • a DC blocking capacitor 25 is used in a conventional fashion to prevent the DC voltage from source 35 from passing upstream along the RFIN signal path.
  • the gate bias voltage from the DC source 35 is coupled to the gate of the GaAs FET 15 via a series connected, current limiting resistor 30.
  • FIG. 2 is a graph of an exemplary gate current Io versus power of the RF input signal RFIN if the signal were connected directly to the bias voltage source 35 without the resistor 30.
  • the gate current I G increases in the negative direction from the drain to gate. This negative gate current I G is caused by drain-to-gate breakdown of the GaAs FET 15.
  • the gate Shottky diode is rectified, i.e., forward biased, causing the gate current IQ to rapidly increase in the positive direction from the gate to the source. Heat generated by this positive gate current IQ, if allowed to increase unchecked, can destroy the GaAs FET device 15.
  • the resistor 30 limits high positive gate current by producing a voltage drop between the voltage bias source 35 and the gate of the GaAs FET 15 when positive gate current flows through the resistor 30.
  • a relatively large value capacitor 40 is connected to ground between the DC voltage source 35 and the resistor 30 to create a ground path for the gate current.
  • a shunt inductance 45 is coupled between the resistor 30 and the transistor gate to prevent the RF input signal RF ⁇ N from flowing through the capacitor 40.
  • the shunt inductance 45 comprises a quarter-wavelength AA ⁇ ) stub, where ⁇ is the wavelength of the fundamental carrier frequency f 0 of the RF input signal, e.g., 2 GHz, in
  • V ⁇ ⁇ stub appears as a
  • bypass capacitor 50 provides a short to ground for the RFIN signal and an open circuit for the voltage bias source 35, and is invisible to
  • the l / 4 ⁇ stub 45 passes the voltage bias source
  • a RF choke could be used instead of the VA stub
  • the voltage drop across the resistor 30 varies the gate bias voltage when there is positive gate current. This variation in the gate bias voltage varies the bias condition of the
  • the RF input signal RFIN is typically amplitude modulated, a time-varying amplitude envelope is impressed on the RF input signal.
  • this time-varying amplitude is large enough to forward bias the Shottky diode of the gate of the GaAs FET 15, positive gate current is produced.
  • the variation in the gate bias voltage will depend not only on the instantaneous gate current, but on the history of the gate current leading up to the instantaneous gate current, as well. This phenomenon, commonly known as a "memory effect,” is caused by the voltage bias capacitor 40 forming a RC circuit with resistor 30, which limits the response time of the gate voltage circuit 20 to changes in the gate current.
  • the gate bias circuit 20 can not change the gate bias voltage fast enough to follow instantaneous changes in the gate current. As such, the ability of predistortion to correct the distortion of the RF output signal caused by the variation in the gate bias voltage in conventional RF amplifier circuits is limited.
  • a circuit for gate biasing a transistor used for amplifying an RF signal in a wireless communication device, a handset or radio base station.
  • the bias circuit includes an active element in series with a resistor in a DC bias circuit.
  • the active element provides a relatively low impedance over a bandwidth comparable to an amplitude modulation bandwidth of the RF signal, such that a DC bias voltage applied at the active element has a fixed DC voltage at the resistor input, i.e., without any memory effect, thereby allowing for improved predistortion compensation.
  • FIG. I is a circuit schematic diagram of a conventional power amplifier.
  • FIG. 2 is a graph showing the gate current of a GaAs FET versus power level of an RF input signal in a power amplifier circuit without a gate current limiting resistor.
  • FIG. 3 is a circuit schematic diagram of a power amplifier according to one embodiment of the invention.
  • the passive capacitor used for providing a ground path for the gate current in conjunction with the current limiting resistor in conventional gate biasing circuits is replaced with an active circuit element which provides a low output impedance over the operating frequency bandwidth of the RF input signal.
  • the gate current will see only a purely resistive load throughout the signal frequency bandwidth, without also further introducing unwanted memory effect into the biasing circuit.
  • the invention may be equally employed in biasing circuits for other RF devices having drive dependent gate currents.
  • devices such as a GaAs pHEMT may also have drive dependent gate currents.
  • bi-polar transistors do not have gates, and instead receive the RF input signal at their base (with a common emitter configuration), or emitter (with a common base configuration), they still require DC input biasing and have the same current limiting resistor configuration as the GaAs FET embodiments described herein.
  • HBTs heterojunction bi-polar transistors
  • the invention is not limited to gate biasing circuits, per se.
  • FIG. 3 shows a circuit schematic of a RF amplifier circuit 110 constructed in accordance with one embodiment of the invention.
  • the amplifier 110 includes a GaAs FET 115 operated as a common-source amplifier, with the input signal RFIN applied to the gate terminal, the output signal RFou ⁇ received off the drain terminal, and the source terminal providing a relative ground for the common element current path.
  • the amplifier 110 further comprises a gate bias circuit 120 for coupling a DC source 135 to the gate terminal of the GaAs FET 115.
  • a DC blocking capacitor 125 is used in a conventional fashion to prevent the DC voltage from source 35 from passing upstream along the RFIN signal path.
  • the gate bias voltage from the DC source 135 is coupled to the gate of the GaAs FET 115 via a series connected, current limiting resistor 130, which provides a negative feedback to control the gate current and, thus, protect the transistor device 115.
  • a shunt inductance 145 and bypass capacitor 150 are coupled between the resistor 130 and the gate of transistor 115 to short circuit the RF input signal RFIN, while providing a low (essentially purely resistive) impedance path for the DC bias voltage source 135.
  • inductance 145 which may comprise a quarter-wavelength (Vi ⁇ ) stub, or alternatively, an RF
  • choke passes the DC voltage from source 135 to the gate of the GaAs FET 115, while blocking the RF input signal RFIN from entering the gate bias circuit 120.
  • the passive voltage bias capacitor 40 of conventional biasing circuit 20 is replaced in circuit 120 with an active element 140 connected in series between the voltage bias source 135 and the current limiting resistor 130.
  • the active element circuit 140 comprises an operational amplifier (op amp) 155 having a negative input terminal, a positive input terminal and a single-ended output.
  • a first resistor 160 is connected between the voltage bias source 135 and the negative input terminal of the op amp 155, and a second resistor 165 is connected between the negative input terminal and the output of the op amp 155.
  • the positive input terminal of the op amp 155 is connected to ground and the output is connected to the current limiting resistor 130.
  • the op amp 155 preferably has high internal impedance at its two input terminals so that negligible current flows into the negative input terminal from the voltage bias source 135. That way, almost all of the current passing through resistor 160 from the voltage bias source 135 also flows through resistors 165 and 130.
  • the op amp 155 preferably, has a relative low output impedance and a high gain.
  • the gate bias voltage at the gate of transistor 115 is approximately equal to the output voltage V out of the active element circuit 140.
  • the actial value of resistors 160 and 165 are dependent on the desired operating characteristics of the amplifier circuit 110. For example, when resistors 160 and 165 have equal resistance, a gate voltage bias of -1.5 V can be achieved by using a voltage bias Vbias of 1.5 V.
  • the op amp 155 preferably has a frequency bandwidth that at least encompasses the bandwidth of the gate current of the transistor 115, such that that the output impedance of the op amp 155 remains purely resistive throughout the bandwidth of the gate current. For example, for a gate current bandwidth of DC to 10 MHz, the op amp 155 can have a bandwidth of DC to 30 MHz. This way, the output impedance of the gate bias circuit 120 seen at the gate of transistor 115 is purely resistive throughout the bandwidth of the gate current. As a result, the variation in the gate bias voltage produced by the gate bias circuit 120 only depends on the instantaneous gate current, without the undesirable memory effect associated with the voltage bias capacitor 40 of the prior art biasing circuit 20.
  • the op amp 155 and resistors 160 and 165 of the active element circuit 140 may be arranged to form a non-inverting amplifier, instead of the inverting amplifier.
  • the active element circuit 140 may comprise different circuit components, while still providing relatively low output impedance throughout the bandwidth of the gate current of transistor 115.
  • the op amp 155 may be replaced by a suitable arrangement of transistors.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

L'invention concerne un circuit de polarisation permettant de polariser un dispositif (par ex., un transistor à effet de champ à l'arséniure de gallium - GaAs) utilisé pour amplifier un signal de radio fréquence (RF). Ce circuit de polarisation comprend un élément actif en série avec une résistance, cet élément actif fournissant une impédance relativement faible dans une largeur de bande comparable à une largeur de bande à modulation d'amplitude du signal RF, de façon qu'une tension de polarisation cc appliquée au niveau de l'élément actif produise une tension cc fixe au niveau de l'entrée de la résistance, c'est-à-dire sans aucun effet de mémoire, permettant ainsi une compensation de distorsion préalable améliorée de la tension non linéaire du signal RF.
PCT/IB2002/002902 2001-07-27 2002-07-25 Circuit de polarisation a element actif pour entree de transistor a puissance rf WO2003012981A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/917,573 2001-07-27
US09/917,573 US6893101B2 (en) 2001-07-27 2001-07-27 Active element bias circuit for RF power transistor input

Publications (2)

Publication Number Publication Date
WO2003012981A1 true WO2003012981A1 (fr) 2003-02-13
WO2003012981B1 WO2003012981B1 (fr) 2003-06-05

Family

ID=25438983

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2002/002902 WO2003012981A1 (fr) 2001-07-27 2002-07-25 Circuit de polarisation a element actif pour entree de transistor a puissance rf

Country Status (2)

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US (1) US6893101B2 (fr)
WO (1) WO2003012981A1 (fr)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7196586B1 (en) * 2003-12-22 2007-03-27 Cypress Semiconductor Corporation Oscillator amplifier circuit operable to provide symmetric current limiting and method of same
US7728672B2 (en) 2007-12-21 2010-06-01 Electronics And Telecommunications Research Institute RF amplifier
US9264077B2 (en) * 2012-05-31 2016-02-16 Blackberry Limited Mobile communications device including an RF transmitter providing impedance fluctuation dampening and related methods
US9417641B2 (en) * 2013-11-04 2016-08-16 Marvell World Trade, Ltd. Memory effect reduction using low impedance biasing
US10056869B2 (en) * 2016-01-20 2018-08-21 Mediatek Inc. Power amplifier system and associated control circuit and control method
KR102583788B1 (ko) * 2018-07-09 2023-09-26 삼성전기주식회사 누설 전류 저감형 고주파 스위치 장치
CN110719077B (zh) * 2019-10-23 2022-08-16 广州慧智微电子股份有限公司 一种功率放大器及电子设备
CN111200407B (zh) * 2020-01-19 2023-05-02 广州慧智微电子股份有限公司 一种信号放大电路和有源偏置电路
CN113630092B (zh) * 2021-08-20 2023-10-17 电子科技大学 一种反射式可调预失真器

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4859965A (en) * 1989-02-27 1989-08-22 The United States Of America As Represented By The Secretary Of The Army Optical gain control of GaAs microwave monolithic integrated circuit distributed amplifier
US5432473A (en) * 1993-07-14 1995-07-11 Nokia Mobile Phones, Limited Dual mode amplifier with bias control
US6018270A (en) * 1993-07-12 2000-01-25 Intersil Corporation Low voltage RF amplifier and mixed with single bias block and method
EP1079515A1 (fr) * 1999-08-27 2001-02-28 Kokusai Electric Co., Ltd. Circuit amplificateur à transistors MOSFET
US6215358B1 (en) * 1999-09-16 2001-04-10 Samsung Electronics Co., Ltd. Temperature compensated bias network for a power amplifier and method of operation
EP1128548A2 (fr) * 2000-02-23 2001-08-29 Japan Radio Co., Ltd Circuit de polarisation pour un transistor à effet de champ

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Publication number Priority date Publication date Assignee Title
JPS52153364A (en) * 1976-06-15 1977-12-20 Fujitsu Ltd Microwave amplifier
US4123722A (en) * 1977-06-09 1978-10-31 Bell Telephone Laboratories, Incorporated Operational amplifier decoupling circuit
JPS545366A (en) * 1977-06-15 1979-01-16 Toshiba Corp Base current compensating circuit for transistor
JPS55150601A (en) 1979-05-14 1980-11-22 Nec Corp Electric power supply circuit
US4320352A (en) * 1980-01-29 1982-03-16 Ford Aerospace & Communications Corp. Input optimized FET bias circuit
GB2276288A (en) 1993-03-16 1994-09-21 Esen Bayar Stabilisation circuit for microwave amplifiers and active networks using butterfly stub
JP2001079515A (ja) 1999-09-20 2001-03-27 Kurita Water Ind Ltd 重金属固定化剤及び重金属含有灰の処理方法
US6304129B1 (en) 1999-10-08 2001-10-16 Ericsson Inc. Compensation circuit and method for a power transistor
JP2001128548A (ja) 1999-11-09 2001-05-15 Pilot Precision Co Ltd 台木と穂木とを接合するための棒状部材の供給装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4859965A (en) * 1989-02-27 1989-08-22 The United States Of America As Represented By The Secretary Of The Army Optical gain control of GaAs microwave monolithic integrated circuit distributed amplifier
US6018270A (en) * 1993-07-12 2000-01-25 Intersil Corporation Low voltage RF amplifier and mixed with single bias block and method
US5432473A (en) * 1993-07-14 1995-07-11 Nokia Mobile Phones, Limited Dual mode amplifier with bias control
EP1079515A1 (fr) * 1999-08-27 2001-02-28 Kokusai Electric Co., Ltd. Circuit amplificateur à transistors MOSFET
US6215358B1 (en) * 1999-09-16 2001-04-10 Samsung Electronics Co., Ltd. Temperature compensated bias network for a power amplifier and method of operation
EP1128548A2 (fr) * 2000-02-23 2001-08-29 Japan Radio Co., Ltd Circuit de polarisation pour un transistor à effet de champ

Also Published As

Publication number Publication date
US6893101B2 (en) 2005-05-17
WO2003012981B1 (fr) 2003-06-05
US20030020546A1 (en) 2003-01-30

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