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WO2003001600A3 - Speicherzelle, speicherzellenanordnung und herstellungsverfahren - Google Patents

Speicherzelle, speicherzellenanordnung und herstellungsverfahren Download PDF

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Publication number
WO2003001600A3
WO2003001600A3 PCT/DE2002/002141 DE0202141W WO03001600A3 WO 2003001600 A3 WO2003001600 A3 WO 2003001600A3 DE 0202141 W DE0202141 W DE 0202141W WO 03001600 A3 WO03001600 A3 WO 03001600A3
Authority
WO
WIPO (PCT)
Prior art keywords
layer
memory cell
producing
same
silicide
Prior art date
Application number
PCT/DE2002/002141
Other languages
English (en)
French (fr)
Other versions
WO2003001600A2 (de
Inventor
Herbert Palm
Josef Willer
Original Assignee
Infineon Technologies Ag
Herbert Palm
Josef Willer
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Herbert Palm, Josef Willer filed Critical Infineon Technologies Ag
Priority to KR1020037016748A priority Critical patent/KR100629383B1/ko
Priority to EP02742805A priority patent/EP1399972A2/de
Priority to JP2003507893A priority patent/JP3976729B2/ja
Publication of WO2003001600A2 publication Critical patent/WO2003001600A2/de
Publication of WO2003001600A3 publication Critical patent/WO2003001600A3/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0413—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

Auf den Source-/Drain-Bereichen (3, 4) von Speichertransistoren mit in Gräben angeordneten Gate-Elektroden (2) und ONO-Speicherschichtfolge (5, 6, 7) ist eine entsprechend den Bitleitungen streifenförmig strukturierte elektrisch leitende Schicht (8) oder Schichtfolge angeordnet, insbesondere ein Metallsilicid oder eine Polysiliziumschicht (14) mit darauf aufgebrachter metallhaltiger Schicht (15), die den ohmschen Widerstand der vergrabenen Bitleitungen reduziert. Das Metallsilicid ist bevorzugt Kobaltsilicid; die metallhaltige Schicht bevorzugt Wolframsilicid oder WN/W.
PCT/DE2002/002141 2001-06-21 2002-06-12 Speicherzelle, speicherzellenanordnung und herstellungsverfahren WO2003001600A2 (de)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020037016748A KR100629383B1 (ko) 2001-06-21 2002-06-12 메모리 셀, 메모리 셀을 포함하는 장치 및 메모리 셀 제조 방법
EP02742805A EP1399972A2 (de) 2001-06-21 2002-06-12 Speicherzelle, speicherzellenanordnung und herstellungsverfahren
JP2003507893A JP3976729B2 (ja) 2001-06-21 2002-06-12 メモリセル、メモリセル構成、および製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10129958.3 2001-06-21
DE10129958A DE10129958B4 (de) 2001-06-21 2001-06-21 Speicherzellenanordnung und Herstellungsverfahren

Publications (2)

Publication Number Publication Date
WO2003001600A2 WO2003001600A2 (de) 2003-01-03
WO2003001600A3 true WO2003001600A3 (de) 2003-08-21

Family

ID=7688966

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2002/002141 WO2003001600A2 (de) 2001-06-21 2002-06-12 Speicherzelle, speicherzellenanordnung und herstellungsverfahren

Country Status (8)

Country Link
US (2) US6548861B2 (de)
EP (1) EP1399972A2 (de)
JP (1) JP3976729B2 (de)
KR (1) KR100629383B1 (de)
CN (1) CN100524774C (de)
DE (1) DE10129958B4 (de)
TW (1) TW567612B (de)
WO (1) WO2003001600A2 (de)

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Also Published As

Publication number Publication date
WO2003001600A2 (de) 2003-01-03
US20030151091A1 (en) 2003-08-14
US20030006428A1 (en) 2003-01-09
CN1526170A (zh) 2004-09-01
US6794249B2 (en) 2004-09-21
KR20040007749A (ko) 2004-01-24
US6548861B2 (en) 2003-04-15
DE10129958A1 (de) 2003-01-09
DE10129958B4 (de) 2006-07-13
JP3976729B2 (ja) 2007-09-19
KR100629383B1 (ko) 2006-09-29
JP2004531084A (ja) 2004-10-07
TW567612B (en) 2003-12-21
CN100524774C (zh) 2009-08-05
EP1399972A2 (de) 2004-03-24

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