+

WO2003065591A3 - A method and decoding apparatus using linear code with parity check matrices composed from circulants - Google Patents

A method and decoding apparatus using linear code with parity check matrices composed from circulants Download PDF

Info

Publication number
WO2003065591A3
WO2003065591A3 PCT/US2002/017081 US0217081W WO03065591A3 WO 2003065591 A3 WO2003065591 A3 WO 2003065591A3 US 0217081 W US0217081 W US 0217081W WO 03065591 A3 WO03065591 A3 WO 03065591A3
Authority
WO
WIPO (PCT)
Prior art keywords
circulants
parity check
check matrices
decoding apparatus
matrices composed
Prior art date
Application number
PCT/US2002/017081
Other languages
French (fr)
Other versions
WO2003065591A2 (en
Inventor
Alexander V Kuznetsov
Bane Vasic
Erozan Kurtas
Original Assignee
Seagate Technology Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seagate Technology Llc filed Critical Seagate Technology Llc
Priority to AU2002312175A priority Critical patent/AU2002312175A1/en
Publication of WO2003065591A2 publication Critical patent/WO2003065591A2/en
Publication of WO2003065591A3 publication Critical patent/WO2003065591A3/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/31—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining coding for error detection or correction and efficient use of the spectrum
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
    • H03M13/1117—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
    • H03M13/1117—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule
    • H03M13/112—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule with correction functions for the min-sum rule, e.g. using an offset or a scaling factor
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/1134—Full parallel processing, i.e. all bit nodes or check nodes are processed in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105—Decoding
    • H03M13/1131—Scheduling of bit node or check node processing
    • H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6577—Representation or format of variables, register sizes or word-lengths and quantization
    • H03M13/658—Scaling by multiplication or division
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1515—Reed-Solomon codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/46—Conversion to or from run-length codes, i.e. by representing the number of consecutive digits, or groups of digits, of the same kind by a code word and a digit indicative of that kind

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Error Detection And Correction (AREA)

Abstract

The present invention provides a novel method and apparatus (215) for decoding digital information transmitted through the communication channel or recorded on a recording medium. The method and apparatus are preferably applied in the systems where data is encoded using regular LDPC codes with parity check matrices composed from circulants (a matrix is called a circulant if all its column or row are cyclic shifts each other).
PCT/US2002/017081 2002-01-29 2002-05-30 A method and decoding apparatus using linear code with parity check matrices composed from circulants WO2003065591A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2002312175A AU2002312175A1 (en) 2002-01-29 2002-05-30 A method and decoding apparatus using linear code with parity check matrices composed from circulants

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US35261202P 2002-01-29 2002-01-29
US60/352,612 2002-01-29

Publications (2)

Publication Number Publication Date
WO2003065591A2 WO2003065591A2 (en) 2003-08-07
WO2003065591A3 true WO2003065591A3 (en) 2003-11-27

Family

ID=27663115

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/017081 WO2003065591A2 (en) 2002-01-29 2002-05-30 A method and decoding apparatus using linear code with parity check matrices composed from circulants

Country Status (2)

Country Link
AU (1) AU2002312175A1 (en)
WO (1) WO2003065591A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108199722B (en) * 2018-01-10 2021-07-20 桂林电子科技大学 A BIBD-LDPC Code Construction Method Based on Matrix Lattice

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ES2282671T3 (en) 2002-07-03 2007-10-16 The Directv Group, Inc. CODIFICATION OF LOW DENSITY PARITY CHECK CODES (LDPC) USING A STRUCTURED PARITY CHECK MATRIX.
US7577207B2 (en) 2002-07-03 2009-08-18 Dtvg Licensing, Inc. Bit labeling for amplitude phase shift constellation used with low density parity check (LDPC) codes
US7020829B2 (en) 2002-07-03 2006-03-28 Hughes Electronics Corporation Method and system for decoding low density parity check (LDPC) codes
US20040019845A1 (en) 2002-07-26 2004-01-29 Hughes Electronics Method and system for generating low density parity check codes
US7864869B2 (en) 2002-07-26 2011-01-04 Dtvg Licensing, Inc. Satellite communication system utilizing low density parity check codes
WO2005096510A1 (en) * 2004-04-02 2005-10-13 Nortel Networks Limited Ldpc encoders, decoders, systems and methods
KR100837730B1 (en) * 2006-09-29 2008-06-13 한국전자통신연구원 How to encode an LDPC code using the result of checking the parity specified in advance
FR2917920B1 (en) * 2007-06-22 2009-10-09 Centre Nat Rech Scient AUTHENTICATION METHOD USING AN ERROR-CORRECTING CODE DECODING FROM A PUBLIC MATRIX
KR101503058B1 (en) * 2008-02-26 2015-03-18 삼성전자주식회사 Method and apparatus for channel encoding / decoding in a communication system using a low-density parity-check code
US12034454B2 (en) 2020-03-23 2024-07-09 Telefonaktiebolaget Lm Ericsson (Publ) Verifying data integrity in a receiver

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
B. VASIC: "Structured Iteratively Decodable Codes Based on Steiner Systems and Their Application in Magnetic Recording", PROCEEDINGS OF GLOBECOM 2001, November 2001 (2001-11-01), SAN ANTONIO, TX, USA, pages 2954 - 2960, XP002254521 *
FAN J L: "Constrained coding and soft iterative decoding", PROCEEDINGS OF THE IEEE INFORMATION THEORY WORKSHOP 2001, 2 September 2001 (2001-09-02), CAIRNS, AUSTRALIA, pages 18 - 20, XP010560834 *
SOLJANIN E ED - INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS: "SIMPLE SOFT-OUTPUT DETECTION FOR MAGNETIC RECORDING CHANNELS", PROCEEDINGS OF THE 2000 IEEE INTERNATIONAL SYMPOSIUM ON INFORMATION THEORY. ISIT 2000. SORRENTO, ITALY, JUNE 25 - 30, 2000, IEEE INTERNATIONAL SYMPOSIUM ON INFORMATION THEORY, NEW YORK, NY : IEEE, US, 25 June 2000 (2000-06-25), pages 257, XP001082808, ISBN: 0-7803-5858-9 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108199722B (en) * 2018-01-10 2021-07-20 桂林电子科技大学 A BIBD-LDPC Code Construction Method Based on Matrix Lattice

Also Published As

Publication number Publication date
WO2003065591A2 (en) 2003-08-07
AU2002312175A1 (en) 2003-09-02

Similar Documents

Publication Publication Date Title
WO2007075043A3 (en) Methods and apparatuses for decoding or encoding using channel code or ldpc
WO2002001561A3 (en) Method and apparatus for encoding with unequal protection in magnetic recording channels having concatenated error correction codes
WO2006016751A3 (en) Method of encoding and decoding using low density parity check matrix
EP1801982A3 (en) Encoder, decoder, methods of encoding and decoding
CN101971260B (en) Error correction coding of longitudinal position information
WO2003065591A3 (en) A method and decoding apparatus using linear code with parity check matrices composed from circulants
KR850006950A (en) Information transmission device and method and decoding device and method
HK1027693A1 (en) Method and apparatus for providing error protection for over-the-air file transfer.
WO2002013449A3 (en) Apparatus and method for providing turbo code interleaving in a communications system
US7071851B1 (en) Techniques for implementing non-uniform constraints in modulation encoded data
KR970704271A (en) Recording Media, Digital Modulation / Demodulation Devices, and Digital Modulation / Demodulation Methods
WO2003085842A3 (en) Method for iterative hard-input forward error correction
ATE534993T1 (en) DATA RECORDING METHOD AND RECORDING MEDIUM
WO2004073178A3 (en) Continuous backup audio
WO2010058994A3 (en) Channel-encoding/decoding apparatus and method using low-density parity-check codes
US9331716B2 (en) Systems and methods for area efficient data encoding
EP0696799A4 (en) Digital signal encoding method and apparatus, digital signal recording medium, and digital signal decoding method and apparatus
US20140281790A1 (en) Systems and Methods for Multi-Stage Encoding Of Concatenated Low Density Parity Check Codes
KR970706572A (en) DATA PROCESSING METHOD FOR GENERATING ERROR CORRECTION PRODUCT CODE BLOCK, DATA PROCESSING METHOD FOR RECORDING DATA IN RECORDING MEDIUM, AND DATA PROCESSING DEVICE FOR DATA)
CN100539445C (en) The error correction extra play is embedded the method and apparatus of error correcting code
US6933865B1 (en) Method and apparatus for coded symbol stuffing in recording systems
JP2005522138A5 (en)
EP1432129A3 (en) Iterative Decoding of parallel concatenated Zigzag codes
WO2001071701A3 (en) Selected data compression for digital pictorial information
EP1695350B1 (en) Data storage system

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NO NZ OM PH PL PT RO RU SD SE SG SI SK SL TJ TM TN TR TT TZ UA UG UZ VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP

DPE2 Request for preliminary examination filed before expiration of 19th month from priority date (pct application filed from 20040101)
点击 这是indexloc提供的php浏览器服务，不要输入任何密码和下载