WO2003049282A1

WO2003049282A1 - Fully-differentiated differential amplifier with high input impedance

Info

Publication number: WO2003049282A1
Application number: PCT/DE2002/003771
Authority: WO
Inventors: Admir Alihodzic
Original assignee: Infineon Technologies Ag
Priority date: 2001-11-29
Filing date: 2002-10-04
Publication date: 2003-06-12
Also published as: DE10158709A1

Abstract

The invention relates to a circuit with an input voltage (VIN) and an output voltage (VOUT), comprising a fully-differentiated differential amplifier (FDDA) with two differential input pairs (3, 4; 3', 4') and a differential output pair (5, 5').A number of resistances (R3,..., R7, R3',..., R7') are wired in series between the output pair (5, 5') by means of connection nodes. Each input (3, 3') of an input pair may be connected to one of the connection nodes by means of two selector switches (S, S').

Description

description

Fully differential differential amplifier with high input impedance

The invention relates to a circuit, in particular an amplifier circuit, with a fully differential differential amplifier.

Using an amplifier, electrical input voltages can be amplified and output as electrical output voltages. Such amplifiers are used, for example, as microphone amplifiers or as instrumentation amplifiers. For such applications, relatively high gains are usually desirable and very low noise is necessary. Low thermal noise in turn requires low resistance values within the amplifier. In addition, a high input impedance, a low power requirement and a small required area are required in many applications.

A conventional fully differential amplifier (FDA), as shown in FIG. 1, has a differential pair of inputs 1 and 1 ', between which an input voltage VIN is present, and a differential pair of outputs 2 and 2', between which an output voltage VOUT can be tapped. A resistor Rl or Rl 'is connected in front of the inputs 1 and 1'. Each input 1 or 1 'is connected to an output 2 or 2' via a feedback branch, each of which contains a resistor R2 or R2 '. In order to achieve a low sensitivity to external interference, a high degree of symmetry in the external wiring of the fully differential amplifier FDA is required. For this purpose, the resistors R1 and R1 'and the resistors R2 and R2' each have the same resistance values. In the amplifier circuit shown in FIG. 1, it is not possible to achieve a very high input impedance with a small area requirement at the same time. If, for example, a value of over 100 kΩ is selected for the resistor R1, the resistor R2 must have a value of 3.2 MΩ with a maximum amplification of 30 dB. This high resistance value leads to an unacceptably large area requirement.

Another group of amplifiers includes fully differential difference amplifiers (FDDA). In contrast to the fully differential amplifier described above, these amplifiers have a further differential input pair. The output voltage of such a fully differential differential amplifier is proportional to the difference between the two differential input voltages. The properties of a fully differential differential amplifier are described in the article "Fully Differential Basic Building Blocks Based on Fully Differential Difference Amplifiers with Unity-Gain Difference Feedback" by JF Duque-Carrillo, G. Torelli, R. Perez-Aloe, JM Valverde and F. Maloberti, published in IEEE Transactions on Circuits and Systems - I: Fundamental Theory and Applications, Volume 42, No. 3, 1995, pages 190-192

Wirings of fully differential differential amplifiers are described in the article "A CMOS Fully Balanced Differential Difference Amplifier and Its Applications" by H. Alzaher and M. Ismail, published in IEEE Transactions on Circuits and Systems - II: Analog and Digital Signal Processing, Volume 48, No. 6, 2001, pages 614-620.

Furthermore, differential differential amplifiers (DDA) are known, which are just as fully differential on the input side

Di differential amplifiers have two differential input pairs, but only on the output side via one output feature. With a differential differential amplifier, the output voltage is measured at its output against a common fixed potential, for example a ground.

The articles “A Versatile Building Block: The CMOS

Differential Difference Amplifier "by E. Säckinger and W. Guggenbühl, published in IEEE Journal of Solid-State Circuits, Volume SC-22, No. 2, 1987, pages 287-294, and" A 3.3-V 800-nV _rro g Noise, Gain-Programmable CMOS Microphone Preamplifier Design Using Yield Modeling Technique "by G. Nicollini and C. Guardiani, published in IEEE Journal of Solid-State Circuits, Volume 28, No. 8, 1993, pages 915-921, deal with differential differential amplifiers and with amplifier circuits for these types of amplifiers.

A disadvantage of differential differential amplifiers is the design of the external circuit which is necessarily asymmetrical due to the fact that there is only one output. As a result, these amplifier circuits are generally relatively susceptible to external interference. Furthermore, the asymmetrical

Signal display the disadvantage that relatively high signal levels occur at the two differential input pairs. This requires complex linearized input stages and sufficient synchronization (matching) between the input stages in order to achieve good linearity of the amplifier circuit.

The object of the invention is to provide a circuit, in particular an amplifier circuit, with a fully differential differential amplifier, which has a high input impedance and, in particular, easy adjustability of the gain factor.

The problem underlying the invention is solved by the features of claim 1. Advantageous further developments and refinements of the invention are specified in the subclaims. A circuit according to the invention contains a fully differential differential amplifier which has a first differential input pair, a second differential input pair and a differential output pair. An input voltage is applied between a first input of the first differential input pair and a first input of the second differential input pair. An output voltage can be tapped between a first and a second output of the differential output pair. Furthermore, the circuit has a plurality of resistors which are connected in series between the output pair and via connection nodes. The second input of the first input pair can be connected to one of the connection nodes by means of a first changeover switch. The second input of the second input pair can also be connected to one of the connection nodes by means of a second changeover switch. The two changeover switches are switched so that at least one resistor is connected between the second inputs.

The use according to the invention of a fully differential differential amplifier with a symmetrical output pair and the symmetry of the circuit according to the invention make the circuit very insensitive to external interference and only generate very small differential voltages at the respective differential input pairs. This enables a high input impedance to be achieved.

The resistors, which are arranged in series between the second input of the first input pair and the first output of the output pair, advantageously form a first feedback resistor. A second feedback branch is connected in series by the between the second input of the second input pair and the second output of the

Output pair arranged resistors formed. When using the circuit according to the invention as Amplifier circuit, the gain factor, which indicates the gain of the input voltage into the output voltage, is determined by the feedback resistors and the at least one resistor. Because of the advantages of the circuit according to the invention, the two can

Feedback resistors can be designed with low resistance. This results in a small footprint, low noise and low signal distortion. Furthermore, the two feedback resistors and the at least one resistor through the two can by the circuit according to the invention

Changeover switch can be set. This means that three different resistance values can be set using just two parameters. When the circuit according to the invention is used as an amplifier circuit, the gain factor, which results from the sizes of the two feedback resistors and the at least one resistor, can thus be set in a particularly simple manner.

In order to achieve the highest possible symmetry of the circuit according to the invention and thus the coupling of external ones

To largely suppress interference, the two feedback resistors advantageously always have the same resistance values.

In addition, it can preferably be provided that the resistors of the plurality of resistors have the same resistance values. If the resistance values of the two feedback resistors are also the same, the two toggle switches are always switched synchronously to change the feedback resistors and the at least one resistor. This in turn means that two resistance values are set with just one parameter, which indicates the switch positions of the two-way switches.

To set the two toggle switches, it is particularly advantageous if the switch positions of the two Changeover switches are controllable and in particular programmable.

Transistors, in particular MOS transistors, can advantageously be used to implement the two changeover switches.

According to a further particularly advantageous embodiment of the invention, a voltage source is connected in series with the at least one resistor between the first and the second feedback resistor. This measure is useful if there is a constant bias voltage between the first inputs of the two differential input pairs, which is caused by different sizes of the common mode voltages that occur at the input and output of the circuit. The constant bias voltage can be compensated for by the voltage provided by the voltage source. The point of the circuit at which the voltage source is inserted into the circuit can be acted upon, for example, by the so-called common mode voltage. For reasons of symmetry, the at least one resistor can preferably contain two series-connected resistors with the same resistance values, between which the voltage source is arranged.

When the circuit according to the invention is implemented in an electrical circuit or an electrical device, it is advantageous to adjust the circuit to design the voltage source to be adjustable or controllable.

The circuit according to the invention can be produced particularly advantageously as an integrated circuit using CMOS (complementary metal oxide semiconductor) technology.

Furthermore, use of the circuit according to the invention as an amplifier circuit is particularly advantageous, in particular as a microphone or instrumentation amplifier circuit. The input voltage is amplified and output as the output voltage, the gain factor being determined by the feedback resistors and the at least one resistor.

Rectifiers or filters are further options for implementing the circuit according to the invention. To generate a high-pass filter, for example, a capacitor is connected upstream of the first inputs of the two differential input pairs. A low-pass filter is generated, for example, by connecting capacitors in parallel with the feedback resistors.

The invention is based on

Embodiments explained in more detail with reference to the drawings. Show it:

Fig. 1 shows a circuit diagram of a known amplifier circuit with a fully differential amplifier;

Fig. 2 shows a circuit diagram of an exemplary embodiment of the circuit according to the invention; and

Fig. 3 is a circuit diagram of the one shown in FIG. 2 shown

Embodiment used fully differential differential amplifier.

Fig. 2 shows an embodiment of the circuit according to the invention. The circuit is implemented as an amplifier circuit. A fully differential differential amplifier FDDA has a differential input pair with an inverting input 3 and a non-inverting input 4, a further differential input pair with an inverting input 3 'and a non-inverting input 4' and a differential output pair with outputs 5 and 5 ' on . Resistors R7, R6, R5, R4, R3, R3 ', R4', R5 ', R6' and R7 'are connected in series between the outputs 5 and 5', an additional adjustable voltage source VCONST being connected between the resistors R3 and R3 ' is switched. On

Changeover switch S enables input 3 to be optionally connected to one of the nodes located between resistors R3 to R7. Accordingly, one of the nodes lying between the resistors R3 'to R7' is selected by means of a changeover switch S ', so that one

Connection of this node with the input 3 'results. Because of this wiring, the resistors, which are arranged in series between the node selected by the changeover switch S and the output 5, form a first feedback resistor of the fully differential

Differential amplifier FDDA. Correspondingly, the resistors, which are arranged in series between the node selected by the changeover switch S 'and the output 5', form a second feedback resistor of the fully differential differential amplifier FDDA.

For the switch positions S and S 'shown in FIG. 2, this means that the first feedback resistor results from the resistors R4 to R7 and the second feedback resistor results from the resistors R4' to R7 '.

An input voltage VIN feeds the fully differential differential amplifier FDDA via inputs 4 and 4 '. An output voltage VOUT is present between outputs 5 and 5 '. If the resistor pairs R3 and R3 ', R4 and R4' etc. each have the same resistance values, the output voltage VOUT results from the amplification of the input voltage VIN with the amplification factor 1 + in the switching positions of the changeover switches S and S 'shown in FIG. 2 R3 / (R4 + R5 + R6 + R7). The resistors R3 to R7 and R3 'to R7' advantageously have the same resistance values, and the changeover switches S and S 'always have symmetrical switch positions, so that overall a highly symmetrical external circuitry of the fully differential differential amplifier FDDA results. This minimizes the sensitivity of the amplifier circuit to external interference. Furthermore, the

Gain factor of the amplifier circuit can be set particularly easily, since only the switch positions of the toggle switches S and S 'have to be changed together. This means that the gain factor is set with just one setting parameter.

If the common mode voltage VCMIN at inputs 4 and 4 'and the common mode voltage VCMOUT at outputs 5 and 5' have different values, a constant bias voltage with a value of ± (VCMIN - VCMOUT) occurs between inputs 4 and 4 '. This constant bias voltage can be generated with the voltage source VCONST

Compensate for tension. For this purpose, the voltage source VCONST must provide a voltage of [(R3 + R4 + R5 + R6 + R7) * VCMIN - R3 * VCMOUT] / (R4 + R5 + R6 + R7) at the gain factor set in FIG. 2. The voltage source VCONST therefore serves to bring the connection point of the resistors R3 and R3 'to the so-called common mode voltage.

However, it would also be conceivable to implement the present amplifier circuit without the voltage source VCONST. Then the corresponding connections of the resistors R3 and R3 'would be short-circuited.

An input VCM of the fully differential differential amplifier FDDA serves to control or regulate the common-mode voltage VCMOUT on the output side. The present amplifier circuit has a high input drive range of 1 Vpdiff with a supply voltage VDD of 1.8 V. The amplification of the amplifier circuit can also be designed to be programmable. Gains from 0 dB to 30 dB are possible.

FIG. 3 shows a circuit diagram of the fully differential differential amplifier FDDA used in the exemplary embodiment of the invention shown in FIG. 2.

The fully differential differential amplifier FDDA contains three differential amplifiers with p-channel MOSFETs MP1, MP1 ', MP2, MP2', MP3, MP3 'and current sources II, 12, 13. Furthermore, the fully differential differential amplifier FDDA comprises current sources 14 and 15, Resistors R8 and R9, capacitors Cl, C2, C3 and C4 and n-channel MOSFETs MNl, MN2, MN3, MN4, MN5 and MN6.

Claims

claims

1. Circuit with a fully differential differential amplifier (FDDA), which has a first differential input pair (3, 4), a second differential input pair (3 ', 4') and a differential output pair (5, 5 '), wherein

- an input voltage (VIN) between a first input

(4) of the first input pair (3, 4) and a first input (4 ') of the second input pair (3', 4 '),

- an output voltage (VOUT) between a first output

(5) and a second output (5 ') of the output pair (5, 5') can be tapped,

- A plurality of resistors (R3, ..., R7, R3 ', ..., R7') between the output pair (5, 5 ') and over

Connection node is connected in series,

- The second input (3) of the first input pair (3, 4) can be connected to one of the connection nodes by means of a first changeover switch (S), - The second input (3 ') of the second input pair (3', 4 ') can be connected by means of a second one Changeover switch (S ') can be connected to one of the connection nodes, and

- The two changeover switches (S, S ') are connected such that at least one between the second input (3) of the first input pair (3, 4) and the second input (3') of the second input pair (3 ', 4') Resistor (R3, R3 ') from the plurality of resistors (R3, ..., R7, R3', ..., R7 ') is connected.

2. Circuit according to claim 1, d a d u r c h g e k e n n z e i c h n e t,

- that the resistors (R4, ..., R7) from the plurality of resistors (R3, ..., R7, R3 ', ..., R7') connected between the second input (3) of the first input pair ( 3, 4) and the first output (5) of the output pair (5, 5 ') are connected, form a first feedback resistor, and - That the resistors (R4 ', ..., R7') from the plurality of resistors (R3, ..., R7, R3 ', ..., R7') connected between the second input (3 ') of the second input pair (3 ', 4') and the second output (5 ') of the output pair (5, 5') are connected to form a second feedback resistor.

3. Circuit according to claim 2, d a d u r c h g e k e n n z e i c h n e t, - that the first feedback resistor (R4, ..., R7) and the second feedback resistor (R4 ', ..., R7') have the same resistance values.

4. Circuit according to one or more of the preceding claims, d a d u r c h g e k e n n z e i c h n t,

- That the resistors of the plurality of resistors (R3, ..., R7, R3 ', ..., R7') have the same resistance values.

5. Circuit according to one or more of the preceding claims, d a d u r c h g e k e n n z e i c h n e t,

- That the switching positions of the two changeover switches (S, S ') are controllable and in particular programmable.

6. Circuit according to one or more of the preceding claims, that the two toggle switches (S, S ') have transistors, in particular MOS transistors.

7. Circuit according to one or more of claims 2 to 6, characterized in that - a voltage source (VCONST) between the first feedback resistor (R4, ..., R7) and the second Feedback resistor (R4 ', ..., R7') and in series with the at least one resistor (R3, R3 ') is connected.

8. Circuit according to claim 7, d a d u r c h g e k e n n z e i c h n e t,

- That the voltage source (VCONST) is adjustable or controllable.

9. Circuit according to one or more of the preceding claims, d a d u r c h g e k e n n z e i c h n e t,

- That the circuit is implemented using CMOS technology.

10. amplifier circuit, in particular a microphone amplifier circuit or an instrumentation amplifier circuit, or a filter or a rectifier, containing a circuit according to one or more of the preceding claims.