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WO2002007490A3 - Assembly comprising a structured support element and a substrate functionally linked therewith - Google Patents

Assembly comprising a structured support element and a substrate functionally linked therewith Download PDF

Info

Publication number
WO2002007490A3
WO2002007490A3 PCT/DE2001/002600 DE0102600W WO0207490A3 WO 2002007490 A3 WO2002007490 A3 WO 2002007490A3 DE 0102600 W DE0102600 W DE 0102600W WO 0207490 A3 WO0207490 A3 WO 0207490A3
Authority
WO
WIPO (PCT)
Prior art keywords
support element
substrate
assembly
functionally linked
linked therewith
Prior art date
Application number
PCT/DE2001/002600
Other languages
German (de)
French (fr)
Other versions
WO2002007490A2 (en
Inventor
Norbert Martin
Stefan Mueller
Original Assignee
Bosch Gmbh Robert
Norbert Martin
Stefan Mueller
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bosch Gmbh Robert, Norbert Martin, Stefan Mueller filed Critical Bosch Gmbh Robert
Publication of WO2002007490A2 publication Critical patent/WO2002007490A2/en
Publication of WO2002007490A3 publication Critical patent/WO2002007490A3/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Micromachines (AREA)
  • Led Device Packages (AREA)

Abstract

The invention relates to an assembly (10) comprising a structured support element (11) and a substrate (12) functionally linked therewith, especially a semiconductor waver. The invention is characterized in that the support element (11) is provided with a plurality of spaced apart support portions (13) that are preferably located in the outer edge area of the substrate (12) and that functionally link the substrate (12) with the support element (11). Said support portions (13) are preferably located in a corner section of the substrate (12) that has a substantially rectangular shape and of the support element (11) that has a corresponding shape.
PCT/DE2001/002600 2000-07-18 2001-07-17 Assembly comprising a structured support element and a substrate functionally linked therewith WO2002007490A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10034826.2 2000-07-18
DE2000134826 DE10034826A1 (en) 2000-07-18 2000-07-18 Assembly with a structured Tärgerelement and a substrate operatively connected to this

Publications (2)

Publication Number Publication Date
WO2002007490A2 WO2002007490A2 (en) 2002-01-24
WO2002007490A3 true WO2002007490A3 (en) 2002-06-27

Family

ID=7649275

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2001/002600 WO2002007490A2 (en) 2000-07-18 2001-07-17 Assembly comprising a structured support element and a substrate functionally linked therewith

Country Status (2)

Country Link
DE (1) DE10034826A1 (en)
WO (1) WO2002007490A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0722105D0 (en) 2007-11-10 2007-12-19 Sec Dep For Environment Food A Antigens

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0422162A (en) * 1990-05-17 1992-01-27 Hitachi Ltd Lead frame and semiconductor integrated circuit device using it
EP0724294A2 (en) * 1995-01-25 1996-07-31 Nec Corporation Semiconductor device mounted on tub having central slit pattern and peripheral slit pattern for absorbing thermal stress
US5661338A (en) * 1994-12-14 1997-08-26 Anam Industrial Co., Ltd. Chip mounting plate construction of lead frame for semiconductor package
JPH104173A (en) * 1996-04-17 1998-01-06 Matsushita Electron Corp Lead frame, its manufacture and semiconductor device using it
US5773878A (en) * 1995-10-28 1998-06-30 Institute Of Microelectronics National University Of Singapore IC packaging lead frame for reducing chip stress and deformation
JPH1126680A (en) * 1997-07-08 1999-01-29 Sony Corp Lead frame for semiconductor device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0422162A (en) * 1990-05-17 1992-01-27 Hitachi Ltd Lead frame and semiconductor integrated circuit device using it
US5661338A (en) * 1994-12-14 1997-08-26 Anam Industrial Co., Ltd. Chip mounting plate construction of lead frame for semiconductor package
EP0724294A2 (en) * 1995-01-25 1996-07-31 Nec Corporation Semiconductor device mounted on tub having central slit pattern and peripheral slit pattern for absorbing thermal stress
US5773878A (en) * 1995-10-28 1998-06-30 Institute Of Microelectronics National University Of Singapore IC packaging lead frame for reducing chip stress and deformation
JPH104173A (en) * 1996-04-17 1998-01-06 Matsushita Electron Corp Lead frame, its manufacture and semiconductor device using it
JPH1126680A (en) * 1997-07-08 1999-01-29 Sony Corp Lead frame for semiconductor device

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 016, no. 185 (E - 1197) 6 May 1992 (1992-05-06) *
PATENT ABSTRACTS OF JAPAN vol. 1998, no. 05 30 April 1998 (1998-04-30) *
PATENT ABSTRACTS OF JAPAN vol. 1999, no. 04 30 April 1999 (1999-04-30) *

Also Published As

Publication number Publication date
DE10034826A1 (en) 2002-01-31
WO2002007490A2 (en) 2002-01-24

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