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WO2002006877A2 - Entree/sortie optique destinee a des dispositifs de circuit integre - Google Patents

Entree/sortie optique destinee a des dispositifs de circuit integre Download PDF

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Publication number
WO2002006877A2
WO2002006877A2 PCT/US2001/022032 US0122032W WO0206877A2 WO 2002006877 A2 WO2002006877 A2 WO 2002006877A2 US 0122032 W US0122032 W US 0122032W WO 0206877 A2 WO0206877 A2 WO 0206877A2
Authority
WO
WIPO (PCT)
Prior art keywords
optical
integrated circuit
substrate
radiation
chip
Prior art date
Application number
PCT/US2001/022032
Other languages
English (en)
Other versions
WO2002006877A3 (fr
Inventor
Kannan Raj
Michael Morse
Original Assignee
Intel Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corporation filed Critical Intel Corporation
Priority to AU2001273424A priority Critical patent/AU2001273424A1/en
Publication of WO2002006877A2 publication Critical patent/WO2002006877A2/fr
Publication of WO2002006877A3 publication Critical patent/WO2002006877A3/fr

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F55/00—Radiation-sensitive semiconductor devices covered by groups H10F10/00, H10F19/00 or H10F30/00 being structurally associated with electric light sources and electrically or optically coupled thereto
    • H10F55/18—Radiation-sensitive semiconductor devices covered by groups H10F10/00, H10F19/00 or H10F30/00 being structurally associated with electric light sources and electrically or optically coupled thereto wherein the radiation-sensitive semiconductor devices and the electric light source share a common body having dual-functionality of light emission and light detection
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/43—Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections

Definitions

  • the present invention relates generally to the field of integrated circuit devices. More particularly, the present invention relates to the field of input/output (I/O) for integrated circuit devices.
  • I/O input/output
  • Electrical interconnects present an obstacle to the continuing challenge to high speed integration in processors. Newer process generations tend to introduce metal layers to better enable die areas limited by transistor sizes. Because metal delays scale linearly while transistor delays scale by area, inter-unit delays are becoming a dominant measure of performance. As speed requirements continue to increase and the complexity of systems and subsystems grow, electrical interconnect bottlenecks arise at different hierarchies and limit system performance. Challenges in implementing electrical interconnects include increasing the bandwidth, reducing power, improving clock distribution, and mitigating electromagnetic interference (EMI).
  • EMI electromagnetic interference
  • a higher level integration implies demands for input and output (I/O) with higher bandwidth, particularly at the chip or module level.
  • I/O bandwidth for the processor is typically unable to keep pace with the processor's logic process because of the increased power dissipation required to drive fixed external loads at increased speeds and because of the increasingly careful designs required to account for receivers, transmitters, timing circuits, packages for thermal management, and limitations imposed by the I/O transmission medium.
  • Figure 1 illustrates an exemplary arrangement of integrated circuit chips coupled by optical links
  • Figure 2 illustrates, for one embodiment, two integrated circuit chip stacks each comprising an optical input/output (I/O) system coupled by an optical link;
  • I/O optical input/output
  • Figure 3 illustrates, for one embodiment, a flow diagram to form an integrated circuit chip with an optical I/O system
  • Figure 4 illustrates, for one embodiment, an integrated circuit chip stack comprising an optical I/O system
  • Figure 5 illustrates, for one embodiment, an optical subsystem for the optical I/O system of Figure 4
  • Figure 6 illustrates, for one embodiment, a partial front view of a bench for coupling optical fibers for the optical I/O system of Figure 4;
  • Figure 7 illustrates, for one embodiment, atop view of an optical groove defined by the bench of Figure 6;
  • Figure 8 illustrates, for another embodiment, an integrated circuit chip stack comprising an optical I/O system
  • Figure 9 illustrates, for one embodiment, a portion of an integrated circuit chip stack comprising an optical I/O system on an edge of the chip stack.
  • Figure 1 illustrates an exemplary arrangement of integrated circuit (IC) chips 110, 120, 130, 140, and 150 coupled by optical links 102, 104, and 106. Although one or more embodiments are described in connection with the arrangement of Figure 1, any suitable arrangement of chips coupled by optical links may be used.
  • IC integrated circuit
  • Optical link 102 couples chips 110 and 120.
  • Optical link 104 couples chips 120 and 130.
  • Optical link 106 couples chips 120, 140, and 150. Chips 120, 140, and 150 each share at least a portion of optical link 106 with one another. Chips 110, 120, 130, 140, and 150 communicate with one another by transmitting radiation over optical link 102, 104, and/or 106. Each chip 110, 120, 130, 140, and 150 may transmit and/or receive any suitable radiation, such as light for example, in any suitable manner over optical link 102, 104, and/or 106. Each optical link 102, 104, and 106 may be implemented in any suitable manner using any suitable medium or material.
  • Each optical link 102, 104, and 106 for one embodiment may be implemented using one or more suitable optical fibers.
  • Chips 110, 120, 130, 140, and/or 150 may also communicate with one another over any suitable one or more electrical links.
  • Figure 2 illustrates, for one embodiment, a stack for chip 110 and a stack for chip 120.
  • Chip 110 comprises an integrated circuit 212 comprising one or more devices and an optical input/output (I/O) system 214 electrically coupled to integrated circuit 212.
  • Chip 120 comprises an integrated circuit 222 comprising one or more devices and an optical I/O system 224 electrically coupled to integrated circuit 222.
  • Optical I/O systems 214 and 224 each couple optical link 102 to chips 110 and 120, respectively.
  • Optical I/O system 224 also couples optical links 104 and 106 to chip 120.
  • Each integrated circuit 212 and 222 may comprise any suitable one or more devices to implement any suitable one or more functions.
  • integrated circuit 212 and/or integrated circuit 222 may each implement a microprocessor.
  • Each integrated circuit 212 and 222 may be formed in any suitable manner using any suitable processing techniques.
  • One or more devices of integrated circuit 212 communicate with one or more devices of integrated circuit 222 by outputting electrical signals to optical I/O system 214.
  • Optical I/O system 214 transmits radiation based on the received electrical signals over optical link 102 to optical I/O system 224. Based on the received radiation, optical I/O system 224 transmits electrical signals to one or more devices of integrated circuit 222.
  • one or more devices of integrated circuit 222 communicate with one or more devices of integrated circuit 212 by outputting electrical signals to optical I/O system 224.
  • Optical I/O system 224 transmits radiation based on the received electrical signals over optical link 102 to optical I/O system 214. Based on the received radiation, optical I/O system 214 transmits electrical signals to one or more devices of integrated circuit 212.
  • One or more devices of integrated circuit 212 for one embodiment may also communicate with one or more other devices of integrated circuit 212 through optical I/O system 214.
  • one or more devices of integrated circuit 222 for one embodiment may also communicate with one or more other devices of integrated circuit 222 through optical I/O system 224.
  • Each optical I/O system 214 and 224 comprises one or more optical transmitters to transmit radiation based on received electrical signals and one or more optical receivers to transmit electrical signals based on received radiation.
  • Each optical I/O system 214 and 224 may comprise any suitable material and/or optical component(s).
  • optical I/O system 214 transmits radiation over a link portion 201 of one or more optical fibers, for example, of optical link 102 to optical I/O system 224 and receives radiation transmitted from optical I/O system 224 over a link portion 202 of one or more optical fibers, for example, of optical link 102.
  • optical I/O system 214 transmits radiation to optical I/O system 224 and receives radiation from optical I/O system 224 over at least the same portion of optical link 102.
  • optical link 102 is implemented with one or more optical fibers
  • optical I/O system 214 transmits radiation to optical I/O system 224 and receives radiation from optical I/O system 224 over the same one or more optical fibers.
  • chips 110 and 120 may be mounted to a chip carrier 230 that may be mounted to a printed circuit board 240. Chips 110 and 120 for one embodiment communicate with one another over one or more electrical links formed in chip carrier 230 and/or printed circuit board 240. Chips 110 and 120 may be mounted to chip carrier 230 in any suitable manner using any suitable techniques, and chip carrier 230 may be mounted to printed circuit board 240 in any suitable manner using any suitable techniques.
  • Chips 130, 140, and 150 for one embodiment each similarly comprise any suitable integrated circuit of one or more devices and any suitable optical I/O system to communicate over optical links 104 and/or 106.
  • chips 110, 120, 130, 140, and 150 benefit from one or more advantages of using optical systems, such as potentially higher bandwidth, higher noise immunity, and lower power, for example, relative to communicating over electrical links.
  • Each chip 110, 120, 130, 140, and 150 may be formed in any suitable manner using any suitable techniques. For one embodiment, as illustrated in Figure 3, each chip
  • 110, 120, 130, 140, and 150 may be formed in accordance with a flow diagram 300.
  • Figure 4 illustrates one embodiment of a stack for chip 110. Although described in connection with an embodiment as illustrated in Figure 4, flow diagram 300 may be used to form other suitable embodiments for each chip 110, 120, 130, 140, and/or 150.
  • an integrated circuit comprising one or more devices is formed. Any suitable integrated circuit comprising any suitable one or more devices may be formed using any suitable processing techniques.
  • a substrate 410 is processed to form one or more devices represented by device wells 411 and 412.
  • Substrate 410 may comprise any suitable material, such as silicon (Si) for example.
  • a contact layer 420 comprising one or more electrically conductive contacts represented by contacts 421, 422, and 423 is formed over a front side of substrate 410. Each contact is electrically coupled to at least one device formed on substrate 410.
  • Contact layer 420 for one embodiment is a first metal layer formed over substrate 410.
  • One or more interlayer device and interconnect layers 430 are formed over contact layer 420 to form integrated circuit 212.
  • the integrated circuit formed for block 302 is processed to mount an optical input/output (I/O) system to the integrated circuit.
  • the integrated circuit may be processed in any suitable manner using any suitable processing techniques.
  • the integrated circuit for one embodiment is processed in any suitable manner using any suitable processing techniques to mount the optical I/O system to a back side of the integrated circuit.
  • integrated circuit 212 is processed to form one or more electrically conductive vias, represented by vias 441, 442, and 443, extending from a back side of substrate 410 to an electrically conductive contact in contact layer 420.
  • each via 441, 442, and 443 extends from the back side of substrate 410 to contact 421, 422, and 423, respectively.
  • One or more electrically conductive contacts represented by contacts 451, 452, and 453 are formed over the one or more vias.
  • Each via 441, 442, and 443 for one embodiment comprises a suitable electrically conductive material, such as a suitable metal for example, coupling each pair of contacts 421 and 451, 422 and 452, and 423 and 453, respectively.
  • Each via 441, 442, and 443 for one embodiment also comprises a suitable electrically insulative material, such as a suitable oxide for example, to isolate the conductive material from substrate 410 and prevent shorting of substrate 410.
  • a suitable electrically insulative material such as a suitable oxide for example
  • substrate 410 comprises a relatively non-conductive material, such as sapphire for example
  • at least a portion of each via 441, 442, and 443 near such material of substrate 410 may be formed without insulative material.
  • an optical I/O system is formed and mounted to the integrated circuit.
  • the optical I/O system may be formed in any suitable manner using any suitable material and/or optical component(s).
  • the optical I/O system may be mounted to the integrated circuit in any suitable manner using any suitable techniques.
  • optical I/O system 214 comprises one or more optical transmitters represented by an optical transmitter 511 and one or more optical receivers represented by an optical receiver 512. At least a portion of each optical transmitter and receiver is integrated on a substrate 510.
  • Each optical transmitter transmits radiation based on received electrical signals and may comprise any suitable components and/or circuitry.
  • each optical transmitter comprises a vertical cavity surface emitting laser (VCSEL) and associated optical transmitter driver circuitry.
  • Each optical receiver transmits electrical signals based on received radiation and may comprise any suitable components and/or circuitry.
  • Each optical receiver for one embodiment comprises a metal semiconductor metal (MSM) detector and associated optical receiver circuitry.
  • Each optical receiver for another embodiment comprises a PN junction diode and associated optical receiver circuitry.
  • Substrate 510 may comprise any suitable material.
  • Substrate 510 for one embodiment comprises a suitable III-V semiconductor material, such as gallium arsenide (GaAs) for example.
  • GaAs gallium arsenide
  • Optical I/O system 214 also comprises one or more micro optical elements 520 and one or more benches 530.
  • Each bench 530 couples one or more optical fibers, represented by optical fibers 541 and 542, each relative to an optical transmitter to direct radiation transmitted by the optical transmitter over an optical fiber and/or relative to an optical receiver to direct radiation received over an optical fiber to an optical receiver.
  • Each bench 530 may be formed in any suitable manner and may comprise any suitable material, such as silicon (Si) for example.
  • Si silicon
  • Each bench 530 may be formed to couple any suitable number of optical fibers for optical I/O system 214.
  • Each optical fiber transmits radiation to optical I/O system 214 and/or transmits radiation from optical I/O system 214.
  • Each optical fiber for one embodiment transmits radiation as a guided wave.
  • Each optical fiber may be formed in any suitable manner and may comprise any suitable medium or material.
  • Each micro optical element 520 helps direct radiation from an optical transmitter and/or to an optical receiver.
  • Each micro optical element 520 may be formed in any suitable manner and may comprise any suitable material.
  • Each optical element 520 may be, for example, a diffractive optical element (DOE) formed of a suitable material, such as fused silica for example, or a refractive optical element formed of a suitable material.
  • DOE diffractive optical element
  • Figure 5 illustrates, for one embodiment, an optical subsystem 550 for optical I/O system 214.
  • Optical subsystem 550 comprises optical fiber 542, one bench 530, micro optical element(s) 520, and optical receiver 512.
  • Bench 530 couples optical fiber 542 in an optical groove 531 relative to optical receiver 512.
  • Optical fiber 542 transmits radiation from another chip, for example, into a corner turning mirror 532 defined by bench 530 in optical groove 531. Corner turning mirror 532 directs the received radiation into micro optical element 520 which then further directs the received radiation along one or more paths to optical receiver 512.
  • Bench 530 may define corner turning mirror 532 at any suitable angle relative to the normal plane of incidence on the optical groove, such as at approximately 45 degrees or at approximately 53.7 degrees for example.
  • Figure 6 illustrates, for one embodiment, a partial front view of bench 530 for coupling exemplary optical fibers 542, 543, and 544 for optical I/O system 214 in respective optical grooves.
  • Figure 7 illustrates, for one embodiment, a top view of an optical groove defined by bench 530.
  • optical transmitter 511 For transmitting radiation from optical I/O system 214, optical transmitter 511 transmits radiation to micro optical element 520 which directs the transmitted radiation along one or more paths to a corner turning mirror defined by bench 530 in a groove coupling optical fiber 541.
  • the corner turning mirror directs the radiation onto optical fiber 541 for transmission to another chip, for example.
  • One or more micro optical elements 520 for one embodiment may be formed to direct radiation from one or more optical transmitters to one or more optical receivers on chip 110.
  • Optical I/O system 214 for one embodiment is formed by processing substrate 510 to integrate one or more optical transmitters and one or more optical receivers on substrate 510, inserting optical fibers into respective grooves defined by bench(es) 530, mounting bench(es) 530 to micro optical element(s) 520, and mounting micro optical element(s) 520 to substrate 510.
  • the one or more optical transmitters and receivers are integrated on substrate 510 and micro optical element(s) 520 and bench(es) 530 are mounted to substrate 510 such that radiation may be directed from one or more optical fibers to one or more optical receivers, from one or more optical transmitters to one or more optical fibers, and/or from one or more optical transmitters to one or more optical receivers.
  • Micro optical element(s) 520 for one embodiment are flip-chip mounted to substrate 510 using, for example, suitable alignment marks and/or suitable self-aligning locking posts.
  • Optical I/O system 214 for one embodiment may transmit and receive radiation over the same one or more optical fibers by directing radiation from one or more optical transmitters to an optical fiber and directing radiation from that same optical fiber to one or more optical receivers.
  • Optical I/O system 214 for one embodiment may transmit radiation from more than one optical transmitter to the same one optical fiber using a suitable combiner, for example, coupled at an end of the optical fiber.
  • Optical I/O system 214 for one embodiment may receive radiation at more than one optical receiver from the same one optical fiber using a suitable splitter, for example, coupled at an end of the optical fiber.
  • Substrate 510 is mounted to integrated circuit 212 to couple one or more optical transmitters to receive electrical signals from integrated circuit 212 and to couple one or more optical receivers to transmit electrical signals to integrated circuit 212.
  • Substrate 510 for one embodiment is processed to form on a back side of substrate 510 one or more electrically conductive contacts, represented by contacts 561, 562, and 563, each electrically coupled to one or more optical transmitters and/or to one or more optical receivers.
  • Substrate 510 may then be mounted to integrated circuit 212 by coupling the one or more contacts of substrate 510 to one or more contacts of integrated circuit 212.
  • substrate 510 is flip-chip mounted to integrated circuit 212.
  • Substrate 510 may be mounted, for example, using a suitable controlled collapse chip connection (C4) bump bonding technique. As illustrated in Figure 4, each contact 611, 612, and 613 is mounted to each contact 451, 452, and 453, respectively, by a solder bump 611, 612, and 613, respectively. One or more devices of integrated circuit 212 may then communicate with optical I/O system 214 through contacts 421, 422, and/or 423, vias 441,
  • C4 controlled collapse chip connection
  • any space between substrate 510 and integrated circuit 212 may be filled with a suitable underfill material 620, such as a material comprising epoxy and silica for example.
  • Underfill material 620 for one embodiment is potentially thermally conductive to help remove heat from integrated circuit 212, for example.
  • Underfill 620 may comprise, for example, thermal conductive tubes such as micro-channel copper tubes for example.
  • Each optical transmitter and receiver for one embodiment is wholly integrated on substrate 510.
  • only a portion of one or more optical transmitters and/or only a portion of one or more optical receivers are integrated on substrate 510 with each remaining portion integrated on substrate 410.
  • At least a portion of one or more optical transmitter driver circuits may be integrated on substrate 410 and electrically coupled to a corresponding portion of an optical transmitter in mounting substrate 510 to substrate 410.
  • At least a portion of one or more optical receiver circuits for example, may be integrated on substrate 410 and electrically coupled to a corresponding portion of an optical receiver in mounting substrate 510 to substrate 410.
  • each portion of each optical transmitter and/or of each optical receiver may be integrated on substrate 410 as substrate 410 is processed to form one or more devices.
  • one or more optical receivers may be wholly integrated on substrate 410.
  • Optical I/O system 214 may then direct radiation from one or more optical fibers to an optical receiver through substrate 510 and underfill 620.
  • Substrate 510 and underfill 620 are then each to comprise a suitable optically transparent material.
  • at least a portion of one or more other optical receivers, represented by optical receiver 512 may also be integrated on substrate 510.
  • substrate 510 to integrated circuit 410 for one embodiment is performed at the substrate or wafer level.
  • the mounting of micro optical element(s) 520 and bench(es) 530 for one embodiment is also performed at the wafer level.
  • substrate 410 with mounted substrate 510 is diced prior to mounting micro optical element(s) 520 and bench(es) 530.
  • the integrated circuit with the mounted optical I/O system is packaged to form a chip.
  • the integrated circuit with the mounted optical I/O system may be packaged in any suitable manner using any suitable techniques.
  • a suitable heat spreader and/or a heat sink 710 are mounted to optical I/O system 214 prior to or in packaging chip 110.
  • Any suitable heat spreader and/or heat sink may be used, such as a thermal gel, diamond cooling structures, and/or heat pipes for example.
  • optical I/O system 214 may be formed on an edge of chip 110 as illustrated in Figure 9.
  • a suitable heat spreader 910 and/or a suitable heat sink 920 may be mounted to integrated circuit 212 to better enable thermal management of chip 110.
  • Integrated circuit 212 may be mounted to chip carrier 230 in any suitable manner.
  • Integrated circuit 212 for one embodiment is processed to form on a front side of integrated circuit 212 one or more electrically conductive contacts, represented by contacts 721, 722, 723, 724, 725, and 726, each electrically coupled to one or more devices of integrated circuit 212.
  • Integrated circuit 212 may then be mounted to chip carrier 230 by coupling the one or more contacts to chip carrier 230.
  • integrated circuit 212 is flip-chip mounted to chip carrier
  • Integrated circuit 212 may be mounted, for example, using a suitable controlled collapse chip connection (C4) bump bonding technique. As illustrated in Figure 4, each contact 721, 722, 723, 724, 725, and 726 is mounted to chip carrier 230 by a solder bump 731, 732, 733, 734, 735, and 736, respectively. The space between integrated circuit 212 and chip carrier 230 may be filled with a suitable underfill material 740.
  • C4 controlled collapse chip connection
  • optical I/O system 214 may be mounted to the front side of integrated circuit 212 similarly as described for mounting optical I/O system 214 to the back side of integrated circuit 212.
  • Optical I/O system 214 may be mounted, for example, to one or more electrically conductive contacts represented by contacts 721-726 formed on the front side of integrated circuit 212.
  • the formed chip is coupled to one or more other chips by one or more optical links. Each chip may be coupled by an optical link in any suitable manner.
  • each optical fiber coupled to each chip may be coupled to another optical fiber coupled to another chip using a suitable optical fiber connector.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Optical Couplings Of Light Guides (AREA)

Abstract

La présente invention concerne un circuit intégré comprenant un ou plusieurs dispositifs. Un ou plusieurs émetteurs optiques sont couplés de façon à recevoir des signaux électriques en provenance d'au moins un ou plusieurs de ces dispositifs. Ce ou ces émetteurs optiques émettent un rayonnement fondé sur les signaux optiques reçus. Un ou plusieurs récepteurs optiques transmettent des signaux électriques à au moins un de ces dispositifs fondés sur le rayonnement reçu. Une ou plusieurs fibres optiques sont chacune couplées de façon à transmettre un rayonnement en provenance du ou des émetteurs optiques et/ou à transmettre un rayonnement vers le ou les récepteurs optiques. Ce circuit intégré, ce ou ces émetteurs optiques et ce ou ces récepteurs optiques sont conditionnés de façon à former une puce.
PCT/US2001/022032 2000-07-18 2001-07-13 Entree/sortie optique destinee a des dispositifs de circuit integre WO2002006877A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2001273424A AU2001273424A1 (en) 2000-07-18 2001-07-13 Flip-chip mounted integrated optic receivers and transmitters

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US61875600A 2000-07-18 2000-07-18
US09/618,756 2000-07-18

Publications (2)

Publication Number Publication Date
WO2002006877A2 true WO2002006877A2 (fr) 2002-01-24
WO2002006877A3 WO2002006877A3 (fr) 2003-04-03

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PCT/US2001/022032 WO2002006877A2 (fr) 2000-07-18 2001-07-13 Entree/sortie optique destinee a des dispositifs de circuit integre

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AU (1) AU2001273424A1 (fr)
TW (1) TW535299B (fr)
WO (1) WO2002006877A2 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011056339A1 (fr) * 2009-11-05 2011-05-12 The Boeing Company Emetteur-recepteur pour reseaux a fibres optiques plastiques
US9105790B2 (en) 2009-11-05 2015-08-11 The Boeing Company Detector for plastic optical fiber networks
CN106373976A (zh) * 2015-07-20 2017-02-01 格罗方德半导体公司 裸片‑裸片堆迭

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI844391B (zh) * 2023-06-09 2024-06-01 欣興電子股份有限公司 封裝結構及其製作方法

Family Cites Families (5)

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Publication number Priority date Publication date Assignee Title
US5426072A (en) * 1993-01-21 1995-06-20 Hughes Aircraft Company Process of manufacturing a three dimensional integrated circuit from stacked SOI wafers using a temporary silicon substrate
DE69428410T2 (de) * 1993-11-09 2002-05-02 Agilent Technologies, Inc. (N.D.Ges.D.Staates Delaware) Optische Detektoren und Quellen mit integrierten holographischen optischen Elementen für optoelektronische Verbindungen
US5416861A (en) * 1994-04-29 1995-05-16 University Of Cincinnati Optical synchronous clock distribution network and high-speed signal distribution network
DE4440976A1 (de) * 1994-11-17 1996-05-23 Ant Nachrichtentech Optische Sende- und Empfangseinrichtung mit einem oberflächenemittierenden Laser
US6005262A (en) * 1997-08-20 1999-12-21 Lucent Technologies Inc. Flip-chip bonded VCSEL CMOS circuit with silicon monitor detector

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011056339A1 (fr) * 2009-11-05 2011-05-12 The Boeing Company Emetteur-recepteur pour reseaux a fibres optiques plastiques
US8983302B2 (en) 2009-11-05 2015-03-17 The Boeing Company Transceiver for plastic optical fiber networks
US9105790B2 (en) 2009-11-05 2015-08-11 The Boeing Company Detector for plastic optical fiber networks
CN106373976A (zh) * 2015-07-20 2017-02-01 格罗方德半导体公司 裸片‑裸片堆迭
US9806067B2 (en) 2015-07-20 2017-10-31 Globalfoundries Inc. Die-die stacking
US10283490B2 (en) 2015-07-20 2019-05-07 Globalfoundries Inc. Communicating optical signals between stacked dies

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WO2002006877A3 (fr) 2003-04-03
AU2001273424A1 (en) 2002-01-30
TW535299B (en) 2003-06-01

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