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WO2001093327A1 - Element semi-conducteur, structure electroconductrice associee, et leur procede de production - Google Patents

Element semi-conducteur, structure electroconductrice associee, et leur procede de production Download PDF

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Publication number
WO2001093327A1
WO2001093327A1 PCT/IB2001/000891 IB0100891W WO0193327A1 WO 2001093327 A1 WO2001093327 A1 WO 2001093327A1 IB 0100891 W IB0100891 W IB 0100891W WO 0193327 A1 WO0193327 A1 WO 0193327A1
Authority
WO
WIPO (PCT)
Prior art keywords
electrically conductive
semiconductor component
semiconductor
conductive structure
layers
Prior art date
Application number
PCT/IB2001/000891
Other languages
English (en)
Inventor
Norbert Ammann
Joerg Baumbach
Original Assignee
Tyco Electronics Amp Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tyco Electronics Amp Gmbh filed Critical Tyco Electronics Amp Gmbh
Priority to AU62566/01A priority Critical patent/AU6256601A/en
Priority to DE10196279T priority patent/DE10196279T1/de
Publication of WO2001093327A1 publication Critical patent/WO2001093327A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/183—Connection portion, e.g. seal
    • H01L2924/18301—Connection portion, e.g. seal being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part

Definitions

  • An object of the invention is therefore to reduce the size of semiconductor components and/or systems containing semiconductor components. This and other objects are achieved according to the invention by the semiconductor components and the processes for production thereof wherein the points of contact are a constituent of an electrically conductive structure embedded in the semiconductor component housing and terminating externally flush therewith.
  • the substrate 1 consists, in the example considered, of metal, for example of copper, aluminum or steel, and is 200 ⁇ m to 300 ⁇ m thick.
  • a layer of electrically conductive material is initially applied to this substrate 1. After its production, this layer forms the electrically conductive structure 3, and a base 4, on which the semiconductor chip, which is later to be accommodated in the semiconductor component 5, is placed and fixed.
  • the production of the layer begins in that the substrate 1 is coated on its upper side with a photosensitive material 2. How the coating is applied, i.e. whether a liquid material is applied, or whether a film coated with the material is laminated onto the substrate 1, or whether the material is applied to the substrate 1 in another way, is unimportant in the example considered.
  • the layer of material is approximately 6 ⁇ m thick in the example considered.
  • the substrate 1 coated with the material 2 is illustrated in Fig. IB.
  • the photosensitive material 2 is then exposed and developed in such a way that it is removed at the points at which the substrate 1 is to be provided with the electrically conductive layer.
  • development is carried out using an agent which causes the photosensitive material 2 remaining on the substrate 1 to have a ramp-like course at the transition between the points at which the photosensitive material 2 remains on the substrate 1 and the points at which the photosensitive material 2 has been removed from the substrate 1.
  • agents are agents which cause the photosensitive material 2 remaining on the substrate 1 to shrink upon drying after treatment with the agent.
  • the substrate 1 with the photosensitive material 2 structured as described is illustrated in Fig. lC.
  • the substrate 1 is then in the state illustrated in Fig. ID. Afterwards the photosensitive material 2 still on the substrate 1 is removed. The substrate 1 is then in the state illustrated in Fig. IE.
  • electrical connections to the semiconductor chip 5 are formed by wire bonding to the electrically conductive structure 3.
  • the bonding wires are denoted by the reference numeral 7 in the figures. See Fig. IF.
  • Fig. 1H is the finished semiconductor component.
  • the parts of the electrically conductive structure 3 and of the base 4 originally resting thereon are exposed.
  • the electrically conductive structure 3 and the base 4 terminate flush with the semiconductor component housings formed by the casting compound 8.
  • the parts of the electrically conductive structure 3, now exposed, can be used as points of contact.
  • the exposed part of the base 4 can also serve as a cooling face by means of which the heat produced in the semiconductor chip 5 and conveyed by the base 4 can be released to the outside.
  • Fig. 2H shows the adhesive 6, by means of dashed lines. This indicates that the adhesive 6 can also still be removed.
  • the second electrically conductive layer is subsequently applied to the dielectric 9.
  • This layer is preferably applied by sputtering.
  • the material used for coating which in the example considered is again nickel, is applied to the upper side of the dielectric layer in such a way that the second electrically conductive layer produced as a result also has the desired structure.
  • the nickel furthermore reaches the channels formed by the previous exposure and development of the dielectric layer for connecting the second electric layer to the first electrically conductive layer and deposits itself therein (predominantly on the side walls thereof) in such a way that an electric connection between the first electrically conductive layer and the second electrically conductive layer is formed as a result.
  • a second electrically conductive layer is formed on the dielectric layer and connected to selected parts of the first electrically conductive layer located beneath the dielectric layer.
  • the resulting assembly is illustrated in Fig. 30.
  • a dielectric layer is initially again applied to the assembly shown in Fig. 30 and structured as desired. This is done in the manner described above with reference to Fig. 3B.
  • the channels via which the electrically conductive layer located beneath the further dielectric layer is connected to the electrically conductive layer therebelow are also filled with a dielectric.
  • substantially only the side walls of these channels are covered by an electrically conductive layer.
  • a further electrically conductive layer having a desired structure is applied thereto. This is done in the manner described above with reference to Fig. 30. Because of frequent repetition of the processes described with reference to Fig. 3B and 30 an electrically conductive structure with any number of superimposed electrically conductive layers can be produced.
  • an electrically conductive structure can be applied to the dielectric layer in a single operation for a large number of semiconductor components
  • the electrically conductive layer can also be thicker or thinner than in the examples considered.
  • the thickness of the electrically conductive layer is preferably in the range between 1 ⁇ m and 10 ⁇ m. Good results can also be achieved, however, if the electrically conductive layer is up to 15 ⁇ m or up to 20 ⁇ m thick.
  • the described semiconductor components, the described electrically conductive structures for semiconductor components and the described processes for production thereof make possible a reduction in size and a very simple and rapid production of semiconductor components and systems containing semiconductor components, irrespective of particulars regarding the practical realization.
  • the electrically conductive structures to be provided in the semiconductor component for producing the points of contact and/or connections between the semiconductor chip, the points of contact, and/or further components contained in the semiconductor component are formed by thin layers of electrically conductive material, the height of the semiconductor component can be reduced.
  • the production of electrically conductive structures by using thin electrically conductive layers even permits multilayered electrically conductive structures to be accommodated in the smallest of spaces. Because of the multilayered electrically conductive structures, complex connections between the semiconductor chip, the points of contact of the semiconductor component and/or further components which are provided in the semiconductor component can also be made within the semiconductor component and/or connections which are normally made outside of the semiconductor component can be moved into the semiconductor component. As a result, even complex multi-chip semiconductor components can be produced which are smaller and, at the same time, more powerful than hitherto.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)

Abstract

L'invention porte sur un élément semi-conducteur présentant une structure électroconductrice servant à constituer des points de contact servant à raccorder l'élément semi-conducteur à d'autres dispositifs, et à relier les composants de l'élément semi-conducteur entre eux ou aux points de contact. Ladite structure, constituée d'une ou plusieurs couches électroconductrices très minces, est formée sur un substrat temporaire qu'on retire après intégration de la structure électroconductrice à l'élément semi-conducteur. En outre le positionnement particulier des emplacements des composants de ce dernier sont calculés pour permettre l'omission partielle ou totale de leur refroidissement. De tels éléments semi-conducteurs, ou systèmes les contenant, sont de très petite taille, mais néanmoins faciles et rapides à produire.
PCT/IB2001/000891 2000-06-02 2001-05-22 Element semi-conducteur, structure electroconductrice associee, et leur procede de production WO2001093327A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
AU62566/01A AU6256601A (en) 2000-06-02 2001-05-22 Semiconductor component, electrically conductive structure therefor, and processfor production thereof
DE10196279T DE10196279T1 (de) 2000-06-02 2001-05-22 Halbleiterbauteil, elektrisch leitfähige Struktur dafür sowie Verfahren zur Herstellung davon

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10027492 2000-06-02
DE10027492.7 2000-06-02

Publications (1)

Publication Number Publication Date
WO2001093327A1 true WO2001093327A1 (fr) 2001-12-06

Family

ID=7644540

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2001/000891 WO2001093327A1 (fr) 2000-06-02 2001-05-22 Element semi-conducteur, structure electroconductrice associee, et leur procede de production

Country Status (2)

Country Link
AU (1) AU6256601A (fr)
WO (1) WO2001093327A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008059301A1 (fr) * 2006-11-14 2008-05-22 Infineon Technologies Ag Composant électronique et son procédé de fabrication

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59208756A (ja) * 1983-05-12 1984-11-27 Sony Corp 半導体装置のパツケ−ジの製造方法
US5200362A (en) * 1989-09-06 1993-04-06 Motorola, Inc. Method of attaching conductive traces to an encapsulated semiconductor die using a removable transfer film
EP0751561A1 (fr) * 1994-03-18 1997-01-02 Hitachi Chemical Co., Ltd. Procede de fabrication des boitiers a semi-conducteurs et boitiers a semi-conducteurs
EP0773584A2 (fr) * 1995-11-08 1997-05-14 Fujitsu Limited Dispositif comprenant un empaquetage en résine et procédé de fabrication
JPH11195733A (ja) * 1997-10-28 1999-07-21 Seiko Epson Corp 半導体装置の製造方法、半導体装置用導電性板および半導体装置
US6001671A (en) * 1996-04-18 1999-12-14 Tessera, Inc. Methods for manufacturing a semiconductor package having a sacrificial layer

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59208756A (ja) * 1983-05-12 1984-11-27 Sony Corp 半導体装置のパツケ−ジの製造方法
US5200362A (en) * 1989-09-06 1993-04-06 Motorola, Inc. Method of attaching conductive traces to an encapsulated semiconductor die using a removable transfer film
EP0751561A1 (fr) * 1994-03-18 1997-01-02 Hitachi Chemical Co., Ltd. Procede de fabrication des boitiers a semi-conducteurs et boitiers a semi-conducteurs
EP0773584A2 (fr) * 1995-11-08 1997-05-14 Fujitsu Limited Dispositif comprenant un empaquetage en résine et procédé de fabrication
US6001671A (en) * 1996-04-18 1999-12-14 Tessera, Inc. Methods for manufacturing a semiconductor package having a sacrificial layer
JPH11195733A (ja) * 1997-10-28 1999-07-21 Seiko Epson Corp 半導体装置の製造方法、半導体装置用導電性板および半導体装置

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 009, no. 069 (E - 305) 29 March 1985 (1985-03-29) *
PATENT ABSTRACTS OF JAPAN vol. 1999, no. 12 29 October 1999 (1999-10-29) *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008059301A1 (fr) * 2006-11-14 2008-05-22 Infineon Technologies Ag Composant électronique et son procédé de fabrication
US8049311B2 (en) 2006-11-14 2011-11-01 Infineon Technologies Ag Electronic component and method for its production

Also Published As

Publication number Publication date
AU6256601A (en) 2001-12-11

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