WO2000076108A1 - Method for monitoring bit transmission quality in packet-oriented transmission - Google Patents
Method for monitoring bit transmission quality in packet-oriented transmission Download PDFInfo
- Publication number
- WO2000076108A1 WO2000076108A1 PCT/DE2000/001094 DE0001094W WO0076108A1 WO 2000076108 A1 WO2000076108 A1 WO 2000076108A1 DE 0001094 W DE0001094 W DE 0001094W WO 0076108 A1 WO0076108 A1 WO 0076108A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- packets
- bit
- transmission
- packet
- test information
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
Definitions
- V erfa h ren for monitoring the Bitübertragungsgüte in packet-oriented transmission ⁇ .
- T he invention relates to a method according to the preamble of claim. 1
- SDH frames Synchronous Digital Hierarchy
- IP cells Internet Protocol
- SDH frames Synchronous Digital Hierarchy
- IP cells Internet Protocol
- the IP cells are integrated into ATM cells and these are transferred into the SDH frame.
- packaging and depacketing processes are to be carried out twice.
- cross-sum calculations are carried out periodically for all data transmitted between two reference points in SDH frames.
- two switching nodes can function as reference points, between which a transmission section is arranged.
- the bit error rate is quantified on the transmission section.
- the checksum calculations are carried out independently of one another both in the transmitting and in the receiving switching node. It is in a cyclic time grid over z.
- BIP Bit Interleaved Parity
- the determined result is entered in a test field BIP (Bit Interleaved Parity) and is sent to the receiving switching node in the SDH frame.
- BIP Bit Interleaved Parity
- the sizes the path and mux section BIPs depend on the size of the SDH frame and range from 2 to n * 24 bits.
- the regenerator section GDP always has 8 bits.
- the receiving side, the test field übertra ⁇ gene GDP is evaluated and the same in accordance with a comparison of this analysis with its own Quers mmenbe- bill a quantification of the bit error rate on the transmission portion performed.
- bit errors e.g. bits 5, 7
- tuft errors the equipment required for SDH frames is very expensive and complex.
- connectionless switching does not create a permanent connection between the sending and the receiving device.
- IP packet switching can be used as an example for connectionless switching.
- Each packet is provided with a checksum to monitor the bit transmission quality. With the help of this checksum, bit errors can also be determined at the receiving end. However, the checksum only allows a recognition of whether an error has occurred during the transmission process or not. As a consequence, the IP packet in question is discarded at the receiving end. It is not possible to determine the number of errors that have occurred, as is the case, for example, with the GDP calculation method.
- the invention has for its object to show a way how a more efficient monitoring of the physical transmission quality can be carried out even in connectionless switching.
- the invention is, starting from the preamble of claim 1.
- patent applica ⁇ solved by the features specified in the characterizing part shopping ⁇ male.
- An advantage of the invention is in particular the transfer of the BIP calculation method known in connection-oriented switching to connectionless packet switches. This has the advantage that there is a more detailed error pattern in the system by determining the number of bit errors that have occurred. This bit error can also be recorded section by section, while the checksum method used in the prior art only permits an end-to-end statement.
- Figure 1 switching nodes that complete a transmission section
- Figure 2 is a flow chart of the method according to the invention.
- FIG. 1 shows a configuration on which the method according to the invention is carried out. Accordingly, two switching nodes R A , R B are shown, which terminate a transmission section UA.
- the switching nodes R A , R B are to be designed, for example, as IP routers.
- IP packets are to be routed via the transmission section UA via WDM (Wave Division Multiplexing).
- WDM Wide Division Multiplexing
- the sending switching node is the IP router R A and the receiving switching node is the IP router R B.
- FIG. 1 is ent ⁇ detachable, the sending IP router R A transfers IP packets of different lengths on the transfer section to the receiving UA IP router R B.
- the transmission section UA is designed bidirectional, for better understanding only the transfer from the sending IP router R A to the receiving IP router R B ever ⁇ but pointed out.
- the BIP calculations are carried out over a plurality of transmitted bits within a time interval.
- the higher-level packet structure is irrelevant here, ie the checksum calculation is carried out using the bits of several packets.
- the time interval is specified by two successive control packets PM.
- the determined result is now stored in a test field BIP together with a sequence number in a control packet PM, which is inserted quasi-periodically in the stream of outgoing IP packets.
- the quasi-periodic insertion is necessary because the IP packets are of variable length and their transmission cannot be interrupted. In this respect, periodic insertion of the control packages PM is not possible.
- it is now provided to reset a counting device when a control packet PM is inserted by the IP router R A.
- control packet PM is inserted into the IP packet stream as the next packet immediately after the current IP packet has been sent.
- the bits are counted and the GDP checksum calculation is carried out (time interval).
- the receiving IP router R B determines the arrival of a control packet PM, its content has been with its own since the GDP calculation performed last time a control packet was received. Further, the rows mitubertragene ⁇ is verfiziert sequence number that is to say, it must be high by 1, when the last control packet transmitted in the PM. If this is the case, the difference between the result of the self erstoff ⁇ th GDP calculation and GDP Pruffeld is formed. To measure the result ⁇ display the number n B is then determined the set ⁇ bit errors. As can be averaged out in the Quersummenbe ⁇ bill bit errors, it is at the value n B is a lower limit of the number of errors occurred.
- n R can be paid exactly at the receiving end, for example by ASIC components. Alternatively, an estimate is entirely sufficient. Accordingly, it is then assumed that constant times have elapsed between 2 control packets PM. This is equivalent to the statement that the control packets PM are inserted periodically into the outgoing stream of IP packets. The same number of bits is thus transmitted at the same transmission speed.
- the devices R A , R B are designed as switching nodes between which the method according to the invention is used.
- the invention is not limited to such configurations. It can also be used on individual transmission sections of a point-to-point connection between two switching nodes, which are delimited by regenerators.
- the transmission sections formed by regenerators form the entire connection section between the transmitting and the receiving end establishment.
- each regenerator can carry out the GDP calculation or check and also write the result of their own calculation back into the control package PM that is sent on. This enables a bit error rate estimation in sections.
- the segmental bit error rate estimates stored in the individual regenerators can then be read out, for example, using X.25 protocols.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Quality & Reliability (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP00926710A EP1180275A1 (en) | 1999-06-02 | 2000-04-10 | Method for monitoring bit transmission quality in packet-oriented transmission |
CA002375819A CA2375819A1 (en) | 1999-06-02 | 2000-04-10 | Method for monitoring bit transmission quality in packet-oriented transmission |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19925237.8 | 1999-06-02 | ||
DE19925237 | 1999-06-02 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2000076108A1 true WO2000076108A1 (en) | 2000-12-14 |
Family
ID=7909987
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2000/001094 WO2000076108A1 (en) | 1999-06-02 | 2000-04-10 | Method for monitoring bit transmission quality in packet-oriented transmission |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP1180275A1 (en) |
CA (1) | CA2375819A1 (en) |
WO (1) | WO2000076108A1 (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4831624A (en) * | 1987-06-04 | 1989-05-16 | Motorola, Inc. | Error detection method for sub-band coding |
US5410546A (en) * | 1993-11-01 | 1995-04-25 | Storage Technology Corporation | Apparatus and method for CRC computation over fixed length blocks containing variable length packets of data received out of order |
EP0862296A2 (en) * | 1997-02-21 | 1998-09-02 | Denso Corporation | Data communication system and electronic control unit used therein |
-
2000
- 2000-04-10 WO PCT/DE2000/001094 patent/WO2000076108A1/en not_active Application Discontinuation
- 2000-04-10 EP EP00926710A patent/EP1180275A1/en not_active Withdrawn
- 2000-04-10 CA CA002375819A patent/CA2375819A1/en not_active Abandoned
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4831624A (en) * | 1987-06-04 | 1989-05-16 | Motorola, Inc. | Error detection method for sub-band coding |
US5410546A (en) * | 1993-11-01 | 1995-04-25 | Storage Technology Corporation | Apparatus and method for CRC computation over fixed length blocks containing variable length packets of data received out of order |
EP0862296A2 (en) * | 1997-02-21 | 1998-09-02 | Denso Corporation | Data communication system and electronic control unit used therein |
Non-Patent Citations (1)
Title |
---|
FAIRHURST G ET AL: "SMART CODEC: AN ADAPTIVE PACKET DATA LINK", IEE PROCEEDINGS: COMMUNICATIONS,GB,INSTITUTION OF ELECTRICAL ENGINEERS, vol. 145, no. 3, 1 June 1998 (1998-06-01), pages 180 - 185, XP000766291, ISSN: 1350-2425 * |
Also Published As
Publication number | Publication date |
---|---|
EP1180275A1 (en) | 2002-02-20 |
CA2375819A1 (en) | 2000-12-14 |
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