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WO2000074110A3 - Structures constructionnelles et procedes de fabrication pour ensembles cartes a sondes pour circuits integres sur plaquettes - Google Patents

Structures constructionnelles et procedes de fabrication pour ensembles cartes a sondes pour circuits integres sur plaquettes Download PDF

Info

Publication number
WO2000074110A3
WO2000074110A3 PCT/US2000/014164 US0014164W WO0074110A3 WO 2000074110 A3 WO2000074110 A3 WO 2000074110A3 US 0014164 W US0014164 W US 0014164W WO 0074110 A3 WO0074110 A3 WO 0074110A3
Authority
WO
WIPO (PCT)
Prior art keywords
probe
spring
integrated circuit
probe card
structures
Prior art date
Application number
PCT/US2000/014164
Other languages
English (en)
Other versions
WO2000074110A2 (fr
Inventor
Sammy Mok
Fu Chiung Chong
Original Assignee
Nanonexus Inc
Sammy Mok
Fu Chiung Chong
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nanonexus Inc, Sammy Mok, Fu Chiung Chong filed Critical Nanonexus Inc
Priority to KR1020017015188A priority Critical patent/KR100707044B1/ko
Priority to JP2001500317A priority patent/JP2004500699A/ja
Priority to AU51563/00A priority patent/AU5156300A/en
Publication of WO2000074110A2 publication Critical patent/WO2000074110A2/fr
Publication of WO2000074110A3 publication Critical patent/WO2000074110A3/fr
Priority to US10/870,095 priority patent/US7349223B2/en
Priority to US10/888,761 priority patent/US20050068054A1/en
Priority to US11/133,021 priority patent/US7382142B2/en
Priority to US11/350,049 priority patent/US7579848B2/en
Priority to US11/552,110 priority patent/US7952373B2/en
Priority to US11/858,064 priority patent/US7872482B2/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes
    • G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07342—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being at an angle other than perpendicular to test object, e.g. probe card
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes
    • G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07364—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
    • G01R1/07378—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch using an intermediate adapter, e.g. space transformers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Measuring Leads Or Probes (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)

Abstract

La présente invention concerne plusieurs réalisations d'ensembles cartes à sondes pour circuits intégrés, lesquelles réalisations présentent une meilleure compatibilité mécanique entre les systèmes micro-électromécaniques et les sondes en couches minces, de façon que ce type de structures à sondes sur ressorts permet de tester au moins un circuit intégré sur une plaquette à semi-conducteurs. L'invention concerne également plusieurs réalisations d'ensembles cartes à sondes qui présentent une bonne compatibilité avec les pas serrés de plages de contact du signal et/ou permettent des niveaux élevés de tests en parallèle dans le cas des équipements du commerce utilisés pour le test des plaquettes. Pour certaines réalisations préférées, les structures d'ensemble cartes à sondes comportent des éléments standard séparables, ce qui permet d'abaisser les coûts et les délais de fabrication des ensembles. Ces structures et ensembles permettent le test à vitesse élevée sous la forme plaquette. Les sondes comportent également des protections mécaniques intégrées aussi bien pour les circuits intégrés et les systèmes micro-électromécaniques que pour les pointes des ressorts en films minces et les structures de distribution des sondes sur les substrats. Des modèles imbriqués de pointes de sondes sur ressorts ont été étudiés spécialement pour permettre des contacts de sondes multiples sur les très petites plages de contacts des circuits intégrés. Les formes des pointes de sondes sont de préférence définies de façon à garantir la profondeur de pénétration de la pointe de sonde entre un ressort de sonde et une plage de contact ou un tracé équipant un dispositif à circuit intégré. L'invention concerne enfin une amélioration des procédés d'enduction de protection pour les sondes sur ressorts, ce qui offre ainsi une plus grande fiabilité et une plus longue vie utile des ensembles cartes à sondes.
PCT/US2000/014164 1999-05-27 2000-05-23 Structures constructionnelles et procedes de fabrication pour ensembles cartes a sondes pour circuits integres sur plaquettes WO2000074110A2 (fr)

Priority Applications (9)

Application Number Priority Date Filing Date Title
KR1020017015188A KR100707044B1 (ko) 1999-05-27 2000-05-23 집적회로 웨이퍼 프로브카드 조립체의 구조물 및 그 제조방법
JP2001500317A JP2004500699A (ja) 1999-05-27 2000-05-23 集積回路ウェーハのプローブカード組立体の構造および製造方法
AU51563/00A AU5156300A (en) 1999-05-27 2000-05-23 Construction structures and manufacturing processes for integrated circuit waferprobe card assemblies
US10/870,095 US7349223B2 (en) 2000-05-23 2004-06-16 Enhanced compliant probe card systems having improved planarity
US10/888,761 US20050068054A1 (en) 2000-05-23 2004-07-09 Standardized layout patterns and routing structures for integrated circuit wafer probe card assemblies
US11/133,021 US7382142B2 (en) 2000-05-23 2005-05-18 High density interconnect system having rapid fabrication cycle
US11/350,049 US7579848B2 (en) 2000-05-23 2006-02-07 High density interconnect system for IC packages and interconnect assemblies
US11/552,110 US7952373B2 (en) 2000-05-23 2006-10-23 Construction structures and manufacturing processes for integrated circuit wafer probe card assemblies
US11/858,064 US7872482B2 (en) 2000-05-23 2007-09-19 High density interconnect system having rapid fabrication cycle

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13663699P 1999-05-27 1999-05-27
US60/136,636 1999-05-27

Publications (2)

Publication Number Publication Date
WO2000074110A2 WO2000074110A2 (fr) 2000-12-07
WO2000074110A3 true WO2000074110A3 (fr) 2001-09-27

Family

ID=22473698

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2000/014164 WO2000074110A2 (fr) 1999-05-27 2000-05-23 Structures constructionnelles et procedes de fabrication pour ensembles cartes a sondes pour circuits integres sur plaquettes

Country Status (4)

Country Link
JP (1) JP2004500699A (fr)
KR (1) KR100707044B1 (fr)
AU (1) AU5156300A (fr)
WO (1) WO2000074110A2 (fr)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6812718B1 (en) 1999-05-27 2004-11-02 Nanonexus, Inc. Massively parallel interface for electronic circuits
US7349223B2 (en) 2000-05-23 2008-03-25 Nanonexus, Inc. Enhanced compliant probe card systems having improved planarity
US7247035B2 (en) 2000-06-20 2007-07-24 Nanonexus, Inc. Enhanced stress metal spring contactor
US7382142B2 (en) 2000-05-23 2008-06-03 Nanonexus, Inc. High density interconnect system having rapid fabrication cycle
US7579848B2 (en) 2000-05-23 2009-08-25 Nanonexus, Inc. High density interconnect system for IC packages and interconnect assemblies
US7952373B2 (en) 2000-05-23 2011-05-31 Verigy (Singapore) Pte. Ltd. Construction structures and manufacturing processes for integrated circuit wafer probe card assemblies
TWI286209B (en) * 2006-01-27 2007-09-01 Mjc Probe Inc Integrated circuit probe card
KR100701498B1 (ko) * 2006-02-20 2007-03-29 주식회사 새한마이크로텍 반도체 검사용 프로브핀 조립체 및 그 제조방법
JP5024861B2 (ja) * 2006-08-01 2012-09-12 日本電子材料株式会社 プローブカード
US7604486B2 (en) * 2006-12-21 2009-10-20 Intel Corporation Lateral force countering load mechanism for LGA sockets
JP2010541275A (ja) * 2007-10-08 2010-12-24 アムスト カンパニー， リミテッド ウエハーテスト方法及びこのためのプローブカード
KR102035998B1 (ko) * 2013-10-25 2019-10-24 가부시키가이샤 어드밴티스트 인터페이스 장치, 제조 방법 및 시험 장치
CN107710004A (zh) * 2015-05-29 2018-02-16 R&D电路股份有限公司 集成电路测试环境中探针卡组件的改进的电源瞬变性能（电源完整性）
CN107665848B (zh) * 2016-07-29 2020-08-25 上海微电子装备（集团）股份有限公司 一种解键合调平装置及解键合方法
JP7262990B2 (ja) 2018-12-13 2023-04-24 株式会社日本マイクロニクス 電気的接続装置
CN111880067B (zh) * 2019-04-15 2023-05-05 台湾中华精测科技股份有限公司 晶片测试组件及其电性连接模块
KR20210058641A (ko) * 2019-11-12 2021-05-24 화인인스트루먼트 (주) 프로브 어레이 및 그를 이용한 프로브 카드의 프로브 헤드 제조 방법
CN113406481A (zh) * 2021-07-08 2021-09-17 陈清梅 一种集成电路输入端测试装置
US20230238234A1 (en) * 2022-01-24 2023-07-27 Texas Instruments Incorporated Automated overlay removal during wafer singulation

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0369112A1 (fr) * 1988-11-12 1990-05-23 MANIA GmbH & Co. Adaptateur pour appareil électronique de contrôle des circuits imprimés et équipement semblable
US5030109A (en) * 1990-08-24 1991-07-09 Amp Incorporated Area array connector for substrates
FR2680284A1 (fr) * 1991-08-09 1993-02-12 Thomson Csf Dispositif de connexion a tres faible pas et procede de fabrication.
US5436568A (en) * 1994-01-25 1995-07-25 Hughes Aircraft Company Pivotable self-centering elastomer pressure-wafer probe
EP0701136A2 (fr) * 1994-09-09 1996-03-13 Tokyo Electron Limited Sonde de test électrique
WO1996015458A1 (fr) * 1994-11-15 1996-05-23 Formfactor, Inc. Kit et ensemble carte de controle, et leurs procedes d'utilisation
WO1998021597A1 (fr) * 1996-11-12 1998-05-22 Charmant Beheer B.V. Adaptateur d'essai, son procede de fabrication et procede servant a controler des cartes a circuits imprimes
US5821763A (en) * 1992-10-19 1998-10-13 International Business Machines Corporation Test probe for high density integrated circuits, methods of fabrication thereof and methods of use thereof

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6453429A (en) * 1987-08-24 1989-03-01 Mitsubishi Electric Corp Device for testing semiconductor chip
JP2966671B2 (ja) * 1991-11-18 1999-10-25 東京エレクトロン株式会社 プローブカード
JP2995134B2 (ja) * 1993-09-24 1999-12-27 東京エレクトロン株式会社 プローブ装置
US5923180A (en) * 1997-02-04 1999-07-13 Hewlett-Packard Company Compliant wafer prober docking adapter
US6578264B1 (en) * 1999-06-04 2003-06-17 Cascade Microtech, Inc. Method for constructing a membrane probe using a depression
JP5728437B2 (ja) * 2012-07-17 2015-06-03 長野計器株式会社 物理量測定装置及び物理量測定装置の製造方法

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0369112A1 (fr) * 1988-11-12 1990-05-23 MANIA GmbH & Co. Adaptateur pour appareil électronique de contrôle des circuits imprimés et équipement semblable
US5030109A (en) * 1990-08-24 1991-07-09 Amp Incorporated Area array connector for substrates
FR2680284A1 (fr) * 1991-08-09 1993-02-12 Thomson Csf Dispositif de connexion a tres faible pas et procede de fabrication.
US5821763A (en) * 1992-10-19 1998-10-13 International Business Machines Corporation Test probe for high density integrated circuits, methods of fabrication thereof and methods of use thereof
US5436568A (en) * 1994-01-25 1995-07-25 Hughes Aircraft Company Pivotable self-centering elastomer pressure-wafer probe
EP0701136A2 (fr) * 1994-09-09 1996-03-13 Tokyo Electron Limited Sonde de test électrique
WO1996015458A1 (fr) * 1994-11-15 1996-05-23 Formfactor, Inc. Kit et ensemble carte de controle, et leurs procedes d'utilisation
WO1998021597A1 (fr) * 1996-11-12 1998-05-22 Charmant Beheer B.V. Adaptateur d'essai, son procede de fabrication et procede servant a controler des cartes a circuits imprimes

Also Published As

Publication number Publication date
AU5156300A (en) 2000-12-18
WO2000074110A2 (fr) 2000-12-07
JP2004500699A (ja) 2004-01-08
KR100707044B1 (ko) 2007-04-13
KR20030085142A (ko) 2003-11-05

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