WO2000065649A1

WO2000065649A1 - CVD TiN PLUG FORMATION FROM TITANIUM HALIDE PRECURSORS

Info

Publication number: WO2000065649A1
Application number: PCT/US2000/011212
Authority: WO
Inventors: John J. Hautala; Johannes F. M. Westendorp; Takenao Nemoto
Original assignee: Tokyo Electron Limited; Tokyo Electron Arizona, Inc.
Priority date: 1999-04-27
Filing date: 2000-04-26
Publication date: 2000-11-02
Also published as: JP2002543589A; KR20020020882A; KR100634651B1; TW466593B

Abstract

A method of depositing high quality titanium nitride (TiN) films and filling small contacts having high aspect ratio features using TiN. The method uses a CVD process with titanium tetraiodide (Til4) as a precursor material. The method allows TiN films with a thickness greater than about 0.3 νm to be deposited without cracking. For sufficiently high TiN deposition rates and sufficiently low TiN resistivities the preferred process temperature is at least about 500 °C. The method varies process pressure to obtain a seamless TiN plug fill in high aspect ratio structures.

Description

CVD TiN PLUG FORMATION FROM TITANIUM HAL1DE PRECURSORS

Field of the Invention

This invention relates to the formation of integrated circuits,

and specifically to chemical vapor deposition of titanium nitride films from

titanium halide precursors.

Background of the Invention

Integrated circuits provide the pathways for signal transport in

an electrical device. An integrated circuit (IC) in a device is composed of

a number of active transistors contained in a silicon base layer of a

semiconductor substrate. To increase the capacity of an IC, large numbers

of interconnections with metal "wires" are made between one active

transistor in the silicon base of the substrate and another active transistor

in the silicon base of the substrate. The interconnections, collectively

known as the metal interconnection of a circuit, are made through features

such as holes, vias or trenches that are cut into a substrate. The particular

point of the metal interconnection which actually makes contact with the

silicon base is known as the contact. The remainder of the hole, via or

trench is filled with a conductive material, termed a contact plug. As transistor densities continue to increase, forming higher level IC, the

diameter of the contact plug must decrease to allow for the increased

number of interconnects, multilevel metalization structures and higher

aspect ratio vias.

Vias greater than about OJ 6 μm in diameter are typically filled

as follows. A liner of about 1 00 A titanium (Ti) is first deposited using

either CVD or PVD. This Ti layer enhances the electrical contact to the

silicon base layer. A liner of about 500 Λ titanium nitride (TiN) is then

deposited on the Ti layer. Deposition may be by either CVD or PVD, with

low pressure CVD (LPCVD) preferred because only LPCVD provides the

conformality, defined as the ability to exactly reproduce the surface

topography of the underlying substrate, necessary to cover the bottom and

sidewalls of submicron structures with high aspect ratios. The TiN layer

serves as a metal diffusion barrier to protect Ti from corrosive attack by

fluorine (F) during subsequent tungsten (W) deposition from WF₆. TiN also

serves as an adhesion layer for W since W does not adhere to metal oxides.

While TiN provides an excellent contact barrier, the TiN must have a

thickness of about 500 A to be effective as a barrier. If the TiN thickness

is less than about 500 A, Ti metal diffuses into the silicon. The remainder

of the plug is then filled with W deposited by CVD. W is used because of

its low electrical resistivity and its reliability in forming contact plugs. The

W layer provides an area of low resistance, which is important for current

conduction in an IC. The surface of the contact plug is then etched or polished. The resulting planarized surface is necessary for optimal metal

interconnections, and thus for optimal function of the IC.

As transistor densities continue to increase, features continue

to be small, that is, having a diameter of 0.25 μm or less. The diameter of

the contact plug must decrease to allow for the increased number of

interconnections. For vias with a diameter of less than about 0J 6 μm,

however, the resistance of the contact plug metalization layer is dominated

by the TiN diffusion barrier layer. Since the TiN barrier layer must remain

at about 500 A for robust performance as a diffusion barrier, it follows that

the portion of the contact plug that is filled with W is diminished. For

example, a structure with a diameter of 0J 5 μm would have a W film or

"core" in the center of the plug that is only about 300 A. Therefore, the

effective plug resistance becomes dominated more by the higher resistivity

TiN and, more importantly, the resistance of the interface between the TiN

and W layers.

Subsequent filling of the contact plugs with W, then, provides

an extra procedural step with no significant effect on the overall resistance

of the contact plug. Accordingly, a process step in the formation of an IC

could be eliminated, and manufacturing efficiency could be increased by

filling a via with a contact plug of TiN only, rather than with TiN and W.

Therefore, what is needed is a method of forming a TiN contact plug by

CVD and eliminating a W layer in the contact plug in the formation of an IC. TiN films deposited by CVD, however, have relatively high

stress. A film with high stress has a high intensity of internally distributed

forces or components of forces that resist a change in volume or shape of

the film when the film is subjected to external forces. The high stress limits

the maximum film thickness that can be deposited. Typically, the maximum

thickness of a TiN film deposited by CVD over conventional first level

oxides is about 800 A. TiN films that are thicker than about 800 A begin

to crack due to internal stress in the film. Microcracks, appearing at the TiN

film surface and defined as discontinuities in the surface material that are

large enough to increase resistance of the film, thus result in suboptimal

performance of an IC.

While the absolute thickness of the W layer may vary

according to the size of the via to be filled, its relative thickness is about

80% of the via diameter. This is because the deposited film must not only

fill the volume of the via with a contact plug, but it must also fill the

"dimple" above the contact plug. The "dimple, " defined as an indentation

in the TiN that is formed during filling of the via, is eliminated by depositing

more TiN on top of the plug, resulting in a capping layer. Thus, for a 0.25

μm feature, a TiN film having a thickness of 2000 A (0.8 x 2500 A) is

required. For a good plug fill it is also critical that the film be continuous,

completely conformal, and seamless. A conformal film is one that exactly

reproduces the surface topography of the underlying substrate. A seamless

film is one that contains no cracks. A CVD method of filling a via in a substrate with a TiN plug

and capping with a TiN layer has been disclosed in U S. Patent Application

Serial No 08/964,532 assigned to Tokyo Electron Limited and incorporated

by reference herein in its entirety. These features are not available with

existing TiN depositions by CVD processes using TιCI₄ precursors. With

TιCI₄ precursors, the films consistently crack when thicknesses exceed

about 500-800 A. Cracking is unacceptable because it prevents adhesion

of the film to the underlying layers, resulting in the film "flaking off" and

thus compromising subsequent processes Cracking also increases the

expected electrical resistivity of the plug.

Therefore, a method of filling a high aspect ratio via with a

high quality conformal contact plug of TiN without cracking is desired.

Such a film would eliminate a W deposition step, and thus reduce the

number of process steps to fill the contact. This would represent a

significant savings for device fabrication.

Summary of the Invention

To this end, and in accordance with the principles of the

present invention, a method of filling a high aspect ratio via with a TiN plug

and eliminating a tungsten (W) deposition step is disclosed. The TiN plug

is deposited by CVD from a titanium iodide (Til) precursor. The preferred

Til precursor is titanium tetraiodide (Tιl₄) and is deposited by thermal CVD. The present invention is also directed to a method of

completely filling a high aspect ratio via which is less than about OJ 6 μm

in diameter with a TiN layer deposited by CVD.

The invention is also directed to a method of forming a contact

plug in a via of an IC by CVD of a TiN layer provided by a Til₄ precursor.

The via is a high aspect ratio via that is less than about 0J 6 μm in

diameter.

The TiN film that fills the contact plug according to the

invention is 1 00% conformal with the underlying topography. Films that

are 100% conformal are beneficial because they exactly reproduce the

surface topography of the underlying substrate, which allows optimal

function of an IC. Thus, this method is useful to completely fill high aspect

ratio features. Another advantage of the method is the elimination of a

separate process step in which W is deposited, saving both time and

expense. The method also eliminates the problem of adhering a W layer to

TiN. These and other objects and advantages of the present invention will

be made apparent from the accompanying drawings and description thereof.

Brief Description of the Drawings

FIG. 1 is a schematic of an apparatus for chemical vapor

deposition (CVD).

FIG . 2 is a graph comparing stress in titanium (TiX) halide

based titanium nitride (TiN) films. FIG. 3 is a photograph of a SEM of a titanium tetraiodide (Tιl₄)

based TiN film.

FIGS. 4A and 4B are transmission electron micrographs of Ti

halide based TiN films.

FIG. 5 is a photograph of a SEM of a 10: 1 aspect ratio structure

filled with TiN deposited by CVD at a pressure of 1 .5 Torr.

FIG. 6 is a photograph of a SEM of a 10: 1 aspect ratio structure

filled with TiN deposited by CVD at a pressure of 1 .0 Torr.

FIG. 7 is a photograph of a SEM of a 10: 1 aspect ratio structure

filled with TiN deposited by CVD at a pressure of 1 .0 Torr.

Detailed Description

In chemical vapor deposition (CVD) processes, gas precursors

are activated using either thermal energy or electrical energy. Upon

activation, the gas precursors react chemically to form a film. A preferred

method of CVD is illustrated in FIG 1 and is disclosed in a copending

application entitled APPARATUS AND METHOD FOR DELIVERY OF VAPOR

FROM SOLID SOURCES TO A CVD CHAMBER by Westendorp et al.,

assigned to Tokyo Electron Limited, filed on the same date as the present

application and incorporated by reference in its entirety. A chemical vapor

deposition (CVD) system 1 0 includes a CVD reaction chamber 1 1 and a

precursor delivery system 1 2. In the reaction chamber 1 1 , a reaction is

carried out to convert a precursor gas of a titanium halide compound, for

example, titanium iodide (Til) into a film such as a barrier layer film of TiN. The precursor delivery system 1 2 includes a source 1 3 of

precursor gas having a gas outlet 1 4, which communicates through a

metering system 1 5 with a gas inlet 1 6 to the CVD reaction chamber 1 1 .

The source 1 3 generates a precursor gas, for example a Til vapor from the

respective Til compound, preferably Til₄. The compound is one that is in a

solid state at standard temperature and pressure. The precursor source is

maintained, preferably by controlled heating, at a temperature that will

produce a desired vapor pressure of precursor. Preferably, the vapor

pressure is one that is itself sufficient to deliver the precursor vapor to the

reaction chamber 1 1 , preferably without the use of a carrier gas. The

metering system 1 5 maintains a flow of the precursor gas vapor from the

source 1 3 into the reaction chamber 1 1 at a rate that is sufficient to

maintain a commercially viable CVD process in the reaction chamber 1 1 .

The reaction chamber 1 1 is a generally conventional CVD

reactor and includes a vacuum chamber 20 that is bounded by a vacuum

tight chamber wall 21 . In the chamber 20 is situated a substrate support

or susceptor 22 on which a substrate such as a semiconductor wafer 23 is

supported. The chamber 20 is maintained at a vacuum appropriate for the

performance of a CVD reaction that will deposit a film such as a TiN barrier

layer on the semiconductor wafer substrate 23. A preferred pressure range

is 0.2-5.0 Torr. The vacuum is maintained by controlled operation of a

vacuum pump 24 and of inlet gas sources 25 that include the delivery

system 1 2 and may also include reducing gas sources 26 of, for example, hydrogen (H₂), nitrogen (N₂) or ammonia (NH₃) for use in carrying out a Ti

reduction reaction, and an inert gas source 27 for a gas such as argon (Ar)

or helium (He) . The gases from the sources 25 enter the chamber 20

through a showerhead 28 that is situated at one end of the chamber 20

opposite the substrate 23, generally parallel to and facing the substrate 23.

The precursor gas source 1 3 includes a sealed evaporator 30

that includes a cylindrical evaporation vessel 31 having a vertically oriented

axis 32. The vessel 31 is bounded by a cylindrical wall 33 formed of a high

temperature tolerant and non-corrosive material such as the alloy

INCONEL 600, the inside surface 34 of which is highly polished and

smooth. The wall 33 has a flat circular closed bottom 35 and an open top,

which is sealed by a cover 36 of the same heat tolerant and non-corrosive

material as the wall 33. The outlet 14 of the source 1 3 is situated in the

cover 36. When high temperatures are used, such as with Til₄ or TaBr₅, the

cover 36 is sealed to a flange ring 37 that is integral to the top of the

wall 33 by a high temperature tolerant vacuum compatible metal seal 38

such as a HELICOFLEX seal, which is formed of a C-shaped nickel tube

surrounding an INCONEL coil spring. With materials requiring lower

temperatures, such as TaCI₅ and TaF₅, a conventional elastomeric O-ring

seal 38 may be used to seal the cover.

Connected to the vessel 31 through the cover 36 is a

source 39 of a carrier gas, which is preferably an inert gas such as He or

Ar. The source 1 3 includes a mass of precursor material such as Til, preferably Tιl₄, at the bottom of the vessel 31 , which is loaded into the

vessel 31 at standard temperature and pressure in a solid state. The

vessel 31 is filled with Til vapor by sealing the vessel 31 with the solid

mass of Til therein. The Til is supplied as a precursor mass 40 that is

placed at the bottom of the vessel 31 , where it is heated, preferably to a

liquid state as long as the resulting vapor pressure is in an acceptable range.

Where the mass 40 is liquid, the vapor lies above the level of the liquid

mass 40. Because wall 33 is a vertical cylinder, the surface area of Til

mass 40, if a liquid, remains constant regardless of the level of depletion of

The delivery system 1 2 is not limited to direct delivery of a

precursor 40 but can be used in the alternative for delivery of precursor 40

along with a carrier gas, which can be introduced into the vessel 31 from

gas source 39. Such a gas may be hydrogen (H₂) or an inert gas such as

helium (He) or argon (Ar) . Where a carrier gas is used, it may be introduced

into the vessel 31 so as to distribute across the top surface of the precursor

mass 40 or may be introduced into the vessel 31 so as to percolate through

the mass 40 from the bottom 35 of the vessel 31 with upward diffusion in

order to achieve maximum surface area exposure of the mass 40 to the

carrier gas. Yet another alternative is to vaporize a liquid that is in the

vessel 31 . However, such alternatives add undesired particulates and do

not provide the controlled delivery rate achieved by the direct delivery of the precursor, that is, delivery without the use of a carrier gas. Therefore,

direct delivery of the precursor is preferred.

To maintain the temperature of the precursor 40 in the

vessel 31 , the bottom 35 of the wall 33 is maintained in thermal

communication with a heater 44, which maintains the precursor 40 at a

controlled temperature, preferably above its melting point, that will produce

a vapor pressure of greater than about 3 Torr in the absence of a carrier gas

(i.e., a direct delivery system), and a lower vapor pressure such as about 1

Torr when a carrier gas is used. The exact vapor pressure depends upon

other variables such as the quantity of carrier gas, the surface area of the

substrate 23, and so on. In a direct delivery system for Til, particularly Til₄,

such a temperature is in the range of about 1 80° C to 1 90° C.

Temperatures should not be so high as to cause premature reaction of the

gases in the showerhead 28 or otherwise before contacting the wafer 23.

For purposes of example, a temperature of 1 80°C is assumed

to be the control temperature for the heating of the bottom 35 of the vessel

31 . This temperature is appropriate for producing a desired vapor pressure

with a Til₄ precursor. Given this temperature at the bottom 35 of the

vessel 31 , to prevent condensation of the precursor vapor on the walls 33

and cover 36 of the vessel 31 , the cover is maintained at a higher

temperature than the heater 44 at the bottom 35 of the wall 33 of, for

example, 1 90°C, by a separately controlled heater 45 that is in thermal

contact with the outside of the cover 36. The sides of the chamber wall 33 are surrounded by an annular trapped air space 46, which is contained

between the chamber wall 33 and a surrounding concentric outer aluminum

wall or can 47. The can 47 is further surrounded by an annular layer of

silicon foam insulation 48. This temperature maintaining arrangement

maintains the vapor in a volume of the chamber bounded by the cover 36,

the sides of the walls 33 and the surface 42 of the precursor mass 40 in

the desired example temperature range of between 1 80°C and 1 90°C and

the pressure greater than about 3 Torr, preferably at greater than 5 Torr.

The temperature that is appropriate to maintain the desired pressure will

vary with the precursor material, which is primarily contemplated as a being

a titanium halide compound.

The vapor flow metering system 1 5 includes a delivery tube 50

of at least Vi inch in diameter, or at least 10 millimeters inside diameter,

and preferably larger so as to provide no appreciable pressure drop at the

flow rate desired, which is at least approximately 2 to 40 standard cubic

centimeters per minute (seem) . The tube 50 extends from the precursor

gas source 1 3 to which it connects at its upstream end to the outlet 1 4, to

the reaction chamber 1 1 to which it connects at its downstream end to the

inlet 1 6. The entire length of the tube 50 from the evaporator outlet 1 4 to

the reactor inlet 1 6 and the showerhead 28 of the reaction chamber 20 are

also preferably heated to above the evaporation temperature of the

precursor material 40, for example, to 1 95 ° C. In the tube 50 is provided baffle plate 51 in which is centered

a circular orifice 52, which preferably has a diameter of approximately

0.089 inches. The pressure drop from gauge 1 56 to gauge 2 57 is

regulated by control valve 53. This pressure drop after control valve 53

through orifice 52 and into reaction chamber 1 1 is greater than about 1 0

milliTorr and will be proportional to the flow rate. A shut-off valve 54 is

provided in the line 50 between the outlet 14 of the evaporator 1 3 and the

control valve 53 to close the vessel 31 of the evaporator 1 3.

Pressure sensors 55-58 are provided in the system 10 to

provide information to a controller 60 for use in controlling the system 1 0,

including controlling the flow rate of precursor gas from the delivery

system 1 5 into the chamber 20 of the CVD reaction chamber 1 1 . The

pressure sensors include sensor 55 connected to the tube 50 between the

outlet 1 4 of the evaporator 1 3 and the shut-off valve 54 to monitor the

pressure in the evaporation vessel 31 . A pressure sensor 56 is connected

to the tube 50 between the control valve 53 and the baffle 51 to monitor

the pressure upstream of the orifice 52, while a pressure sensor 57 is

connected to the tube 50 between the baffle 51 and the reactor inlet 1 6 to

monitor the pressure downstream of the orifice 52. A further pressure

sensor 58 is connected to the chamber 20 of the reaction chamber 1 1 to

monitor the pressure in the CVD chamber 20.

Control of the flow of precursor vapor into the CVD

chamber 20 of the reaction chamber 1 1 is achieved by the controller 60 in response to the pressures sensed by the sensors 55-58, particularly the

sensors 56 and 57 which determine the pressure drop across the orifice 52.

When the conditions are such that the flow of precursor vapor through the

orifice 52 is unchoked flow, the actual flow of precursor vapor through the

tube 52 is a function of the pressures monitored by pressure sensors 56

and 57, and can be determined from the ratio of the pressure measured by

sensor 56 on the upstream side of the orifice 52, to the pressure measured

by sensor 57 on the downstream side of the orifice 52.

When the conditions are such that the flow of precursor vapor

through the orifice 52 is choked flow, the actual flow of precursor vapor

through the tube 52 is a function of only the pressure monitored by

pressure sensor 57. In either case, the existence of choked or unchoked

flow can be determined by the controller 60 by interpreting the process

conditions. When the determination is made by the controller 60, the flow

rate of precursor gas can be determined by the controller 60 through

calculation.

Preferably, accurate determination of the actual flow rate of

precursor gas is calculated by retrieving flow rate data from lookup or

multiplier tables stored in a non-volatile memory 61 accessible by the

controller 60. When the actual flow rate of the precursor vapor is

determined, the desired flow rate can be maintained by a closed loop

feedback control of one or more of the variable orifice control valve 53, the

CVD chamber pressure through evacuation pump 24 or control of reducing or inert gases from sources 26 and 27, or by control of the temperature and

vapor pressure of the precursor gas in vessel 31 by control of heaters 44,

45.

Til₄ is widely available at a purity of 99.99%. It is a purple

black solid at ambient temperature ( 1 8 ° C-22 °C) with a melting point of

about 1 50°C, and is moisture sensitive. As shown in FIG. 1 , the solid Til₄

precursor material 40 is sealed in a cylindrical corrosion resistant metal

vessel 31 that maximizes the available surface area of the precursor

material. Vapor from Til₄ was delivered directly, that is without the use of

a carrier gas, by a high conductance delivery system into reaction

chamber 1 1 . The reaction chamber 1 1 was heated to a temperature of at

least about 1 00°C to prevent condensation of deposition by-products. For

precise control of the thickness of the deposited film it was desirable not

to use a carrier gas.

The controlled direct delivery of Til₄ vapor into the reaction

chamber was accomplished by heating the solid Til₄ precursor to a

temperature in the range of about 1 80° C-1 90°C in order to obtain a

sufficient vapor pressure greater than about 3 Torr and preferably greater

than 5 Torr. This pressure was required to maintain a constant pressure

drop across a defined orifice in a high conductance delivery system while

delivering up to about 50 seem Til₄ precursor to a process chamber

operating in the range of about OJ -2.0 Torr. The temperature to obtain

this pressure was about 1 85 °C with Til₄. A parallel plate RF discharge was used where the driven

electrode was the gas delivery showerhead and the susceptor 22 or stage

for the wafer or substrate 23 was the RF ground. The Til₄ vapor was

combined with a process gas containing ammonia (NH₃) above the

substrate, which had been heated to a temperature between about

300°C-500°C. Argon (Ar) , nitrogen (N₂) , hydrogen (H₂) and helium (He)

could be used, either singularly or in combination, as process gases.

The deposition requirements for a TiN film from a Til₄ precursor

are as follows. The deposition temperature must be less than about 650°C

to protect the integrity of the underlying materials on the substrate or

wafer 23. The deposition rate must be greater than about 300 A per

minute to provide an acceptable throughput. The chamber pressure can be

varied to obtain a desired film thickness. For example, at a wafer

temperature of about 550°C with 3000 seem NH₃ and 25 seem Til₄ without

the use of a carrier gas, a pressure of about 2.0 Torr yields a deposition rate

in the range of about 500-600 A per minute. Under these same conditions,

a pressure of about 1 .5 Torr yields a deposition rate of about 300 A per

minute, and a pressure of about 1 .0 Torr yields a deposition rate of about

1 50 A per minute. The deposited film must have low stress as measured

in force per unit area. The film stress must be less than about 1 x1 0¹⁰

dynes/cm², and with a cracking threshold greater than about 2000 A. The

electrical resistivity of the deposited film is preferably less than about 250

μΩcm. The film should exhibit 1 00% conformality in high aspect ratio structures. As used herein, high aspect ratio structures have an aspect

ratio greater than 8.0 and up to and including structures with an aspect

ratio of 1 0.0 or even higher. The feature may be a via, hole, trench, etc.

There should be no attack or corrosion of subsequently deposited films such

as aluminum (Al) films. There must be minimal impurities, ideally less than

about 2 atomic percent, in the film. Finally, the process gases such as He,

Ar, H₂ and N₂ must be used in commercially reasonable quantities.

The preferred ranges for the deposition of CVD TiN films are

given in Table 2, with the preferred conditions indicated in parentheses.

Sim is standard liters per minute and W/cm² is watts per centimeter

squared.

Table 2

The TiN films deposited by CVD from Til₄ precursors according

to the invention meet all of the desired criteria; they showed no attack on

a subsequently deposited Al layer and showed 1 00% conformality in

features having aspect ratios even greater than 1 0.0. Higher deposition temperatures resulted in lower resistivities, lower residual iodine

concentration and higher deposition rates with no sacrifice in conformality

or cracking threshold.

TiN films deposited using a Tιl₄ precursor according to the

present invention have a higher cracking threshold than TiN films deposited

using other titanium halide precursors such as TiCI₄. FIG 2 is a graph

comparing the stress or cracking of Tιl₄ and TιCI₄ based TiN films. The

circles indicate a TiN film deposited at 580 ° C from a TιCI₄ precursor. The

triangles indicate a TiN film deposited at 550°C from a Tιl₄ precursor. The

arrow indicates the point at which cracking was observed in TιCI₄ films. A

sharp decrease in film stress, measured in dynes/cm², with a small increase

in film thickness, measured in angstroms (A), corresponds to widespread

cracking.

As shown in FIG 2, a TιCI₄ based film exhibits a rapid decrease

in film stress for thicknesses less than about 1000 A. Widespread cracking

was observed on a scanning electron micrograph (SEM) of a TiN film

deposited using a TιCI₄ based precursor on films greater than about 600 A.

No evidence of cracking was observed at any point in Tιl₄ films having

thicknesses greater than 4000 A. FIG 3 is a scanning electron micrograph

(SEM) of a 2000 A crack-free Tιl₄ based TiN film filling a trench and

deposited according to the invention. The TiN layer 60 is 2000 A deposited

on a silicon dioxide layer 62. One reason for the higher cracking threshold for a TiN film

deposited using a Til₄ precursor is the intrinsically smaller grain size in the

film as compared to a TiN film deposited using a TiCI₄ precursor. Films

composed of a matrix of small grains would inhibit crack propagation, in

comparison to films consisting of larger TiN grains. FIG. 4 is a transmission

electron micrograph (TEM) of TiN films deposited by CVD according to the

invention using Til₄ and TiCI₄ based precursors deposited at 550° C and

580°C, respectively. As shown in FIG 4, Til₄ based films have substantially

smaller grains. The smaller grains are the probable reason for the superior

cracking threshold of the Til₄ based TiN films.

As shown in FIG 5 and FIG 6, the conformality of the film was

dependant upon process pressure in structures having high aspect ratio

features when all other process condition were identical. These conditions

were as follows: a temperature of 550°C, a flow of 3 slm NH₃, and a flow

of 25 seem Til₄. FIG 5 is an SEM of a 10: 1 aspect ratio structure filled with

TiN deposited by CVD at a pressure of 1 .5 Torr. FIG 6 is an SEM of a 10: 1

aspect ratio structure filled with TiN deposited by CVD at a pressure of 1 .0

Torr.

In high aspect ratio structures, a very highly saturated process

is required to form a good plug with no "keyholes" . The "keyhole" effect

occurs when TiN deposited in a via to form a contact plug does not

completely fill the via, leaving an area termed a keyhole that does not

contain TiN. This effect occurs when the via has substantially vertical walls, that is, walls that are substantially perpendicular to the base. In a via

with sloping walls, the keyhole effect is eliminated. It was observed that

for filling these structures a reduced process pressure of less than about 1 .5

Torr was required while maintaining gas flows of about 3 slm NH₃ and 25

seem Til₄. Good plug fill processes are possible at lower flow rates, but

only at the expense of deposition rates. Conversely, higher deposition rates

are possible with flow rates higher than those stated in Table 2.

FIG 7 shows the contact resistance data for electrical test

structures. A plug of Ti and TiN that was deposited according to the

invention from a Til₄ precursor (closed circles) was compared to a plug filled

with the typical Ti/TiN and W fill using a Til₄ precursor (open circles). The

contact size was 0.3 μm and the aspect ratio was 4: 1 . As shown in FIG

7, replacing the usual Ti, TiN, and W layers in filling a contact plug with Ti

and TiN results in equal contact resistances. This suggested that the

increase in bulk material resistivity in going from W to TiN is more than

compensated by the reduction in the number of metal interfaces.

Thus the plug fill process from Til₄ is a viable solution as a

replacement of the current W plug in the formation of IC devices. The

contact resistance is the same using the present invention as it is with a

standard W plug. This is noteworthy, considering that the bulk resistivity

of TiN is fifteen to twenty times greater than for W, which has a resistivity

of 1 0 μΩcm. This emphasizes the advantage of a single process and a

reduced number of interfaces in the plug. The film deposited by the method of the invention displays

characteristics important to the formation of an IC. The film has low

enough electrical resistivity for low interconnect impedences, the deposition

rates are sufficient for throughput considerations (greater than 1 00 A/min),

and the film can be deposited at a thickness greater than 0.3 μm without

cracking. The method of the invention can be used to fill a feature as small

as OJ 5 μm in diameter and with an aspect ratio greater than 1 0: 1 .

It should be understood that the embodiments of the present

invention shown and described in the specification are only preferred

embodiments of the inventors who are skilled in the art and are not limiting

in any way. For example, Ta films may be deposited by PECVD, TaN_x films

may be deposited by thermal CVD, PECVD and plasma treated thermal CVD

(PTTCVD) as disclosed in, respectively, PECVD OF Ta FILMS FROM

TANTALUM HALIDE PRECURSORS, THERMAL CVD OF TaN FILMS FROM

TANTALUM HALIDE PRECURSORS, PECVD OF TaN FILMS FROM

TANTALUM HALIDE PRECURSORS and PLASMA TREATED THERMAL CVD

OF TaN FILMS FROM TANTALUM HALIDE PRECURSORS all of which are

invented by Hautala and Westendorp, assigned to Tokyo Electron Limited,

are copending applications filed on the same date as the present application

and are expressly incorporated by reference herein in their entirety.

Furthermore, Ta/TaN_x bilayers may be deposited by CVD and TaN_x may be

used for plug fill according to the inventions as disclosed in, respectively,

INTEGRATION OF CVD Ta AND TaN_v FILMS FROM TANTALUM HALIDE PRECURSORS and CVD TaN_x PLUG FORMATION FROM TANTALUM

HALIDE PRECURSORS, both of which are invented by Hautala and

Westendorp, assigned to Tokyo Electron Limited, are copending applications

filed on the same date as the present application and are expressly

incorporated by reference herein in their entirety. Therefore, various

changes, modifications or alterations to these embodiments may be made

or resorted to without departing from the spirit of the invention and the

scope of the following claims.

What is claimed is:

Claims

1 . A method of filling a feature in a substrate having a titanium

(Ti) film deposited therein comprising depositing titanium nitride (TiN) by

providing a vapor of a Ti halide precursor to a reaction chamber containing

said substrate by heating said precursor to a temperature sufficient to

vaporize said precursor, then combining said vapor with a process gas

containing nitrogen to deposit said TiN by a chemical vapor deposition

(CVD) process.

2. The method of claim 1 wherein said feature has an aspect ratio

greater than 8.0.

3. The method of claim 1 wherein said feature has a diameter

less than about OJ 6 μm.

4. The method of claim 1 wherein said titanium halide precursor

is titanium tetraiodide (Til₄) .

5. The method of claim 4 wherein said substrate is heated to a

temperature in the range of about 400-650°C.

6. The method of claim 4 wherein said precursor delivery is in the

range of about 5-40 seem.

7. The method of claim 4 wherein said TiN is deposited at a rate

in the range of about 1 00-600 A/min.

8. The method of claim 1 wherein said nitrogen containing gas is

ammonia.

9. The method of claim 8 wherein said ammonia is at a flow rate

of about 3 slm.

10. The method of claim 1 wherein said process is a thermal CVD

process.

1 1 . A method of providing a conformal seamless titanium nitride

(TiN) plug in a high aspect ratio feature of a substrate in a reaction chamber

comprising providing a pressure less than 1 .5 Torr in said chamber while

providing a vapor of a titanium tetraiodine precursor to said chamber at a

temperature sufficient to vaporize said precursor, then combining said vapor

with a process gas containing nitrogen at a flow in the range of about 5-40

seem to deposit said TiN by a chemical vapor deposition process.

1 2. A substrate comprising a high aspect ratio feature filled with

a conformal seamless TiN film deposited on a Ti film from a Ti halide

precursor, said TiN film capable of withstanding a stress in the range of

about 1 -1 5 x 1 0⁹ dynes/cm² and having a resistivity in the range of about

85-400 μΩcm.

1 3. The substrate of claim 1 2 wherein said TiN film has a

thickness of up to at least 4000 A.

14. The substrate of claim 1 2 wherein said TiN film has less than

about 2 atomic percent impurities.

1 5. The substrate of claim 1 2 wherein said Ti halide precursor is

titanium tetraiodide.

1 6. The substrate of claim 1 2 wherein said Ti halide precursor is

provided to a reaction chamber containing said substrate by heating said

precursor to a temperature sufficient to vaporize said precursor, then

combining said vapor with a process gas containing nitrogen, and depositing

said TiN on said substrate by a chemical vapor deposition process.