WO1999030541A1 - Printed circuits and method for making - Google Patents
Printed circuits and method for making Download PDFInfo
- Publication number
- WO1999030541A1 WO1999030541A1 PCT/US1998/025395 US9825395W WO9930541A1 WO 1999030541 A1 WO1999030541 A1 WO 1999030541A1 US 9825395 W US9825395 W US 9825395W WO 9930541 A1 WO9930541 A1 WO 9930541A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- conductive material
- channels
- piece
- printed circuit
- dielectric
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 43
- 239000004020 conductor Substances 0.000 claims abstract description 27
- 239000000126 substance Substances 0.000 claims abstract description 25
- 238000004519 manufacturing process Methods 0.000 claims abstract description 23
- 239000003989 dielectric material Substances 0.000 claims abstract description 20
- 238000003754 machining Methods 0.000 claims abstract description 14
- 238000005520 cutting process Methods 0.000 claims abstract description 11
- 238000002347 injection Methods 0.000 claims abstract description 7
- 239000007924 injection Substances 0.000 claims abstract description 7
- 238000001746 injection moulding Methods 0.000 claims description 7
- 238000003486 chemical etching Methods 0.000 claims 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 24
- 229910052802 copper Inorganic materials 0.000 abstract description 24
- 239000010949 copper Substances 0.000 abstract description 24
- 239000000463 material Substances 0.000 description 7
- 238000000465 moulding Methods 0.000 description 6
- 238000007796 conventional method Methods 0.000 description 3
- 238000005304 joining Methods 0.000 description 3
- 239000000047 product Substances 0.000 description 3
- 238000003466 welding Methods 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 238000009958 sewing Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000001458 anti-acid effect Effects 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 239000007795 chemical reaction product Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 239000002966 varnish Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
- H05K3/202—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using self-supporting metal foil pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09118—Moulded substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0369—Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
Definitions
- the present invention generally relates to a manufacturing process for two-sided printed circuits that includes a machining step for shaping a design for the printed circuit and a molding step to place a dielectric layer between two sets of circuit traces.
- a copper plate is adhered over a dielectric support 116.
- the copper plate is covered in the areas where the chemical attack is not desired.
- Producing the chemical attack over the copper plate results in the corresponding tracks 115 and the grooves or inter-tracks 113 having walls in the shape of inclined planes.
- the distance between tracks in the lower part of the grooves, where there is the interface between the copper plate with the dielectric substrate, has a smaller width than in the upper part of the same.
- Figure 7 illustrates how a volume
- the amount of volume that is lost results from the loss of material coming from the simple product of the height "d" of the material by the width "c" by the length of the track 115.
- This invention includes an improvement over that shown in Spanish Application No. 9700184 (commonly owned with this application).
- the improved method and assembly of this invention provides enhanced manufacturing economies and a more reliable and less expensive end product.
- this invention is a manufacturing process for making two-sided printed circuit boards.
- the process begins with taking a copper plate and machining grooves into the plate in accordance with the desired design of the printed circuit.
- a second copper plate is treated in the same manner.
- the two treated copper plates are then placed in a generally parallel alignment.
- a dielectric material is then molded onto the conductive plates so that the dielectric material fills the spacing between the plates and the grooves that have been machined on each plate. This results in an assembly of the dielectric in a middle portion with the conductive material on either side.
- the exposed conductive material preferably is then subjected to one of three processes to form grooves that coincide with the grooves that were previously machined.
- the three processes can include a conventional chemical attack, chemical machining or chemical cutting.
- the process results in tracks and grooves on both sides of the assembly having better geometric characteristics than those accomplished with the prior art.
- the object of the present invention is that of introducing a new way of manufacturing printed circuits, in order to be able to absorb the losses of the three percent or four percent that happen when manufacturing printed circuits with traditional methods. Further, this invention simplifies the manufacturing of printed circuits on the base of grouping a series of operations in a single assembly. This allows some of the manufacturing operations to be performed in the plant of the printed circuit manufacturer itself. Moreover, this invention greatly simplifies the process of making a two-sided circuit board. Further, this invention eliminates the need for the techniques of forming a negative of the desired configuration and then later using a chemical attack. Therefore, this invention provides a gain in manufacturing speed and utilizes processes with no adverse consequences for the environment.
- Figure 1 is an elevational, cross-sectional view of a conventional copper plate useful for printed circuit manufacturing.
- Figure 2 illustrates the plate of Figure 1 after it has been subjected to a chemical machining or chemical cutting process.
- Figure 3 is an elevational, cross-sectional view of the embodiment of Figure 2 with an injection molded dielectric substrate attached.
- Figure 4 is an elevational, cross-sectional view of the embodiment of Figure 3 later in the inventive process.
- FIG 5 shows another embodiment where two products made as shown in Figure 4 are joined together.
- Figure 6 illustrates the state of the art.
- Figure 7 is an enlargement of the circled portion of Figure 6.
- Figure 8 illustrates the preferred method of making a two-sided circuit board at an early stage in the process.
- Figure 9 shows the embodiment of Figure 8 at a later stage in the process.
- Figure 10 illustrates a finished product made using the preferred method of this invention.
- FIG. 1 is a schematic and illustrative illustration of one embodiment of this invention.
- the injection molding operation serves two basic purposes. First, it gives the necessary dielectric support to the printed circuit. Second, it efficiently protects the inter-tracks 13 formed in the copper plate, in which can be seen that the walls of the grooves or inter-tracks are nearly fully vertical ⁇ i.e. , perpendicular to the outside face 11 of the copper plate).
- the injection molded dielectric 14 also gives a certain mechanical stiffness to the assembly.
- conductive material plates of conductive characteristics similar to those of copper can be used.
- a variety of substances with dielectric properties can be used and in some instances preferably include the above- mentioned characteristics of being able to withstand high temperature and being able to be used easily in an injection molding process in order to penetrate between the inter-tracks 13.
- the dielectric can be treated with a glue or adhesive in order to form double circuits as shown in Figure 5.
- Temperature resistant properties of the dielectric 14 preferably accommodate a molding process for joining two assemblies.
- the molding operation may be substituted with the application of a simple coating of the base 11 after the grooves 13 have been formed in its surface, refilling the grooves 13 with any material of dielectric nature. The same later steps described above preferably then are used to complete the circuit manufacturing process.
- FIG 8 the most preferred method of this invention is schematically illustrated.
- Upper plates 10, which have had one face treated by the chemical machining or cutting process to form the inter-tracks 13 (as shown in Figure 2) are positioned in a generally parallel alignment.
- a set of holding members 30 are utilized to maintain the copper plates 10 in the desired orientation with a spacing between them.
- an injection molding process preferably is utilized to inject a dielectric material 14 into the spacing between the plates 10, filling the inter-tracks 13.
- this invention provides a more efficient method of making a two-sided circuit plate with a dielectric support 14.
- the embodiment of this invention diagrammatically illustrated in Figures 8 through 10 includes an additional improvement.
- the one-step molding process for the dielectric material 14 introduces manufacturing economies and increases the range of dielectric materials 14 that can be used as the dielectric support for a two- sided circuit.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Laminated Bodies (AREA)
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000524962A JP2002503878A (en) | 1997-12-05 | 1998-11-30 | Printed circuit and manufacturing method |
KR1020007005566A KR20010015829A (en) | 1997-12-05 | 1998-11-30 | Printed circuits and method for making |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
ES9702533 | 1997-12-05 | ||
ES9702533A ES2143932B1 (en) | 1997-01-31 | 1997-12-05 | IMPROVEMENTS INTRODUCED IN THE PROCEDURE FOR THE MANUFACTURE OF PRINTED CIRCUITS SUBJECT TO MAIN PATENT N. 9700184 (8) BY A PROCEDURE FOR THE MANUFACTURE OF PRINTED CIRCUITS. |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1999030541A1 true WO1999030541A1 (en) | 1999-06-17 |
Family
ID=8301409
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US1998/025395 WO1999030541A1 (en) | 1997-12-05 | 1998-11-30 | Printed circuits and method for making |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0923278A1 (en) |
JP (1) | JP2002503878A (en) |
KR (1) | KR20010015829A (en) |
WO (1) | WO1999030541A1 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1257157B1 (en) * | 1999-12-31 | 2004-11-24 | Lear Automotive (EEDS) Spain, S.L. | Method for manufacturing printed circuit boards |
JP3643743B2 (en) * | 2000-01-28 | 2005-04-27 | 三洋電機株式会社 | Mounting board |
CN102878971B (en) * | 2012-10-17 | 2015-01-21 | 无锡江南计算技术研究所 | Fixed structure of etching amount test piece of horizontal wet etching line |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5092032A (en) * | 1990-05-28 | 1992-03-03 | International Business Machines Corp. | Manufacturing method for a multilayer printed circuit board |
US5179777A (en) * | 1991-03-07 | 1993-01-19 | Nec Corporation | Method of making multilayer printed wiring boards |
US5233753A (en) * | 1990-11-16 | 1993-08-10 | Bayer Aktiengesellschaft | Method of making injection-moulded printed circuit boards |
US5638598A (en) * | 1993-06-17 | 1997-06-17 | Hitachi Chemical Company, Ltd. | Process for producing a printed wiring board |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3085295A (en) * | 1957-04-30 | 1963-04-16 | Michael A Pizzino | Method of making inlaid circuits |
GB971775A (en) * | 1961-07-17 | 1964-10-07 | Borg Warner | Electrical terminal board |
US3177103A (en) * | 1961-09-18 | 1965-04-06 | Sauders Associates Inc | Two pass etching for fabricating printed circuitry |
US3264152A (en) * | 1963-03-26 | 1966-08-02 | Tri Tech | Method for fabricating electrical circuit components |
DE1665944A1 (en) * | 1967-05-13 | 1971-04-08 | Siemens Ag | Process for making electrical circuits |
DE2649250A1 (en) * | 1976-01-23 | 1977-07-28 | Synthane Taylor Corp | CARRIER FOR ELECTRICAL CIRCUITS AND METHOD FOR MANUFACTURING SUCH A CARRIER |
ES2125821B1 (en) * | 1997-01-31 | 1999-12-01 | Mecanismos Aux Ind | A PROCEDURE FOR THE MANUFACTURE OF PRINTED CIRCUITS. |
-
1998
- 1998-11-30 KR KR1020007005566A patent/KR20010015829A/en not_active Withdrawn
- 1998-11-30 JP JP2000524962A patent/JP2002503878A/en active Pending
- 1998-11-30 WO PCT/US1998/025395 patent/WO1999030541A1/en not_active Application Discontinuation
- 1998-12-01 EP EP98500259A patent/EP0923278A1/en not_active Withdrawn
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5092032A (en) * | 1990-05-28 | 1992-03-03 | International Business Machines Corp. | Manufacturing method for a multilayer printed circuit board |
US5233753A (en) * | 1990-11-16 | 1993-08-10 | Bayer Aktiengesellschaft | Method of making injection-moulded printed circuit boards |
US5179777A (en) * | 1991-03-07 | 1993-01-19 | Nec Corporation | Method of making multilayer printed wiring boards |
US5638598A (en) * | 1993-06-17 | 1997-06-17 | Hitachi Chemical Company, Ltd. | Process for producing a printed wiring board |
Also Published As
Publication number | Publication date |
---|---|
KR20010015829A (en) | 2001-02-26 |
EP0923278A1 (en) | 1999-06-16 |
JP2002503878A (en) | 2002-02-05 |
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