WO1999005601A1 - Systeme de securite - Google Patents
Systeme de securite Download PDFInfo
- Publication number
- WO1999005601A1 WO1999005601A1 PCT/AU1998/000572 AU9800572W WO9905601A1 WO 1999005601 A1 WO1999005601 A1 WO 1999005601A1 AU 9800572 W AU9800572 W AU 9800572W WO 9905601 A1 WO9905601 A1 WO 9905601A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- housing
- data processing
- electronic data
- processing means
- access
- Prior art date
Links
- 238000012545 processing Methods 0.000 claims abstract description 44
- 238000001514 detection method Methods 0.000 claims abstract description 32
- 230000006378 damage Effects 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims description 8
- 230000001939 inductive effect Effects 0.000 claims description 4
- 230000004044 response Effects 0.000 claims description 2
- 230000008878 coupling Effects 0.000 description 8
- 238000010168 coupling process Methods 0.000 description 8
- 238000005859 coupling reaction Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000012544 monitoring process Methods 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
- G06F21/86—Secure or tamper-resistant housings
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2221/00—Indexing scheme relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/21—Indexing scheme relating to G06F21/00 and subgroups addressing additional information or applications relating to security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F2221/2143—Clearing memory, e.g. to prevent the data from being stolen
Definitions
- This invention relates to a security system.
- the invention has particular but not exclusive application to a security system for preventing unauthorised access to data or other information stored in or processed by electronic data processing systems.
- electronic data processing system has a broad meaning and includes any system in which data is processed electronically.
- electronic data processing systems include mobile telephones, computers, EFTPOS facilities and secure access systems.
- mobile phones include a chip which when activated establishes a legalising assignment or identification to an individual phone.
- a removable smart card then assigns a unique telephone number to the individual phone and when the legal assignment and the telephone number are associated upon use of the phone, billing procedures are initiated and directed to the owner of the phone. If unauthorised access to the interior of the phone casing is gained, the chip and phone software can be monitored and data flow and analysed whereby telephone account billings can be falsified.
- access to the interior of the devices simplifies access to security codes embedded in an EEPROM chip for example, and allows monitoring of data flow and analysis of the "eavesdropped" data to enable decryption of the encrypted messages.
- switching means which are activated when the case containing the chip or software to be secured is opened.
- the switching means activates a mechanism to protect the chip or software.
- the present invention aims to provide an alternative to known security systems for preventing unauthorised access to data or other information stored in or processed by electronic data processing systems.
- This invention in one aspect resides broadly in a security system for preventing unauthorised access to data or other information stored in or processed by electronic data processing means enclosed within a housing, the security system including:- detection means for detecting access or attempted access to the electronic data processing means from without the housing, and destruction means for destroying the data or other information stored in or processed by the electronic data processing means.
- the detection means are adapted to activate the destruction means to destroy the data or other information stored in or processed by the electronic data processing means upon detection by the detection means of access or attempted access to the electronic data processing means from without the housing.
- the detection means may take various forms and in one embodiment may be a normally open switch closed when the housing is opened.
- the housing may be sealed with the electronic data processing means may be sealed within the housing and the interior of the housing pressurised to above atmospheric pressure with the detection means comprising a pressure sensitive switch.
- the detection means includes processor circuit means in the electronic data processing means, and housing circuit means in the housing.
- the processor circuit means and the housing circuit may constitute a reactance circuit and the reactance may be either a capacitive reactance or an inductive reactance.
- the system includes :- oscillator means tuned to the reactance circuit for generating a fixed frequency; frequency detector means for detecting variation from the fixed frequency, and switching means responsive to detection of the frequency variation to apply a voltage to destroy the chip containing the data or other information stored in or processed by the electronic data processing means.
- the destruction means includes a stand-alone power supply independent of the primary power supply to the electronic data processing means .
- the arrangement may also include voltage detection means for detecting a predetermined minimum threshold voltage in the stand-alone power supply, the voltage detection means actuating the stand-alone power supply to destroy the data or other information stored in or processed by the electronic data processing means upon detection by the voltage detection means of the predetermined minimum threshold voltage. It is preferred that the system further includes warning means for warning that the voltage of the stand-alone power supply is approaching the predetermined minimum threshold voltage.
- this invention resides broadly in a method of preventing unauthorised access to data or other information stored in or processed by electronic data processing means enclosed within a housing, the method including:- detecting access or attempted access to the electronic data processing means from without the housing, and destroying the data or other information stored in or processed by the electronic data processing means in response to detection of the access or attempted access.
- the method includes :- locating processor circuit means in the electronic data processing means, and locating housing circuit means in the housing; wherein the processor circuit means and the housing means constitute detection means for detecting access or attempted access to the electronic data processing means from without the housing.
- this invention resides broadly in a mobile telephone including :- a housing; electronic data processing means enclosed within the housing; detection means for detecting access or attempted access to the electronic data processing means from without the housing, and destruction means for destroying the data or other information stored in or processed by the electronic data processing means.
- FIG 1 is a schematic illustration of a housing containing a chip
- FIG 2 is a schematic illustration of a mobile telephone
- FIG 3 is a schematic circuit diagram of an arrangement to destroy the chip if the security of the housing is breached
- FIG 4 schematically illustrates a reactance coupling for detecting if the security of the housing is breached
- FIG 5 is a schematic circuit diagram illustrating the operation of a security system in accordance with the invention which includes an inductive coupling
- FIG 6 is a schematic circuit diagram illustrating the operation of a security system in accordance with the invention which includes a capacitive coupling and an independent internal power supply to destroy the chip.
- a housing 10 contains a chip 11 to which it is desired to prevent close physical access.
- a practical example is a mobile telephone 14 illustrated in FIG 2 which has a housing 15, a battery power pack 16 covering a hatchway 17 providing access to internal componentry including chip 18.
- an internal power-supply in the form of a long-life battery 13 is connectable through normally open switch 12 to chip 11.
- switch 12 When switch 12 is enabled, voltage source 13 is connected across chip 11 and destroys it.
- Switch 12 is activated by detection means 37 which detect any breaching of housing 10. Consequently if an attempt is made to locate a monitor or data analyser physically close to chip 11, as for example by opening a hatchway, removing a cover or even drilling a hole to insert a micro-device, the breaching of housing 10 is detected by detection means 37, and power is applied from voltage source 13 to destroy chip 11.
- the security system of the present invention preserves security by destroying any sensitive data before it can be accessed. It will be appreciated that the chip will be destroyed on all occasions when the integrity of housing 10 is breached. This means that the chip is destroyed even when authentic repair work is being carried out and the housing is opened legitimately.
- the chips to be protected may be completely sealed within an integral housing (not shown) and the housing pressurised to a pressure above or below atmospheric.
- a pressure sensitive switch (not shown) detects the variation in pressure if the housing is breached and closes the circuit to destroy the chip as described above.
- the housing can include two surfaces juxtaposed when the housing is closed and separated when the housing is opened. Juxtaposition of the surfaces has the effect of opening a normally closed electrical switch. If the juxtaposed surfaces become separated the switch closes and the circuit to a power supply is completed to destroy the chip.
- the juxtaposed surfaces 19 and 20 may each include a circuit component 21,22 such that the juxtaposed components constitute a reactance coupling circuit.
- FIGS 5 and 6 respectively illustrate inductive and capacitive coupling of the juxtaposed surfaces to effect destruction of the chip when the reactance of the coupling circuit varies.
- Induction loops 23 and 24 (in FIG 5) and capacitor plates 29 and 30 (in FIG 6) are respectively positioned in juxtaposed surfaces of the housing hatch and the housing per se.
- oscillator 25 generates a fixed frequency in accordance with the reactance of coupling 23,24 or 29,30.
- Frequency detector 26 detects variation in the frequency from oscillator 25 generated by variation in the reactance of the coupling by breaching the housing by separating the normally juxtaposed surfaces. If frequency detector 26 detects a variation in the frequency, a normally open switch 27 is closed to connect independent voltage supply 28 across the chip to thereby destroy it.
- a minimum threshold voltage detector 29 is connected across long-life battery 28 to detect when the voltage drops to a predetermined level.
- a warning signal can be generated by signal generating means (not shown) to give a warning as the voltage of power source 28 approaches the minimum threshold level.
- the so called “scorched earth” security of the present invention operates to ensure that the chips are destroyed irrespective of the circumstances under which the housing is opened or otherwise breached, ie whether authorised or unauthorised.
- the security system of the present invention has a number of advantages over known security systems which are directed toward denying access to the chip rather that destroying the chip if access is obtained.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Storage Device Security (AREA)
Abstract
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU83260/98A AU8326098A (en) | 1997-07-22 | 1998-07-20 | Security system |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AUPO8176A AUPO817697A0 (en) | 1997-07-22 | 1997-07-22 | Security system |
AUPO8176 | 1997-07-22 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1999005601A1 true WO1999005601A1 (fr) | 1999-02-04 |
Family
ID=3802466
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/AU1998/000572 WO1999005601A1 (fr) | 1997-07-22 | 1998-07-20 | Systeme de securite |
Country Status (2)
Country | Link |
---|---|
AU (2) | AU690058B3 (fr) |
WO (1) | WO1999005601A1 (fr) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009009201A3 (fr) * | 2007-04-24 | 2009-03-12 | Wms Gaming Inc | Sécurisation de machines de jeu de pari mobiles |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4691350A (en) * | 1985-10-30 | 1987-09-01 | Ncr Corporation | Security device for stored sensitive data |
WO1988008176A1 (fr) * | 1987-04-14 | 1988-10-20 | Ido Ag | Installation protegee contre une intervention non-autorisee |
GB2227107A (en) * | 1978-10-14 | 1990-07-18 | Emi Ltd | Equipment for electronically storing data |
DE4018688A1 (de) * | 1990-06-11 | 1991-01-10 | Siemens Ag | Verfahren zum schutz einer integrierten schaltung gegen das auslesen sensitiver daten |
WO1991005306A1 (fr) * | 1989-10-03 | 1991-04-18 | University Of Technology, Sydney | Circuits avec coffret de protection electro-actif permettant la detection des tentatives d'acces ou de penetration non autorisees |
WO1998013872A1 (fr) * | 1996-09-23 | 1998-04-02 | Siemens Aktiengesellschaft | Systeme de protection d'analyse pour puce a semi-conducteur |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4593384A (en) * | 1984-12-21 | 1986-06-03 | Ncr Corporation | Security device for the secure storage of sensitive data |
-
1997
- 1997-07-22 AU AU30120/97A patent/AU690058B3/en not_active Ceased
- 1997-07-22 AU AUPO8176A patent/AUPO817697A0/en not_active Abandoned
-
1998
- 1998-07-20 WO PCT/AU1998/000572 patent/WO1999005601A1/fr active Application Filing
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2227107A (en) * | 1978-10-14 | 1990-07-18 | Emi Ltd | Equipment for electronically storing data |
US4691350A (en) * | 1985-10-30 | 1987-09-01 | Ncr Corporation | Security device for stored sensitive data |
WO1988008176A1 (fr) * | 1987-04-14 | 1988-10-20 | Ido Ag | Installation protegee contre une intervention non-autorisee |
WO1991005306A1 (fr) * | 1989-10-03 | 1991-04-18 | University Of Technology, Sydney | Circuits avec coffret de protection electro-actif permettant la detection des tentatives d'acces ou de penetration non autorisees |
DE4018688A1 (de) * | 1990-06-11 | 1991-01-10 | Siemens Ag | Verfahren zum schutz einer integrierten schaltung gegen das auslesen sensitiver daten |
WO1998013872A1 (fr) * | 1996-09-23 | 1998-04-02 | Siemens Aktiengesellschaft | Systeme de protection d'analyse pour puce a semi-conducteur |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009009201A3 (fr) * | 2007-04-24 | 2009-03-12 | Wms Gaming Inc | Sécurisation de machines de jeu de pari mobiles |
Also Published As
Publication number | Publication date |
---|---|
AUPO817697A0 (en) | 1997-08-14 |
AU690058B3 (en) | 1998-04-09 |
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