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WO1999053619A3 - A multi-output digital to analog converter - Google Patents

A multi-output digital to analog converter Download PDF

Info

Publication number
WO1999053619A3
WO1999053619A3 PCT/IB1999/000576 IB9900576W WO9953619A3 WO 1999053619 A3 WO1999053619 A3 WO 1999053619A3 IB 9900576 W IB9900576 W IB 9900576W WO 9953619 A3 WO9953619 A3 WO 9953619A3
Authority
WO
WIPO (PCT)
Prior art keywords
output
loads
ldi
buffer
load
Prior art date
Application number
PCT/IB1999/000576
Other languages
French (fr)
Other versions
WO1999053619A2 (en
Inventor
Franciscus P M Vos
Original Assignee
Koninkl Philips Electronics Nv
Philips Svenska Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv, Philips Svenska Ab filed Critical Koninkl Philips Electronics Nv
Priority to JP55140399A priority Critical patent/JP3854314B2/en
Priority to DE69930812T priority patent/DE69930812T2/en
Priority to KR10-1999-7011794A priority patent/KR100535693B1/en
Priority to EP99909147A priority patent/EP0998790B1/en
Publication of WO1999053619A2 publication Critical patent/WO1999053619A2/en
Publication of WO1999053619A3 publication Critical patent/WO1999053619A3/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2011—Display of intermediate tones by amplitude modulation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/662—Multiplexed conversion systems
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0259—Details of the generation of driving signals with use of an analog or digital ramp generator in the column driver or in the pixel circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/066—Waveforms comprising a gently increasing or decreasing portion, e.g. ramp
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0209—Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/82—Digital/analogue converters with intermediate conversion to time interval
    • H03M1/822—Digital/analogue converters with intermediate conversion to time interval using pulse width modulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Analogue/Digital Conversion (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

In a multiple-output digital to analog converter, digital input data (Dd) is converted into a plurality of analog output voltages (Voi) across associated loads (Li). A timing generator (TG) generates time periods (Til) in dependence on the digital input data (Dd). A buffer (B1) has an output (O1) to supply a waveform (Wf1) to the loads (Li) via a coupling circuit (Sli). The coupling circuit (Sli) couples a certain load (Li) to the buffer output (B1) during an associated time period (Til). The output voltage (Voi) across the certain load (Li) is related to a value of the waveform (Wfl) at the end of the associated time period (Til) when the coupling circuit decouples the load (Li) from the buffer output (O1). The multiple-output digital to analog converter further comprises a plurality of dummy loads (Ldi), each one of the dummy loads (Ldi) is associated to a corresponding one of the loads (Li). The dummy loads (Ldi) are coupled to the buffer output (O1) when the corresponding load (Ldi) is decoupled from the buffer output (O1). A pre-setting circuit (B2, S2i) generates the voltages (Vdi) across the dummy loads (Ldi) so as to be substantially equal to the output voltages (Voi) across the associated loads (Li) occurring when the coupling circuit (Sli) decouples the load (Li) from the output buffer (B1).
PCT/IB1999/000576 1998-04-15 1999-04-01 A multi-output digital to analog converter WO1999053619A2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP55140399A JP3854314B2 (en) 1998-04-15 1999-04-01 Multi-output digital-analog converter
DE69930812T DE69930812T2 (en) 1998-04-15 1999-04-01 DIGTAL ANALOG CONVERTER WITH MULTIPLE OUTPUT
KR10-1999-7011794A KR100535693B1 (en) 1998-04-15 1999-04-01 A multi-output digital to analog converter
EP99909147A EP0998790B1 (en) 1998-04-15 1999-04-01 A multi-output digital to analog converter

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP98201197 1998-04-15
EP98201197.5 1998-04-15

Publications (2)

Publication Number Publication Date
WO1999053619A2 WO1999053619A2 (en) 1999-10-21
WO1999053619A3 true WO1999053619A3 (en) 2000-01-06

Family

ID=8233596

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB1999/000576 WO1999053619A2 (en) 1998-04-15 1999-04-01 A multi-output digital to analog converter

Country Status (6)

Country Link
US (1) US6252567B1 (en)
EP (1) EP0998790B1 (en)
JP (1) JP3854314B2 (en)
KR (1) KR100535693B1 (en)
DE (1) DE69930812T2 (en)
WO (1) WO1999053619A2 (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6909427B2 (en) * 2002-06-10 2005-06-21 Koninklijke Philips Electronics N.V. Load adaptive column driver
EP1928093B1 (en) * 2002-08-26 2015-10-21 Mitsubishi Denki K.K. Waveform generation method, waveform generation program, waveform generation circuit and radar apparatus
US7123829B2 (en) * 2003-08-29 2006-10-17 Ricoh Company, Ltd. Digital camera and power supply apparatus used therefor
JP4762538B2 (en) * 2004-12-27 2011-08-31 京セラ株式会社 Mobile device
WO2007021863A1 (en) * 2005-08-12 2007-02-22 The Board Of Regents, The University Of Texas System Current-steering type digital-to-analog converter
KR100769448B1 (en) 2006-01-20 2007-10-22 삼성에스디아이 주식회사 Digital-to-analog converter and data drive circuit and flat panel display device using the same
KR100776488B1 (en) 2006-02-09 2007-11-16 삼성에스디아이 주식회사 Data drive circuit and flat panel display device having the same
KR100805587B1 (en) 2006-02-09 2008-02-20 삼성에스디아이 주식회사 Digital-to-analog converter and data drive circuit and flat panel display device using the same
JP4878249B2 (en) * 2006-09-08 2012-02-15 ルネサスエレクトロニクス株式会社 Decoder circuit, display device drive circuit and display device using the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4766430A (en) * 1986-12-19 1988-08-23 General Electric Company Display device drive circuit
EP0598308A1 (en) * 1992-11-16 1994-05-25 RCA Thomson Licensing Corporation Differential comparator circuit
US5600345A (en) * 1995-03-06 1997-02-04 Thomson Consumer Electronics, S.A. Amplifier with pixel voltage compensation for a display

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5400028A (en) * 1992-10-30 1995-03-21 International Business Machines Corporation Charge summing digital to analog converter
EP0731440B1 (en) * 1995-03-06 2002-08-28 THOMSON multimedia Data line drivers with common reference ramp for a display device
US5684487A (en) * 1995-06-05 1997-11-04 Analog Devices, Incorporated A/D converter with charge-redistribution DAC and split summation of main and correcting DAC outputs
US5889485A (en) * 1997-09-02 1999-03-30 International Business Machines Corporation Charge-summing digital-to-analog converter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4766430A (en) * 1986-12-19 1988-08-23 General Electric Company Display device drive circuit
EP0598308A1 (en) * 1992-11-16 1994-05-25 RCA Thomson Licensing Corporation Differential comparator circuit
US5600345A (en) * 1995-03-06 1997-02-04 Thomson Consumer Electronics, S.A. Amplifier with pixel voltage compensation for a display

Also Published As

Publication number Publication date
EP0998790A2 (en) 2000-05-10
KR20010013777A (en) 2001-02-26
JP2002505828A (en) 2002-02-19
JP3854314B2 (en) 2006-12-06
DE69930812D1 (en) 2006-05-24
KR100535693B1 (en) 2005-12-12
DE69930812T2 (en) 2006-11-16
WO1999053619A2 (en) 1999-10-21
EP0998790B1 (en) 2006-04-12
US6252567B1 (en) 2001-06-26

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