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WO1998023034A3 - Apparatus and method for stabilising the frequency of a phase locked loop - Google Patents

Apparatus and method for stabilising the frequency of a phase locked loop Download PDF

Info

Publication number
WO1998023034A3
WO1998023034A3 PCT/FI1997/000691 FI9700691W WO9823034A3 WO 1998023034 A3 WO1998023034 A3 WO 1998023034A3 FI 9700691 W FI9700691 W FI 9700691W WO 9823034 A3 WO9823034 A3 WO 9823034A3
Authority
WO
WIPO (PCT)
Prior art keywords
oscillator
vref
frequency
reference voltage
tuning
Prior art date
Application number
PCT/FI1997/000691
Other languages
French (fr)
Other versions
WO1998023034A2 (en
Inventor
Mark Sherlock
Original Assignee
Mark Sherlock
Nokia Telecommunications Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mark Sherlock, Nokia Telecommunications Oy filed Critical Mark Sherlock
Priority to AU50528/98A priority Critical patent/AU5052898A/en
Publication of WO1998023034A2 publication Critical patent/WO1998023034A2/en
Publication of WO1998023034A3 publication Critical patent/WO1998023034A3/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail
    • H03L7/146—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail by using digital means for generating the oscillator control signal

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

Traditional radio transceivers, such as those used in the base stations of cellular mobile systems require delicate manual tuning. Regardless of the accuracy of the initial tuning, an uncompensated oscillator provides little compensation for temperature drift and component ageing. The invention provides a way of stabilising the frequency of a phase locked loop, provided that a stable reference voltage (VREF) is available. During recalibration, control unit (7) applies, via switch (SW1), reference voltage (VREF) to the input of a voltage controled oscillator (6). An adjustable control element (5) of the oscillator is adjusted until the frequency of the oscillator (6) is within a predetermined deviation from its nominal value. Correct tuning can be detected either by detecting a period without any up (U) or down (D) pulses originating from phase detector (2), or by detecting that the output voltage of integrator (4) equals the reference voltage (VREF).
PCT/FI1997/000691 1996-11-15 1997-11-13 Apparatus and method for stabilising the frequency of a phase locked loop WO1998023034A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU50528/98A AU5052898A (en) 1996-11-15 1997-11-13 Apparatus and method for stabilising the frequency of a phase locked loop

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB9623872.0 1996-11-15
GB9623872A GB2319409B (en) 1996-11-15 1996-11-15 Apparatus and method for stabilising the frequency of a phase locked loop

Publications (2)

Publication Number Publication Date
WO1998023034A2 WO1998023034A2 (en) 1998-05-28
WO1998023034A3 true WO1998023034A3 (en) 1998-07-30

Family

ID=10803058

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/FI1997/000691 WO1998023034A2 (en) 1996-11-15 1997-11-13 Apparatus and method for stabilising the frequency of a phase locked loop

Country Status (3)

Country Link
AU (1) AU5052898A (en)
GB (1) GB2319409B (en)
WO (1) WO1998023034A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2613589C (en) * 2006-12-04 2015-11-03 Its Electronics Inc. Floating dc-offset circuit for phase detector

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4929917A (en) * 1988-07-15 1990-05-29 Pioneer Electronic Corporation Phase-locked loop circuit
EP0416840A2 (en) * 1989-09-08 1991-03-13 Delco Electronics Corporation Phase locked loop circuit with digital control
US5382922A (en) * 1993-12-23 1995-01-17 International Business Machines Corporation Calibration systems and methods for setting PLL gain characteristics and center frequency
EP0704976A1 (en) * 1994-09-23 1996-04-03 Symbios Logic Inc. Phase-locked loop control circuit and method

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4527127A (en) * 1982-06-30 1985-07-02 Motorola Inc. Frequency acquisition circuit for phase locked loop
US5223772A (en) * 1992-02-28 1993-06-29 Sgs-Thomson Microelectronics, Inc. Method and apparatus for providing the lock of a phase-locked loop system from frequency sweep
FI93286C (en) * 1993-03-08 1995-03-10 Nokia Telecommunications Oy Method of forming a clock signal with a phase-locked loop and phase-locked loop

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4929917A (en) * 1988-07-15 1990-05-29 Pioneer Electronic Corporation Phase-locked loop circuit
EP0416840A2 (en) * 1989-09-08 1991-03-13 Delco Electronics Corporation Phase locked loop circuit with digital control
US5382922A (en) * 1993-12-23 1995-01-17 International Business Machines Corporation Calibration systems and methods for setting PLL gain characteristics and center frequency
EP0704976A1 (en) * 1994-09-23 1996-04-03 Symbios Logic Inc. Phase-locked loop control circuit and method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN, Vol. 7, No. 194, (E-195); & JP,A,58 094 238 (NIPPON VICTOR K.K.) 4 June 1983. *

Also Published As

Publication number Publication date
GB2319409A (en) 1998-05-20
WO1998023034A2 (en) 1998-05-28
GB9623872D0 (en) 1997-01-08
AU5052898A (en) 1998-06-10
GB2319409B (en) 1999-01-27

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