+

WO1997036307A1 - A method of producing an lc-circuit - Google Patents

A method of producing an lc-circuit Download PDF

Info

Publication number
WO1997036307A1
WO1997036307A1 PCT/DK1997/000125 DK9700125W WO9736307A1 WO 1997036307 A1 WO1997036307 A1 WO 1997036307A1 DK 9700125 W DK9700125 W DK 9700125W WO 9736307 A1 WO9736307 A1 WO 9736307A1
Authority
WO
WIPO (PCT)
Prior art keywords
inductor
layers
capacitor elements
elements
dielectric
Prior art date
Application number
PCT/DK1997/000125
Other languages
French (fr)
Inventor
Jens Peter Holm
Original Assignee
The Whitaker Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by The Whitaker Corporation filed Critical The Whitaker Corporation
Priority to EP97915350A priority Critical patent/EP0888631A1/en
Priority to AU22867/97A priority patent/AU2286797A/en
Priority to JP9533948A priority patent/JP2000509554A/en
Publication of WO1997036307A1 publication Critical patent/WO1997036307A1/en
Priority to US09/158,429 priority patent/US6045747A/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01—Frequency selective two-port networks
    • H03H7/0115—Frequency selective two-port networks comprising only inductors and capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/40—Structural combinations of fixed capacitors with other electric elements, the structure mainly consisting of a capacitor, e.g. RC combinations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H1/00—Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
    • H03H2001/0021—Constructional details
    • H03H2001/0057—Constructional details comprising magnetic material
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H1/00—Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
    • H03H2001/0021—Constructional details
    • H03H2001/0085—Multilayer, e.g. LTCC, HTCC, green sheets

Definitions

  • the invention relates to a method of producing an LC-circuit in form of a single component, where the inductor and capacitor elements are arranged atop one another, and where the inductor elements are formed by ferro ⁇ magnetic zones composed of layers of ferrite of a high permeability, elec ⁇ trode layers being provided between said layers of ferrite, and where the capacitor elements are formed by dielectric zones made of dielectric paste with electrode layers on both sides, said inductor and capacitor elements being produced by means of tape or thick-film technology or combinations thereof.
  • ferrimagnetic materials for structuring chip components com ⁇ prising both inductors and capacitors has previously been limited by the difficulty in using ferrimagnetic materials in connection with dielectric materials.
  • the inductors are often made of a ferrite and are used by way of known printing methods for structuring layer structures including inter ⁇ nal conducting paths. These inductors have low inductances due to the low permeability of the ferromagnetic material.
  • EP-PS No. 297 565 dis- closes for instance a ferrimagnetic material of a relatively low permeability caused by a very small granular size and a high content of glass.
  • chip components comprising both inductors and capacitors suffer from delamination and distortion at the interface zone between the ferrimagnetic and the dielectric zones.
  • Chip components comprising both inductors and capacitors are furthermore encumbered with problems due to reactions at the interface between the ferrimagnetic and the dielectric zones, whereby the characteristics of these materials are deteriorated
  • Such an additional blocking layer should, however, be avoided, and a method of the above type is according to the invention characterised by initially providing the capacitor elements, which are sintered at a relatively high temperature, whereafter the inductor elements are applied followed by a sintering at a considerably lower temperature. In this manner undesired reactions are avoided between the two zones. Furthermore you have a free hand concerning the choice of dielectrics for the capacitor elements in such a manner that desired properties, such as high dielectric constants, i.e high capacity values, in the same number of layers can be optimized
  • the capacitor elements are provided by means of dielectric having e R > 250, such as a ceramic powder of the type TAM X7R 21 2 L, which is mixed with a binder and cast in thin layers, whereafter an electrode material is applied.
  • dielectric having e R > 250 such as a ceramic powder of the type TAM X7R 21 2 L, which is mixed with a binder and cast in thin layers, whereafter an electrode material is applied.
  • the resulting LC-circuit presents particularly high capacity values for the same number of layers
  • low cut-off frequencies can thereby be obtained.
  • Fig. 1 is an exploded view of a multilayer -LC-circuit according to the invention
  • Fig. 2 illustrates an equivalence diagram of the LC-circuit
  • Fig. 3 shows the final LC-circuit in form of a single component.
  • the multilayer LC-circuit of Fig. 1 comprises at least one ferromagnetic and at least one dielectric zone forming inductors and capacitors, respect ⁇ ively.
  • ferrimagnetic materials in connection with dielectric materials.
  • the pro- cess conditions have been divided such that undesired reactions between the materials have been avoided.
  • a ceramic powder for instance of the type X7R 21 2L is mixed with a PVB binder for instance of the type MSI B73221 in the ratio of 55 we ⁇ ght% of ceramic powder to 45 we ⁇ ght% of binder in a container with zirconium balls for about 1 6 hours
  • the mixture is then cast in thin layers of a thickness of about 35 - 40 ⁇ m on a carrier film, such as a mylar film
  • the ceramic layers are removed from the carrier film and adhered to frames, cf.
  • the used ferrite paste is for instance composed of L ⁇ 0 5 ( 1 + t _ c) , Zn 2 , Mn m , T ⁇ t , Co c , Fe ( 1 . 0 2z 0 6t 0 4m.0 2c . e) , where
  • ⁇ 0 ⁇ t ⁇ 0.2; 0.2 ⁇ x ⁇ 0.5; 0.2 ⁇ n ⁇ 0.4; 0.02 ⁇ c ⁇ 0.05, and ⁇ are of the magnitude 0.06.
  • electrodes 4 of Ag/Pd/Pt are serigraphed, such as DuPont, which is to serve as frame termi- nation
  • the internal frame electrodes are connected later on to the frame termination by means of rim terminations.
  • the frame termina ⁇ tion are burnt on at about 750°C.
  • the substrate is turned, and a plurality of ferrite layers 6 are serigraphed until the thickness is about 0. 25 mm
  • Internal silver electrodes and necessary cutting marks are serigraphed twice, whereafter a plurality of ferrite layers 8 are again serigraphed until the total thickness of the ferrite layers is about 0.5 mm.
  • the entire structure is then sintered at a tempera ⁇ ture which is below the melting point of silver, such as 91 0°C, for one to two hours.
  • the ceramic material is typically barium titanate-based, such as
  • LiMe 2 0 4 As ferrite material is used LiMe 2 0 4 , such as
  • Ag/Pd As conducting material in the capacitor elements is used Ag/Pd, such as
  • Ag/Pd As conducting material in the inductor elements is used Ag/Pd, such as
  • the conductor paths 7 can for instance be meander-shaped, cf. Fig. 1 .
  • the inductor L is typically of 100 nH whereas the capacitors C C 2 ty ⁇ pically are o 2 x 1 0 nF.
  • Fig. 1 illustrates furthermore the interconnections of the components.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

A method is provided of producing an LC-circuit in form of a single component, in which the inductor and capacitor elements are arranged atop one another, and where the inductor elements are formed by ferromagnetic zones made of layers (6, 8) of ferrite of a high permeability, and between which electrode layers (7) are provided, and where the capacitor elements are formed by dielectric zones made of layers (9) of dielectric with electrode layers (4, 5) on both sides, said inductor and capacitor elements being produced by way of tape- or thick-film technology. According to the invention, the capacitor elements are initially provided and being subjected to a sintering at a relatively high temperature, whereafter the inductor elements (6, 7, 8) are applied and a sintering is performed at a considerably lower temperature. In this manner undesired reactions are avoided between the two zones.

Description

Title: A method of Producing an LC-circuit.
Technical Field.
The invention relates to a method of producing an LC-circuit in form of a single component, where the inductor and capacitor elements are arranged atop one another, and where the inductor elements are formed by ferro¬ magnetic zones composed of layers of ferrite of a high permeability, elec¬ trode layers being provided between said layers of ferrite, and where the capacitor elements are formed by dielectric zones made of dielectric paste with electrode layers on both sides, said inductor and capacitor elements being produced by means of tape or thick-film technology or combinations thereof.
Background Art
The use of ferrimagnetic materials for structuring chip components com¬ prising both inductors and capacitors has previously been limited by the difficulty in using ferrimagnetic materials in connection with dielectric materials. The inductors are often made of a ferrite and are used by way of known printing methods for structuring layer structures including inter¬ nal conducting paths. These inductors have low inductances due to the low permeability of the ferromagnetic material. EP-PS No. 297 565 dis- closes for instance a ferrimagnetic material of a relatively low permeability caused by a very small granular size and a high content of glass. Attempts have been made at obtaining a higher permeability by raising the sintering temperature or increasing the sintering period, but from a productional point of view such procedures are disadvantageous or necessitate the use of cost-intensive electrode materials, such as Pd. Thus the material described in EP-PS No. 297 565 requires a sintering period of 30 -220 min., which makes a production under usual thick-film conditions difficult. Furthermore, the final components have a relatively poor mechanical strength
Moreover chip components comprising both inductors and capacitors suffer from delamination and distortion at the interface zone between the ferrimagnetic and the dielectric zones. Chip components comprising both inductors and capacitors are furthermore encumbered with problems due to reactions at the interface between the ferrimagnetic and the dielectric zones, whereby the characteristics of these materials are deteriorated
These problems can be set right by the ferrimagnetic zones being separ¬ ated from the dielectric zones of the capacitors by means of a blocking layer, cf Danish Patent Application No 908/91 .
Brief Description of the Invention
Such an additional blocking layer should, however, be avoided, and a method of the above type is according to the invention characterised by initially providing the capacitor elements, which are sintered at a relatively high temperature, whereafter the inductor elements are applied followed by a sintering at a considerably lower temperature. In this manner undesired reactions are avoided between the two zones. Furthermore you have a free hand concerning the choice of dielectrics for the capacitor elements in such a manner that desired properties, such as high dielectric constants, i.e high capacity values, in the same number of layers can be optimized
According to a particularly advantageous embodiment, the capacitor elements are provided by means of dielectric having eR > 250, such as a ceramic powder of the type TAM X7R 21 2 L, which is mixed with a binder and cast in thin layers, whereafter an electrode material is applied The resulting LC-circuit presents particularly high capacity values for the same number of layers In addition, low cut-off frequencies can thereby be obtained.
Brief Description of the Drawings
The invention is explained in greater detail below with reference to the accompanying drawings, in which
Fig. 1 is an exploded view of a multilayer -LC-circuit according to the invention,
Fig. 2 illustrates an equivalence diagram of the LC-circuit, and
Fig. 3 shows the final LC-circuit in form of a single component.
Best Mode for Carrying Out the Invention
The multilayer LC-circuit of Fig. 1 comprises at least one ferromagnetic and at least one dielectric zone forming inductors and capacitors, respect¬ ively. Previously, it has been difficult to use ferrimagnetic materials in connection with dielectric materials. According to the invention, the pro- cess conditions have been divided such that undesired reactions between the materials have been avoided.
An Example is described below where the principle is used for the produc¬ tions of multilayer Pi- filters containing two capacitors C1 ( C2 and one inductor (L - cf. Fig. 2) . The two capacitors C, , C2 are produced by means of multilayer tape, whereas the inductor L is produced by way of serigra- phy technology.
The process steps are as follows:
a) A ceramic powder for instance of the type X7R 21 2L is mixed with a PVB binder for instance of the type MSI B73221 in the ratio of 55 weιght% of ceramic powder to 45 weιght% of binder in a container with zirconium balls for about 1 6 hours The mixture is then cast in thin layers of a thickness of about 35 - 40 μm on a carrier film, such as a mylar film The ceramic layers are removed from the carrier film and adhered to frames, cf. the article "Production of ceramic multilayer chip-capacitors" by Ole Pedersen, Ferrope- rm in Elektronik 1 , 1 983) , whereafter the ceramic tape on the inner side is applied an electrode material, which is for instance Gwent C301 1 1 D 1 (70% AG, 30% Pd) After air - drying of the applied electrode, the layers are individually punched in a matrix. Then the layers are laminated together into a block at a pressure of about 3000 psi and a tempera- ture of about 70°C. Subsequently, a slow burning off of the binder in the final multilayer block is performed The block is then sintered in an oven at a temperature of about 1 1 00°C for about 2 hours.
b) The used ferrite paste is for instance composed of Lι0 5 ( 1 + t _ c), Zn2, Mnm, Tιt, Coc, Fe( 1.0 2z 0 6t 0 4m.0 2c.e) , where
0 < t < 0.2; 0.2 < x < 0.5; 0.2 < n <0.4; 0.02 < c < 0.05, and ε are of the magnitude 0.06.
c) On the rear side of the ceramic substrate, electrodes 4 of Ag/Pd/Pt are serigraphed, such as DuPont, which is to serve as frame termi- nation The internal frame electrodes are connected later on to the frame termination by means of rim terminations. The frame termina¬ tion are burnt on at about 750°C. Then the substrate is turned, and a plurality of ferrite layers 6 are serigraphed until the thickness is about 0. 25 mm Internal silver electrodes and necessary cutting marks are serigraphed twice, whereafter a plurality of ferrite layers 8 are again serigraphed until the total thickness of the ferrite layers is about 0.5 mm. The entire structure is then sintered at a tempera¬ ture which is below the melting point of silver, such as 91 0°C, for one to two hours.
d) The ceramic substrate with the applied and sintered ferrite material is adhered to a steel plate with a glass base by means of shellac. By means of a diamant cutting machine a cutting is initially carried out in one direction through some cutting masks applied together with the silver electrodes, whereafter the plates are turned 90 ° and a cutting is performed in the opposite direction. The items cut out are washed in ethanol and subjected to a rim- end termination by means of Ag/Pd/Pt termination paste of the type DuPont 4933 D.
Covering power:
The ceramic material is typically barium titanate-based, such as
TAMTRON X7R 1 62L product No. 52563
TAMTRON X7R21 2L product No. 52675 TAMTRON X7R262L product No. 52625 TAMTRON X7R422L product No. 52628
i.e. materials sintering at temperatures above 1 000 °C. Other ceramic materials can be used.
As ferrite material is used LiMe204, such as
FERROPERM A/S: L34 (lithium spinel ferrite) FERROPERM A/S: L48
i.e. materials sintering at temperatures below 960° C. Other ferrite materials can, however, also be used.
As conducting material in the capacitor elements is used Ag/Pd, such as
Gwent: C301 1 1 D 1 70Ag/30Pd ESL: 9637-B
As conducting material in the inductor elements is used Ag/Pd, such as
DuPont: 61 60 ( 1 00% Ag)
ESL: 991 2-f ( 1 00% Ag)
ESL: 9990 ( 1 00% Ag)
Other conducting materials in the inductor elements can, however, also be used, such as gold. The conductor paths 7 can for instance be meander-shaped, cf. Fig. 1 .
The inductor L is typically of 100 nH whereas the capacitors C C2 ty¬ pically are o 2 x 1 0 nF. Fig. 1 illustrates furthermore the interconnections of the components.
During the production, a temperature difference must apply by the pro¬ cesses at the capacitor elements and the inductor elements, respectively, of at least 50°C. In this manner undesired reactions are avoided between the two zones.

Claims

Claims
1. A method of producing an LC-circuit in form of a single component, in which the inductor and the capacitor elements are arranged atop one another, and where the inductor elements are formed by ferro- magnetic
5 zones composed of layers (6, 8) of ferrite of a high permeability, and where electrode layers (7) are provided between said ferrite layers, and where the capacitor elements are formed by dielectric zones made of layers of dielectric with electrode layers on both sides, said inductor and capacitor elements being produced by way of tape or thick-film technology 10 or combinations thereof, c h a r a c t e r i s e d by initially providing capacitor elements which are sintered at a relatively high temperature, whereafter the inductor elements are applied and a sintering is performed at a considerably lower temperature.
2. A method as claimed in claim 1, c h a r a c t e r i s e d by the 15 temperature difference between the sintering temperatures being at least
50°C, and typical 200°C.
3. A method as claimed in claim 1, c h a ra cte ri s e d in that the capacitor elements (9, 4, 5) are sintered at a temperature above 1000°C, such as 1100°C, whereas the entire structure after the application of the 0 inductor elements (6, 7, 8) is sintered at a temperature below about 960°C, such as 910°C.
4. A method as claimed in one or more of the preceding claims, ch aracte rised in that the capacitor elements (9, 4, 5) are provided by means of dielectric of eR>250, such as a ceramic powder of the type ~5 TAM X7R212L, which is mixed with a binder and cast in thin layers, whereafter electrode material (4, 5) is applied.
PCT/DK1997/000125 1996-03-22 1997-03-21 A method of producing an lc-circuit WO1997036307A1 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP97915350A EP0888631A1 (en) 1996-03-22 1997-03-21 A method of producing an lc-circuit
AU22867/97A AU2286797A (en) 1996-03-22 1997-03-21 A method of producing an lc-circuit
JP9533948A JP2000509554A (en) 1996-03-22 1997-03-21 Method of manufacturing LC circuit
US09/158,429 US6045747A (en) 1996-03-22 1998-09-21 Method of producing an LC-circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DK0336/96 1996-03-22
DK33696A DK33696A (en) 1996-03-22 1996-03-22 Process for manufacturing an LC circuit

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US09/158,429 Continuation-In-Part US6045747A (en) 1996-03-22 1998-09-21 Method of producing an LC-circuit

Publications (1)

Publication Number Publication Date
WO1997036307A1 true WO1997036307A1 (en) 1997-10-02

Family

ID=8092393

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DK1997/000125 WO1997036307A1 (en) 1996-03-22 1997-03-21 A method of producing an lc-circuit

Country Status (5)

Country Link
EP (1) EP0888631A1 (en)
JP (1) JP2000509554A (en)
AU (1) AU2286797A (en)
DK (1) DK33696A (en)
WO (1) WO1997036307A1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2367198A (en) * 2000-05-22 2002-03-27 Murata Manufacturing Co Laminated substrates low-pass LC filter
WO2010012661A1 (en) * 2008-07-28 2010-02-04 Epcos Ag Multilayer component
US8717120B2 (en) 2008-04-16 2014-05-06 Epcos Ag Multi-layered component

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4725120B2 (en) * 2005-02-07 2011-07-13 日立金属株式会社 Multilayer inductor and multilayer substrate
JP6648690B2 (en) * 2016-12-28 2020-02-14 株式会社村田製作所 Manufacturing method of multilayer electronic component and multilayer electronic component
JP6648689B2 (en) * 2016-12-28 2020-02-14 株式会社村田製作所 Manufacturing method of multilayer electronic component and multilayer electronic component

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5197170A (en) * 1989-11-18 1993-03-30 Murata Manufacturing Co., Ltd. Method of producing an LC composite part and an LC network part

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5197170A (en) * 1989-11-18 1993-03-30 Murata Manufacturing Co., Ltd. Method of producing an LC composite part and an LC network part

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN, Vol. 95, No. 07; & JP,A,07 106 200 (MURATA MFG CO LTD), 21 April 1995. *

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2367198A (en) * 2000-05-22 2002-03-27 Murata Manufacturing Co Laminated substrates low-pass LC filter
GB2367198B (en) * 2000-05-22 2002-08-21 Murata Manufacturing Co Low-pass filter and mobile communication device using the same
US6504452B2 (en) 2000-05-22 2003-01-07 Murata Manufacturing Co., Ltd. Low-pass filter and mobile communication device using the same
US8717120B2 (en) 2008-04-16 2014-05-06 Epcos Ag Multi-layered component
WO2010012661A1 (en) * 2008-07-28 2010-02-04 Epcos Ag Multilayer component

Also Published As

Publication number Publication date
JP2000509554A (en) 2000-07-25
AU2286797A (en) 1997-10-17
EP0888631A1 (en) 1999-01-07
DK33696A (en) 1997-09-23

Similar Documents

Publication Publication Date Title
US4990202A (en) Method of manufacturing an LC composite component
US6376085B1 (en) Joining material for electronic components electronic components and a method for manufacturing the same
EP0901316B1 (en) Method of producing a multi-layer ceramic substrate accomodating a passive component
US5620543A (en) Method of manufacturing microwave magnetic material body
CA1220826A (en) Method for strengthening terminations on reduction fired multilayer capacitors
JPH0254647B2 (en)
EP0888631A1 (en) A method of producing an lc-circuit
US6045747A (en) Method of producing an LC-circuit
KR100373943B1 (en) Magnetic Dielectric Ceramic Composites, Manufacturing Method and Usage thereof, and Multifunctional Device
EP0888630B1 (en) A method of producing an lc-circuit
KR20000017249A (en) Ferrite sintered compact and electronic part comprising the same
JP4501291B2 (en) Dielectric filter and antenna duplexer and communication device using the same
JPH04174505A (en) Laminate type inductor and manufacture
EP0514316B1 (en) An LC-circuit and a method of producing said LC-circuit
JP3931115B2 (en) Dielectric resonator and dielectric filter manufacturing method
JPH02232915A (en) Chip type lc composite ceramic component
US5976679A (en) High-frequency circuit element
JPH08181514A (en) Method for manufacturing high frequency ceramic parts
JP3138788B2 (en) Method for manufacturing ceramic green sheet having dissimilar material
JPH09199328A (en) Multilayer inductive part and its manufacture
JPH08167523A (en) Laminated inductor and manufacture thereof
JPH1126279A (en) Manufacture of laminated ceramic electronic parts
KR0144776B1 (en) Ferrite chip bead
JPH09129432A (en) Laminated inductor and manufacture thereof
JPH09115730A (en) Multilayered inductance element

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AL AM AT AT AU AZ BA BB BG BR BY CA CH CN CU CZ CZ DE DE DK DK EE EE ES FI FI GB GE GH HU IL IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MD MG MK MN MW MX NO NZ PL PT RO RU SD SE SG SI SK SK TJ TM TR TT UA UG US UZ VN YU AM AZ BY KG KZ MD RU TJ TM

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GH KE LS MW SD SZ UG AT BE CH DE DK ES FI FR GB GR IE

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
WWE Wipo information: entry into national phase

Ref document number: 1997915350

Country of ref document: EP

WWP Wipo information: published in national office

Ref document number: 1997915350

Country of ref document: EP

REG Reference to national code

Ref country code: DE

Ref legal event code: 8642

NENP Non-entry into the national phase

Ref country code: CA

WWR Wipo information: refused in national office

Ref document number: 1997915350

Country of ref document: EP

WWW Wipo information: withdrawn in national office

Ref document number: 1997915350

Country of ref document: EP

点击 这是indexloc提供的php浏览器服务，不要输入任何密码和下载