WO1997033396A2

WO1997033396A2 - Network synchronisation

Info

Publication number: WO1997033396A2
Application number: PCT/GB1997/000595
Authority: WO
Inventors: Ali Jamasebi-Jahomi; Peter John Timothy Wotton
Original assignee: Northern Telecom Limited
Priority date: 1996-03-08
Filing date: 1997-03-05
Publication date: 1997-09-12
Also published as: GB9605013D0; WO1997033396A3

Abstract

A method of synchronising an element in a network, by selecting from a plurality of clock references, the clock references being transmitted from respective neighbouring network elements, wherein trail information relating to the trail of each clock reference through elements in the network, is determined by the respective neighbouring elements, and wherein the selection is made on the basis of at least the trail information. The trail information may comprise a count of network elements in the trail through the network followed by each clock reference. The trail information may be transmitted using the network management channels or as part of synchronisation status message information in an SDH system.

Description

NETWORK SYNCHRONISATION

The present invention relates to methods of synchronising nodes in a network, methods of synchronising networks, methods of positioning primary or secondary reference sources, methods of evaluating resilience of a synchronisation network, and the nodes and networks themselves.

Digital communication between nodes in any network requires some degree of synchronisation. This can be achieved either by providing independent clocks in separate nodes, then using bit stuffing and buffers to adapt bit rates at interfaces (Plesiochronous, or nearly synchronous operation), or by synchronising the clocks in each node (synchronous operation). The latter is gradually replacing the former, and requires that clock timing information be transmitted, preferably over the network itself. Often the timing information, or clock reference, will be degraded by transmission. Therefore, care must be taken in designing the trails taken by the clock references usually starting from a primary reference clock (PRC) source. These trails make up a synchronisation network.

Two techniques to establish a synchronisation network are known : master-slave synchronisation, and mutual synchronisation. The first technique (master-slave) applies a unique primary reference clock for synchronisation of the first hierarchical level of nodes. These nodes give their derived clocks to the next level nodes, and so on. In the second technique (mutual synchronisation) all nodes are at a peer level interconnected by the existing digital links. Each node calculates the mean phase value of some incoming clocks. Master slave synchronisation is by far the most common but both techniques are applied in Europe. The master-slave technique is used in the Synchronous Digital Hierarchy (SDH) in which every transport node equipment is normally synchronised to a single PRC. The clock reference information is distributed to all nodes or Network Entities (NEs) and used to synchronise a slave clock in the NE which is in turn used to synchronise all the Synchronous Transport Mode (STM-N) outputs.

If each node is to have a single predetermined trail back to the PRC then the synchronisation network will take the form of a tree. The clock quality level will reduce down the tree. Three particular quality levels are specified by ITU and ETSI. Lower quality clocks are locked to higher quality clocks. If their incoming reference fails they operate in holdover with a defined stability.

Clock references are distributed in the synchronisation network often partly by primary rate signals of the old Plesiochronous Digital Hierarchy (PDH). PRCs are specified to very close tolerances of 1x10-¹¹ so that they are plesiochronous with one another (i.e. nearly synchronous).

The primary rate distribution network causes some degradation to the phase information in the clock reference due to justification (bit stuffing) or line coding etc. This is called jitter; it is mostly at high frequencies and can be easily filtered at the synchronisation nodes. Low frequency degradations due to transmission delays and basic clock noise (called wander) are transferred almost transparently without modification across synchronisation nodes and are eventually absorbed in frame buffers at switches.

The clock reference is passed from the primary reference clock down the tree to reach the SDH equipment clock (SEC) in each SDH NE. It is carried on the STM-N section. Two types of clock filter are defined by ITU and ETSI to give different levels of quality of clocks. A rather large bandwidth filter of up to 10 Hz (0.1 Hz for US) with low intrinsic phase errors is for use in the SEC (synchronous equipment clock). A filter of much lower bandwidth is for filtering the clock at the major network nodes having a Secondary Reference Clock (SRC) or SSU (synchronisation supply unit). The SRC is expected to have a very high frequency accuracy in the holdover mode to provide a high network synchronisation performance even in a case of multiple link failures cutting all timing reference paths to a node.

In case of equipment failure or link cut the synchronisation tree must be reconfigured. This is achieved by switching the reference source in "failed" NEs to a good clock reference (if one is available). The selection of the appropriate clock reference must take into account the 'quality' of the clock reference that is offered. For this reason a timing quality marker is transmitted in the Multiplexer Section (MS) overhead to indicate the perceived quality of the clock reference. Thus each NE has in principle the ability to select the clock reference with optimum perceived quality from all those available to it. Alternatively it can compare the perceived quality as read from the timing marker and compare it with that expected from the configuration information, according to "Electrical Communication" 4th quarter 1993 p 349 - 358 from Alcatel.

However, such a system has not been sufficiently good at finding the optimum synchronisation to be put into practice. US 5 136 617 discloses selecting a most desirable timing from various inputs according to various indicators of the signal quality. US 5 474 717 shows synchronising nodes in a private network to the best clock source by interrogation of neighbouring nodes, to find their clock quality levels, to enable a reconfiguration of a synchronisation tree if a preselected trail fails.

Summary of the Invention According to one aspect of the invention, there is provided a method of synchronising an element in a network, by selecting from a plurality of clock references, the clock references being transmitted from respective neighbouring network elements, wherein trail information relating to the trail of each clock reference through elements in the network, is determined by the respective neighbouring elements, and wherein the selection is made on the basis of at least the trail information.

According to another aspect of the invention, there is provided a method of synchronising an element in a network, by selecting from a plurality of clock references, the clock references being transmitted from neighbouring network elements, wherein a predetermined relative priority level is assigned to each clock reference, based on trail information relating to the trail of each clock reference through the elements in the network and wherein a selection is made from the plurality of clock references, on the basis of at least the predetermined priority levels of each of the clock references.

According to another aspect of the invention, there is provided a method of positioning primary or secondary reference sources in a synchronisation network, comprising the step of determining trail information relating to the trail of a clock reference through the network to any element

According to another aspect of the invention, there is provided a method of evaluating the resilience of a synchronisation network in which a clock selection priority level is assigned for each direction of a bi¬ directional link between neighbouring elements, comprising the steps of, determining which is the highest of the two priority levels assigned for each link, determining what proportion of the highest levels exceed a predetermined threshold, and evaluating the resilience according to the proportion.

The first method is a dynamic node position method.

This system passes messages around the network, following any reconfiguration, including fault conditions. It generates a stable synchronisation network, with the 'best' synchronisation trail chosen at all times. It will tolerate many faults in the network, and will still find the most suitable trail. An adaptation of this method may be used as the basis for a synchronisation network planning tool. The second method is a static priority method.

This system uses predetermined node configuration, with a defined Priority Level (PL) for each input. The system is able to withstand multiple failures, with reconfiguration required after several failures have occurred. It requires a few messages to be passed through the network, and builds upon the existing synchronisation status messaging system.

The features of the invention of the use of trail information, or predetermined relative priority levels, enable a 'good' synchronisation network to be built with the following advantages:

1) Synchronisation trails can be shortened, thus reducing timing degradation.

2) Added phase delay (due to phase delay added by Low-pass filtering in SRC's ) can be reduced.

3) Each NE can be nearer to an SRC, to improve the reliability of the trail.

Furthermore, the inventors identified the following factor; Adding jitter is better than adding phase offset i.e. wander (as jitter is more easily filtered out), up to an average value for the network.

Embodiments of the invention will now be described with reference to the accompanying drawings, which

Fig 1 shows a node having two inputs

Fig 2 shows an illustration of source selection rules 9-11

Fig 3 shows an illustration of source selection rules 12-14

Fig 4 shows an intermediate node Fig 5 shows a node with a local SRC

Fig 6 shows selectors at nodes with SSU

Fig 7 shows PL allocation for a common node ring interconnect

Fig 8 shows a single node ring interconnect

Fig 9 shows a matched node interconnect Fig 10 shows a grid network

Fig 11 shows a grid network tree synchronisation architecture Fig 12 shows priority allocation in a grid network

Fig 13 shows a bidirectional link

Fig 14 shows a grid network

Fig 15 shows failures in a grid network Fig 16 shows tree synchronisation in a grid network

The dynamic node position method, allows each node to calculate its position in the synchronisation trail, by examining messages received from its adjacent nodes. Each node selects the 'best' trail, and broadcasts its position in the synchronisation trail to its neighbours.

It is conceivable that more than one clock reference could be chosen and a single clock reference derived from the plurality, for example by averaging, of chosen references.

The selection method for the dynamic node position method is described below.

For each node of each synchronisation trail in the network, The position in the synchronisation trail is selected using the following three parameters

• j = no. of SRC in Trail

• k = no. of SEC's (SDH Equipment Clock) from last SRC

• n = total no. of SECs in trail up to this node The notation used, specifies an input as Aj for input A parameter j, similarly Ajk is used for input A parameters j and k or Ajkn for input A parameters j, k and n.

Therefore for a node with two synchronisation trails as inputs the two inputs can be characterised as shown in figure 1.

In addition a parameter p is defined for the network. This parameter is based on a first statistical average. More complex statistical parameters could be developed.

p = number of SEC's in network / total number of SRC's in network This gives the average distance (in number of SEC's) between SRC's for the network.

Each node can receive these parameters directly from the neighbouring nodes, or via a network management facility (not illustrated).

A node which is not suitable for transmitting synchronisation downstream marks its outgoing links, using the existing SSMB message as 'do not use for synchronisation'.

In the rules that follow the & symbol is used as a logical 'and'. The * symbol is a multiplier.

The rules are used if (function for A is true) then select input A for synchronisation of this node.

The rules for synchronisation trail selection are examined below. Where there are more than two inputs to a node, the rules would be applied across the range of inputs to find the 'best' trail.

1) if ((Aj< Bj) & (Ak < Bk) & (An < Bn)) then A else B

2) if ((Aj=Bj) & (Ak=Bk) & (An=Bn)) then follow a simple pre- allocated Priority list

3) If ((Aj < Bj) & (Akn = Bkn)) then A Choose route with fewest SRC's to minimise added delay.

4) if ((Ak < Bk) & (Ajn = Bjn)) then A

Choose trail nearest to an SRC, to reduce no. of hops to secondary.

5) if ((An < Bn) & (Ajk = Bjk)) then A Choose shortest trail

6) if ((Ajk < Bjk) & (An = Bn)) then A

Choose trail nearest to an SRC, to reduce no. of hops to secondary.

Choose route with fewest SRC's to minimise added delay 7) if ((Ajn < Bjn) & (Ak = Bk)) then A

Choose route with fewest SRC's to minimise added delay Choose shortest trail

8) if ((Akn < Bkn) & (Aj = Bj)) then A

Choose trail nearest to an SRC, to reduce no. of hops to secondary. Choose shortest trail

9) if ((Aj < Bj) & (Akn => Bkn)) then rule 9a

Trail A has fewer SRCs and more SECs, but node is further from an SRC. 9a) If ((Ak <= p) & (Aj ^* p < An)) Then A Trail A is still nearer to an SRC than average therefore choose A to minimise delay

10) if ((Ak < Bk) & (Ajn > Bjn)) then rule 10a

Trail A is nearer to an SRC, but contains more SRCs, and more SEC's than trail B. 10a) if ((Bk <= p) & (Bk ^* p < Bn)) then A

Trail A will have less jitter and be more reliable (due to SRCs), and all distances to SRCs are less than average for the network.

11) if ((An < Bn) & (Ajk > Bjk)) then rule 11 a Trail A has fewer SEC's, but more SRC's and is further from an SRC than trail B. 11a) if (Bn <= Bj^*p) then B

Trail B is selected as it is nearer to the PRC, has less delay, but increased jitter. The node is less than the average distance to an SRC. n.b. inverse of 12

12) if ((Aj <= Bj) & (Ak > Bk) & (An > Bn)) then rule 12a

Trail A is nearer to an SRC than trail B, and has fewer SRC's, but has more SEC's 12a) Therefore if An <= Aj ^* p Then A

Trail A is selected to reduce delay, although it has increased jitter, the number of SECs to a secondary is less than average for the network.

13) if ((Ajn < Bjn) & (Ak > Bk)) then rule 13a Trail A has fewer SRC's and SECs than trail B, but is further from an SRC. 13a) Therefore if ((Aj^*p >An) then A

Trail A has lower delay, but has more jitter, and is less reliable, than trail B. note. A is still within the average number of SEC's from an SRC for the network therefore its better to reduce the delay. 14) if ((Akn < Bkn) & (Aj > Bj)) then rule 14a

Trail A is nearer than an SRC, and has more SRCs, but fewer

SEC's than trail B 14a) If ((Bj^*p) > Bn) Then B

Trail B is selected as it has less jitter, and is more reliable, although it has more delay.

Therefore probably B, - n.b. Inverse of 9

The dynamic method will produce a valid synchronisation network, with little pre-configu ration. Synchronisation network design is still required to ensure that enough secondary references are available to meet the standards. The network will reconfigure following multiple failure, although this may itself cause a number of nodes to reconfigure several times, as the messages ripple through the network. A "wait to restore" timer can be used to minimise the ripple effects.

The dynamic method will require a messaging protocol using either the unused bits of the S-Byte, or using the network management channels. Either messaging channel, will involve the addition of a delay in the network reconfiguration, which will extend the time taken to stabilise the synchronisation network. This may increase the ripple effect of network reconfiguration.

The second method of network synchronisation defines the criteria for Quality Level (QL) and Priority Level (PL) allocation for the synchronisation inputs of a general purpose node. A node model has been developed, one model for a node with an SRC and the other without it. The synchronisation issues due to different network architecture such as various type of ring interconnect and mesh network is then addressed. The mesh topology has been examined by considering up to 3 multiple failures in the mesh networks, for use with a variety of different architectures, a set of rules have been identified to enable the synchronisation networks to be designed.

The QL assignment is dynamic and based upon the standards. This is described below. On the other hand, the PLs assignment for synchronisation input reference is static with pre-configured PL allocation, the method is described in section later.

The rules of the dynamic node distance method are used to allocate the 'sync, node distance' that allocates the PL of each inputs.

In the well known SDH Standards, the QLs are allocated as follows:

• PRC sources are QL2.

• SRC Sources are QL4.

• SEC Sources are QL11.

However, for the present purposes the QLs are defined as follows

• PRC sources QL.PRC

• SRC sources QL.SRC

• SEC sources QL.SEC • Do not use for synchronisation QLDNU

Various different node types are considered, and the rules used to allocate the priority levels for each node are defined below.

A master clock node does not derive its timing from another reference clock. The highest QL it can transmit is that of its internal clock.

A slave node tracks a reference clock with a pre-defined received QL. There are a number of scenarios that can be considered and are as follows: i) An intermediate node (see figure 4)

-Derives its clock from an in-coming STM-N port and is locked to an upstream node, ii) A node with an SRC source (see figure 5) iii) A common node ring interconnect (see figure 7)

- a node that is common between two rings, iv) A single node ring interconnect (see figure 8)

- refers to a node at which ring inter-working occurs, connecting two NEs, one on each ring. v) A matched node (see figure 9)

- refers to a ring inter-working node that has two single node ring interconnect. vi) A Mesh/Grid node (see figure 10)

- Here, a mesh node is considered to be a node with links to multiple adjacent nodes.

A mesh node with 4 adjacent nodes is referred to as a grid node The rules for a grid node are also valid for mesh nodes.

C. An intermediate node is shown in figure 4. SDH equipment conveys information regarding the synchronisation quality in the Synchronisation Status Message Byte (SSMB). This allows a network element to select the best available synchronisation source. The intermediate nodes derive their synchronisation reference source from an STM-N bearer.

Nodes that support the SSMB algorithm should have the following capabilities:

• Analyse the received QLs and select the best source and transmit its quality on out going links; The upstream link of the selected synchronisation input transmits a "do not use code".

• Assign locally a QL for the input synchronisation sources that don't have SSMB.

For example a node receives a number of STM-N link with associated QLs. It selects a source according to the following rules: I) The highest QL. ii) the highest PL (see section 3.4 for priority selection). iii) Sources with QL.DNU are ignored. iv) QL.DNU is transmitted on the upstream link of the selected source. v) The node transmits the selected QL on all other outgoing ports

D. A node with an SRC as shown in figure 5 has two independent selectors (see figure 6) with their own criteria for reference source selection. Selector 1 selects a reference signal for the network element. Selector 2 selects a reference source for the SRC clock and assigns its quality level to the source.

As a result, the SRC source enhances its QL to a source traceable to PRC/SRC by locking to the reference input. The slaved SRC transmits QL.PRC or QL.SRC depending on its reference source QL. The following conditions occur:

i) The slaved SRC has a QL that depends on the QL of the source selected by selector 2. For example if the selected reference has QL.PRC, then the slave's SRC also has

QL.PRC. ii) If the reference signal has QL.SRC, then the slaved SRC source also has QL.SRC. All the slaved sources have a common master reference source. iii) When the received QL at selector 2 drops below QL.SRC

(i.e. QL.SEC or QL.DNU), this reference signal is squelched.

The SRC operates as a free running master node with

QL.SRC.

The rules used for Priority Level allocation will now be described.

Note: High priority inputs have a low priority number (i.e.PLI has higher priority than PL2).

Ideally the whole network will be synchronised to a single reference source, however in practice there may be other synchronisation inputs traceable to a different PRC reference sources, available to a node. One PRC is selected as the 'first or main PRC. Therefore the inputs traceable to the first PRC have the highest priority followed by PLs for the inputs traceable to the second PRC.

Rule 1 : Allocate PLs to the reference sources that are traceable to the first PRC followed by PLs for inputs that are traceable to the second PRC and so on.

Rule 2: A node that is co-located with a PRC has a priority table that includes all direct PRC sources plus one of the STM-N bearer links and the internal SECs. All other STM-N bearers are excluded.

In general there are two types of node in a network; one is an intermediate node that derives its reference clock from the incoming lines. The other is a node collocated with an SRC. A node with an SRC requires two sets of PL tables. One is assigned to the network element for selector 1 and the other PL table is allocated for the reference sources for the second selector. The following rules apply:

• A node that incorporates an SRC source has two PL tables:

i) A PL table is required for selector 1. This includes references from external inputs, west and east aggregates and tributary inputs. The allocation rules are discussed below. ii) A PL table is required for selector 2. This includes references from west and east aggregates and tributary inputs. The allocation rules are also discussed.

Rules for selector 1 are considered here. All the nodes such as intermediate, ring interconnect, SRC and master nodes have this selector. Consider a general node that has all its inputs traceable to a single PRC (rule 1 ) with the following number of synchronisation inputs:

i) k external synchronisation inputs (e.g. PRC or SRC external synchronisation sources input to the NE via the external sync. inputs). This includes STM-n tributary inputs from the backbone network. ϋ) m STM-N inputs from the west aggregates. iii) p STM-N inputs from the east aggregates. iv) q tributary inputs. v) i internal oscillators.

A model of a general or intermediate node is shown in figure 4 and PL allocation is shown in table 1.

Rule 3: The network element allocates the highest priority to the external synchronisation inputs followed by the west and east aggregates, tributary ports and internal sources.

Table 1 : The PL allocation table for selector 1 an intermediate node

The PL table for selector 2 that selects a reference source for the SRC clock consists of the following synchronisation inputs: i) m STM-N inputs from the west side of a node. ii) p STM-N inputs from the east side of a node. iii) q STM-N sources from the tributary side of a node.

The model is shown in figure 5 and PL allocation is shown in table 1 ,

Table 2: Selector Driority allocation table for SRC reference

Rule 4 is used to select a reference source for the SRC.

Rule 4: The PL table of selector 2 is used to select a reference source for the SRC clock. Valid synchronisation inputs include reference sources from west and east aggregates and tributary ports. This table allocates the highest priority to the west aggregates followed by the east aggregates and tributary inputs.

A common node interconnect is illustrated in Fig 7, and is a node that provides a connection between two rings. One of the rings is defined as the backbone ring and the other ring is defined as the secondary ring. The sources on the backbone rings have the highest priority in accordance to the above rules. Rule 5: At a common node interconnect the inputs from the backbone ring have the highest PLs followed by those of the secondary ring

A single node ring interconnect provides a single link between a node on each ring. This is shown in figure 8. Nodes A1 and B1 are connected through a single link. Node B1 is the secondary ring inter network node with one tributary port, west and east aggregates.

Consider the two network scenarios:- i) Node interconnect with SRC

Ring/Sub-network B contains an SRC (see figure 8). A problem arises when the source to the ring interconnect node fails i.e. link failure between A1 and B1 (also see Annex 2.1 for further explanation). In this situation while the reference source from ring A, has been removed, the QL from the west aggregate on A1 still carries the previous aggregate quality indication. This is due to propagation delay. A synchronisation loop is prevented by excluding the input which closes the ring from the priority table. The PL allocation for node B1 follows:

Rule 6: Remove from the priority table the entry that completes the ring in the secondary interconnect node (i.e. node B1). This is similar to rule 2. ii) Node interconnect without SRC

The secondary ring does not contain an SRC. In this case allocating a

PL to the west or east aggregate of node B1 , does not have a purpose, therefore they are not included in the priority table. When the link fails

B1 selects its internal clock to time the ring.

Note: PL2 from the aggregate is redundant as it will be QL.DNU. It exists for commonalty with i).

The PL allocation for node B1 follows: Rule 7: When the secondary ring does not contains an SRC. The west aggregates are not in the PL table of node B1.

Matched node interconnect A matched node or dual node ring interconnect provides two links between two rings by connecting 2 nodes from each ring. Two rings with dual node interconnect are shown in figure 9. At each ring interconnect node, one tributary source connects the two rings together. The tributary source gets the highest PL followed by the west and east side aggregates.

A single failure of any tributary source of the matched node would not cause the loss of reference synchronisation source to any node in the secondary ring (i.e. a link failure between A1 &B1 or A2&B2 can be tolerated).

The failure of both tributary sources will cause the degradation of synchronisation in the secondary ring.

Rule 8: The priority allocation for secondary ring node interconnect (i.e. node B1 and B2) is that the tributary source has the highest PL followed by the aggregate.

The elements of a grid network can have up to a maximum of four STM- N synchronisation inputs. A grid network is a special case of a mesh network and from a network synchronisation point of view, the grid network is very robust. Its rules also apply to mesh networks. This is shown in figure 10.

The synchronisation inputs to a node have priorities according to 'synchronisation node distance' in the normal fully working network.

The 'synchronisation node distance' is defined in terms of SEC distance, SRC distance and PRC distance. They are defined as: i) PRC distance - is the number of network elements between the PRC and a node. ii) SRC distance

- is the number of SRCs between the PRC and a node. iii) SEC distance

- is the number of network elements between the last SRC and a node.

A tree architecture for the synchronisation network is defined under normal operating condition. Using the links that minimises the network elements node distance's (i.e. first minimise the PRC distance then

SRC distance followed by SEC distance) and the intermediate node rule

All of the inputs to the tree architecture have PL1 's (see figure 11) and then other inputs to network element is assigned with lower priorities according to their node distances. When there are conflicts the appropriate rules described earlier are applied. See figure 14.

Rule 9: Priorities are first allocated to inputs that minimise the network elements synchronisation node distance.

For example the grid network of figure 14 allocates the PLs for the network element using the following rules:

• The tree synchronisation architecture results from the application of rule 9. • Node A1 is adjacent to a PRC it uses rules 1 & 2. Rule 1 give PLs to PRC sources and rule 2 excludes all STM-N inputs apart from one in the priority table.

• Nodes A2-A9 use rules 3 (as they are intermediate node) and 9 (which it considers other sync, elements in the network. As the network architecture evolves, other previously defined rules will be needed.

A new term, Bidirectional Priority Level (BPL) is introduced to examine the effect of link failures on the network. In a normal network multiple failures may occur, however, four concurrent failures or more are rare events, so only situations with up to three failures are considered. The BPL of a link is defined as:

The highest of the two PLs for each input port on a bidirectional link.

For example, consider figure 13 which has a bidirectional link with PL2, PL3 at either end. Thus the BPL of the link is:

BPL = {highest priority of the PL2 and PL3} = min{PL2, PL3} = PL2 BPL is a static measure of the link.

A bidirectional link with BPL1 indicates that one of the inputs is normally used as a synchronisation source. The allocation of BPL for a grid network is shown in Figure 14. Next link failures and their effect on the grid are investigated. The effect of single, double and triple cuts on the synchronisation network are studied. Figure 15 illustrates a number of possible failures (X1-X5) that can affect nodes on a grid network.

Where there is a single failure in the grid network, there are two cases to be considered: i) A failure with BPL2 or lower

This has no effect on the normal synchronisation path of a grid network. For example in the network shown in figure 15, cuts X2 or X3 do not affect the synchronisation of node A5. There is no change in the synchronisation path and there are no changes to the synchronisation reference of node A5. The cut affects the standby synchronisation reference, ii) A failure with BPL1

A single failure of a link with BPL1 affects a node. In this case, an alternate path link with PL2 is selected. The node distance may also be increased. For example for the network shown in figure 14, cut X1 affects the synchronisation path to node A5, however, a second path with PL2 exists that provides an alternate synchronisation link. The normal synchronisation path is a tree architecture composed of links of BPL1 , no other links participate in the normal synchronisation path. This is shown in figure 16. Failures to links of BPL2 and lower have no effect.

Where there are two failures in a grid network, there are three cases to be considered: i) Failures with bidirectional priority level 2 (BPL2) or lower

These failures have no effect on the synchronisation path of a grid network. There is no change in the synchronisation path and there is no change to the selected synchronisation reference input. For example for network shown in figure 14, the cuts X2 and X3 do not affect the synchronisation of node A5. ii) Any two failures with BPL1 & BPL2 that affects different nodes.

In this case the effect on a node is similar to a single cut with BPL1 links. The link cut with BPL2 has no effect on the synchronisation path. For example, for the network shown in figure 15, the cuts X1 and X5 affect two different nodes. X1 causes node A5 to select another synchronisation input. X5 does not affect the synchronisation of either node A8 or A9. iii) Any two failures with BPL1 & BPL2 that affects same nodes.

The failed links have bidirectional priority level 1 and 2 (BPL1 & BPL2). There is still another redundant synchronisation path that can be selected by the affected node. In this case, the synchronisation path changes without any other node reconfiguration taking place e.g. adjacent nodes). However, the node distance has increased. For example for the network shown in figure 15, cuts X1 and X2 affect node A5, however the link from A6 provides a third synchronisation path.

Where there are three failures in a grid network, there are three cases to be considered: i) Any three failures with BPL2 or lower These failures has no effect on the synchronisation path of a grid network. For example for the network shown in figure 14, cuts X2, X3 and X5 do not affect the synchronisation of any nodes. ii) Any three failures, one with the BPL1 and the other two with

BPL2 or lower affect same node;

This is the worst case scenario. It causes the adjacent node to reconfigure in order to provide a synchronisation signal to the node affected by the three cuts. The affected node selects the internal reference source and transmits QL.DNU on down stream links. The adjacent node reconfigures and selects a better quality source. For example for the network shown in figure 15, cuts X1 , X2 and X3 temporarily deny any reference source for node A5, then A5 selects its local oscillator, as the reference source from A8 has QL.DNU. A8, the adjacent node to A5, selects a reference source from node A7 which has a higher QL than that provided by A5. After a change of synchronisation path, A8 transmits a selectable reference source to node A5 for its synchronisation reference. iii) Any three failures, one with the BPL1 and the other two with

BPL2 or lower affect two nodes;

One of the three failures affects a different node, and is isolated from the other two cuts. The effects are similar to the case of one and two cuts in the network examined above.

Therefore, the maximum effect of a single or a double cut in a grid network are changes in the synchronisation path of the affected node without involving any other nodes.

The effect of a triple cut may involve an adjacent node. The adjacent node is required to reconfigure its selected synchronisation path to an alternative path.

Thus the resilience of a network may be evaluated by determining the highest priority BPL, (ie lowest PL for each link), then identifying what proportion of the links have a BPL above a given level, eg what proportion of links are BPL3. This gives a relative value for resilience, which would need to be calibrated against a known level to give an absolute value. The network must be designed to ensure that when the network is reconfigured, due to up to 3 failures, the number of SEC sources to the nearest SRC is kept within the limit (i.e. 20 NE clocks) even.

At the grid boundary the number of possible STM-N bearers reduces to two or three. In this case these nodes are more exposed and vulnerable than the inner nodes that possess up to a maximum of four possible STM-N bearers.

Using the Static priority method a very resilient synchronisation network can be designed. The nodes have up to 3 alternate references where one involves adjacent node reconfiguration.

Ring networks require several nodes to reconfigure following a single failure. The number of reconfigured nodes depends on the position of the failure. Nodes temporarily lose their reference source until they have reconfigured.

Methods using static and dynamic PL allocation were examined. A set of rules for static PL allocation has been determined. Grid networks which usually constitute tier one or two of an SDH network can use a fixed priority allocation system and tolerate a maximum of 3 failures of synchronisation reference input at a single node. The occurrence of 3 failures at a node is expected to be a rare event.

For multi ring interworking a 'dual node ring interconnect' is recommended as a single node interconnect has lower availability.

The dynamic node position method is implemented through a management channel. The network will stabilise, however, as demonstrated in the static case, node reconfiguration occurs following multiple failures. One may conclude that, with the dynamic node position method the ripple due to configuration stabilises within a few nodes.

The study has shown that an automatic system can be set up using dynamic PL allocation, however this requires additional management channels, and may have a 'ripple' effect, after a network failure, causing some nodes to reconfigure several times before stabilising.

Investigation of the static method, has shown that with the addition of an extra characterisation for each link, the existing system can maintain synchronisation in the presence of multiple failures.

The following terms and definitions apply.

A network element means any point on the network, including junctions or any microprocessor controlled element.

A node may comprise one or more network elements that are located together.

A master node is a node from which other nodes get their reference source. There is only one master node in a trail. A master node derives its reference source from the internal clock.

An Intermediate node is a node that derives its clock from an in¬ coming STM-N port and is locked to an upstream node.

A slave node derives its reference clock from the master node.

'PRC traceable' indicates that a node derives its clock from one originating at a PRC.

Down stream nodes are nodes that derive their synchronisation clock from a node.

Up stream nodes are the nodes that the synchronisation trail has already passed through.

- Node distance is the number of network elements and SRC sources between the PRC and a node. SRC distance is the number of SRC's between the PRC and a node.

SEC distance is the number of network elements between the last SRC and a node.

The invention could be applicable to ATM (Asynchronous Transfer Mode) systems, whether run over an SDH network, or independently.

The methods of the invention can be used to create a new tree, or to modify an existing tree to cope with changing conditions.

The dynamic or static modes of the invention can be put into practice in an SDH system by providing a network entity having a clock reference selection circuit (not illustrated). In the static mode, a priority level memory is provided. For the dynamic mode, counters or a memory may be providing for storing trail information from each input link. A processor will derive parameters from the trail information. These parameters will then be used by following the rules set out above, to determine which trail is the optimum trail. The clock reference from this selected trail will then be used to synchronise operations of the entity.

Elements of the static mode and the dynamic mode may be combined so as to enable selecting the clock reference on the basis of transmitted trail information as well as predetermined priority levels. This mechanism can be implemented through ATM management channels.

Claims

CLAIMS:

1. A method of synchronising an element in a network, by selecting from a plurality of clock references, the clock references being transmitted from respective neighbouring network elements, wherein trail information relating to the trail of each clock reference through elements in the network, is determined by the respective neighbouring elements, and wherein the selection is made on the basis of at least the trail information.

2. The method of claim 1 wherein the trail information is transmitted directly from the neighbouring nodes.

3. The method of claim 1 or claim 2 wherein the trail information is transmitted using overhead bytes.

4. A method of synchronising an element in a network, by selecting from a plurality of clock references, the clock references being transmitted from neighbouring network elements, wherein a predetermined relative priority level is assigned to each clock reference, based on trail information relating to the trail of each clock reference through the elements in the network and wherein a selection is made from the plurality of clock references, on the basis of at least the predetermined priority levels of each of the clock references.

5. The method of any preceding claim wherein the trail information comprises a count of elements in the trail through the network followed by each clock reference.

6. The method of claim 5 wherein the elements comprise different types of elements, which degrade the clock references differently, and wherein the count comprises separate counts of each of the types of element.

7. The method of any preceding claim wherein the selection is also made on the basis of a current quality level for each of the clock references.

8. The method of claim 7 wherein the quality level is transmitted as part of the network overhead.

9. The method of any preceding claim wherein the selection is made automatically by the network element.

10. The method of any preceding claim when dependent on claim 5, wherein the count of elements comprises at least the count of elements to a next previous secondary reference source in the trail.

11. The method of any preceding claim when dependent on claim 5, wherein the count of elements comprises at least a count of secondary reference sources in the trail to a primary reference source.

12. The method of any preceding claim when dependent on claim 5, wherein the count of elements comprises at least a count of elements in the trail to a primary reference source.

13. The method of any preceding claim when dependent on claim 5, wherein the count of elements comprises an average for the network of the number of elements between secondary reference sources.

14. A method of synchronising a network by creating a synchronisation tree of trails starting from at least one primary reference source, by synchronising each element using the method of any preceding claim.

15. A network element arranged to carry out the method of any of claims 1 to 14.

16. A network arranged to carry out the method of claim 14.

17. A method of positioning primary or secondary reference sources in a synchronisation network, comprising the step of determining trail information relating to the trail of a clock reference through the network to any element.

18. A method of evaluating the resilience of a synchronisation network in which a clock selection priority level is assigned for each direction of a bi-directional link between neighbouring elements, comprising the steps of, determining which is the highest of the two priority levels assigned for each link, determining what proportion of the highest levels exceed a predetermined threshold, and evaluating the resilience according to the proportion.