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WO1997015079A1 - Dispositif a semi-conducteur a large bande interdite possedant une heterojonction - Google Patents

Dispositif a semi-conducteur a large bande interdite possedant une heterojonction Download PDF

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Publication number
WO1997015079A1
WO1997015079A1 PCT/SE1996/001265 SE9601265W WO9715079A1 WO 1997015079 A1 WO1997015079 A1 WO 1997015079A1 SE 9601265 W SE9601265 W SE 9601265W WO 9715079 A1 WO9715079 A1 WO 9715079A1
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WIPO (PCT)
Prior art keywords
layer
alloy
aln
region
group
Prior art date
Application number
PCT/SE1996/001265
Other languages
English (en)
Inventor
Christopher Harris
Andrey Konstantinov
Erik Janzén
Original Assignee
Abb Research Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Abb Research Ltd. filed Critical Abb Research Ltd.
Priority to EP96935676A priority Critical patent/EP0857358A1/fr
Publication of WO1997015079A1 publication Critical patent/WO1997015079A1/fr

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325—Silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/473—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having confinement of carriers by multiple heterojunctions, e.g. quantum well HEMT
    • H10D30/4732—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having confinement of carriers by multiple heterojunctions, e.g. quantum well HEMT using Group III-V semiconductor material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/82—Heterojunctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/852—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs being Group III-V materials comprising three or more elements, e.g. AlGaN or InAsSbP
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN

Definitions

  • the present invention relates to a semiconductor device comprising two adjacent semiconductor layers of different material forming a heterojunction therebetween, the first of sai ⁇ layers having a larger band gap between the con ⁇ duction band and valence band than the other, second layer, and being doped with impurities providing charge for forming a high mobility surface channel in the second layer at the interface between said layers.
  • This type of semiconductor device is called a HE T (High Electron Mo ⁇ bility Transistor) due to the high mobility of charge car- riers in the surface channel, thanks to the fact that the free charge carrier in said channel are physically sepa ⁇ rated from the ionised impurities in said first layer re ⁇ ducing scattering of the charge carriers thereby.
  • These semiconductor devices are gate controlled.
  • gate controlled Field Effect Transistors having an insulating layer, nor ⁇ mally Si ⁇ 2, between the gate and the semiconductor layer is that the amorphous nature of such an insulating layer as Si ⁇ 2 gives rise to additional scattering of carriers in the inversion channel at said interface, particularly for the case of high carrier densities where strong carrier localisation occurs at the semiconductor-insulating layer interface, so that the mobility of carriers will be con- siderably below the bulk carrier mobility, whereas a high quality heterojunction is known to be nearly free from in- terface scattering and carrier confinement can also bring about a rise in carrier mobilities, since the impurities are spatially separated from the mobile carriers, which is called modulation doping. Thanks to the high mobility HEMTs may operate under high frequencies.
  • known devices of this type which may have a heterojunction of for example GaAs/AlGaAs, may not be obtained with such high carrier densities that they may be used in high power devices, and the material will also be unable to take the heat created when high currents are transported.
  • SiC has a high thermal stability and it will have a stable function at much higher tempera ⁇ tures than for instance Si, namely well up to 1000 K.
  • Fur- thermore it has a high thermal conductivity, so -hat SiC devices may be arranged at a high density, and they may accordingly also carry high currents.
  • the object of the present invention is to provide a semi ⁇ conductor device of the type defined in the introduction, which has a high quality heterojunction and may operate under high frequencies and carry high currents while main ⁇ taining a good function stability.
  • This object is in accordance with the invention obtained by making the second layer of SiC and the first layer of one of a) AIN and b) an alloy of AlN and other Group SB- nitrides.
  • AIN has a very good lattice match with SiC with a misfit of only 0,7%, so that very high quality hetero- junctions between SiC and AIN nearly free from interface scattering may be grown. It also has nearly the same coef ⁇ ficient of thermal expansion as SiC and it is stable at very high temperatures.
  • AlN has a band gap of about 6,2 eV, which is considerably larger than all polytypes of SiC, which have band gaps between 2,3 and 3,3 eV.
  • the first layer may also be made of an alloy of AlN and other Group 3B-nitrides, through which a high quality heterojunction may also be obtained.
  • Group 3B-nitrides may make it easier to obtain a well defined doping of said first layer, but these other Group 3B-nitrides have smaller gaps between the valence band and the conduction band, so that they counteract the advantages of the large band-offset of AlN with respect to to SiC, so that it will mostly be suitable to have a high concentration of AlN and lower concentration of one or more of the other Group 3B-nit.ride in any case close to said heterojunction.
  • a first region of said first layer closest to said junction is made of AlN. This means that the lattice match at the heterojunction and by that the quality of the heterojunc ⁇ tion will be at an optimum, so that the mobility in the two dimensional interface channel will be very high.
  • a second region of said first layer adjacent to said first region of AlN and separated from said junction there ⁇ through is made of an alloy of AlN and other Group 3B-ni- trides.
  • the region of said first layer closest to said junction is not doped with i - purities, so that a spacer layer is obtained and the ion ⁇ ised donors are well separated from the surface channel and by that do not affect the mobility of the electrons therein, so that thi ⁇ mobility will be excellent.
  • concentration of said Group 3B-nitrides in said alloy is gradually increasing in said at least one region in the direction away from said junction.
  • said alloy is an alloy having a content of GaN, which is very advantageous, since gallium nitride and aluminium nitride have a complete mi ⁇ cibility, so that a high qual ⁇ ity layer may be obtained.
  • said sec ⁇ ond layer is made of 3C-SiC.
  • This particular polytype of SiC is advantageous in thi ⁇ type of devices, in which the mobility is of most importance, since this polytype is characterised by a particularly high mobility.
  • Fig. 1 is a view illustrating the difference in band gap of two layers at a heterojunction in a semiconduc ⁇ tor device having AlN or an alloy of AIN and ether Group 3B-nitrides as one layer and SiC as the other layer for illustrating how a surface channel having charge carriers is obtained by auto-ioni ⁇ a- tion of impurities in the layer with the largest band gap,
  • Fig. 2 is a view showing the extension of the valence and conduction bands close to said heterojunction il ⁇ lustrating the high mobility surface channel at the interface between the two layers and how the ionised donors will influence the mobility therein,
  • Fig. 3 illustrates the concentration of AlN in said first layer in relation to the distance from the hetero- junction in the semiconductor device having the conduction band extension shown in Fig. 2, and
  • Fig. 4 a High Electron Mobility Transistor (HEMT) , which may be provided with the layers made of the raate- rial according to the present invention.
  • HEMT High Electron Mobility Transistor
  • Fig. 1 illustrates a heterojunction 1 between a first layer 2 and a second layer 3 in a semiconductor device. It is very schematically illustrated that the energy gap be ⁇ tween the valence band 4 and the conduction band 5 i ⁇ larger in said first layer 2 than in the second layer 3, so that a band-offset is obtained at said heterojunction.
  • the fir ⁇ t layer is doped with donors these have their free electrons 6 at a higher energy level than the energy level at the other side of the heterojunction, which will result in a fall of said electrons as indicated by the ar ⁇ row to the lower energy level in the second layer while ioni ⁇ ing said donors and leaving positive holes in the fir ⁇ t layer 2.
  • the maximum limit of electrons in the two dimensional surface channel 7 so formed by the ionisation of the donors depends on the band offset between the conduction bands in the two lay ⁇ ers, and it i ⁇ only po ⁇ ible to put in electrons in said surface channel until the Fermi-level in both layers ha ⁇ reached equilibrium as shown in Fig. 2.
  • the barrier height 8 will be about 1,7 eV in com ⁇ parison to a heterojunction between GaAs and AlGaA ⁇ , which ha ⁇ a barrier height of 300 meV. Thanks to this increased barrier height it will be possible to raise the maximum density of free electrons in the two dimensional surface channel from about 10 12 cm ⁇ 2 to above 10 13 c ⁇ T 2 .
  • the sharp ⁇ ness of the conduction band shown in Fig. 2 is defined by the concentration of the impurity, i. e. the doping, of the first layer 2.
  • This other Group 3B-nitride may be GaN or InN. In the latter case the concentration thereof may not be larger than 20%, since after that there will be hardly no band gap between the first layer and the second layer.
  • the intermixing of gallium or indium may have two purposes, namely the content thereof may be used to vary the band- offset and they will make it easier to obtain a doping of said first layer.
  • FET Field Effect Transistor
  • This device will be nearly free from interface scattering at said interface, ⁇ o that the electrons may be moved very fast and the device may operate at high frequencies. Thanks to the po ⁇ sibility of carrying very high currents the device will be well suited for use in high power ap ⁇ plications.
  • Fig 4 shows a HEMT comprising a source 11 and drain 12 with metal contacts 13 and 14 respectively.
  • the layer se ⁇ quence is made up from a first doped wide bandgap layer 2 on top a second layer 3 of smaller bandgap.
  • Said first layer i ⁇ divided into two sub-layers, namely a first un ⁇ doped sub-layer 15 and a second doped layer 16.
  • Dopants placed in the doped layer 16 are auto-ioni ⁇ ed and the charge tran ⁇ ferred to the smaller gap layer 3 and located at the heterojunction with layer 15, thereby forming a channel 18 comprising a two dimensional charge sheet be ⁇ tween ⁇ ource and drain.
  • the device also comprises a gate 17, the potential of which may be varied so as to control the conductivity of the channel at the heterojunction 1, and a substrate layer 19.
  • the invention is also applicable to other devices than HEMTs, accordingly al ⁇ o when ⁇ aid first layer having a larger band gap is doped with acceptors and the two dimen ⁇ ional channel at the interface between the two layers will contain holes as charge carriers.
  • the definition layer is to be interpreted broadly and com- prises all types of volume extensions and shape ⁇ .
  • the SiC layer 3 may be of any polytype of SiC, such as for example 6H, 4H, 3C and 15R.

Landscapes

  • Junction Field-Effect Transistors (AREA)

Abstract

Cette invention concerne un dispositif à semi-conducteur comprenant deux couches semi-conductrices adjacentes (2, 3) faites de matériaux différents et définissant une hétérojonction (1). Une première couche (2) possède un espace situé entre la bande conductrice et la bande de valence, qui est plus important que celui de la seconde couche (3). Cette première couche est dopée par des impuretés permettant de produire une charge et de former un canal de surface (7) d'une grande mobilité dans la seconde couche au niveau de l'interface entre lesdites couches. La seconde couche (3) est faite de SiC tandis que la première couche (2) est faite a) soit d'AlN, b) soit d'un alliage de AlN et d'autres nitrures du groupe 3B.
PCT/SE1996/001265 1995-10-18 1996-10-07 Dispositif a semi-conducteur a large bande interdite possedant une heterojonction WO1997015079A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP96935676A EP0857358A1 (fr) 1995-10-18 1996-10-07 Dispositif a semi-conducteur a large bande interdite possedant une heterojonction

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9503630-7 1995-10-18
SE9503630A SE9503630D0 (sv) 1995-10-18 1995-10-18 A semiconductor device having a heterojunction

Publications (1)

Publication Number Publication Date
WO1997015079A1 true WO1997015079A1 (fr) 1997-04-24

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EP (1) EP0857358A1 (fr)
SE (1) SE9503630D0 (fr)
WO (1) WO1997015079A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008002521A3 (fr) * 2006-06-26 2008-02-14 Northrop Grumman Corp Dispositifs semi-conducteurs à hétérojonction basés sur sic
JP2011049461A (ja) * 2009-08-28 2011-03-10 Ngk Insulators Ltd 半導体素子用エピタキシャル基板、半導体素子、および、半導体素子用エピタキシャル基板の作製方法
JP2011049467A (ja) * 2009-08-28 2011-03-10 Ngk Insulators Ltd 半導体素子用エピタキシャル基板、半導体素子、および、半導体素子用エピタキシャル基板の作製方法

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2707425A (en) * 1949-12-06 1955-05-03 Allis Chalmers Mfg Co Tool support for agricultural implements
US4929985A (en) * 1988-05-18 1990-05-29 Fujitsu Limited Compound semiconductor device
US5247533A (en) * 1990-12-26 1993-09-21 Toyoda Gosei Co., Ltd. Gallium nitride group compound semiconductor laser diode
US5273933A (en) * 1991-07-23 1993-12-28 Kabushiki Kaisha Toshiba Vapor phase growth method of forming film in process of manufacturing semiconductor device
US5296395A (en) * 1991-05-17 1994-03-22 Apa Optics, Inc. Method of making a high electron mobility transistor
US5387804A (en) * 1988-12-28 1995-02-07 Sharp Kabushiki Kaisha Light emitting diode
US5393990A (en) * 1989-04-04 1995-02-28 Siemens Corporate Research, Inc. HEMT structure
WO1996009653A1 (fr) * 1994-09-20 1996-03-28 Cree Research Inc. Diode electroluminescente a geometrie verticale formee d'une couche de nitrure du groupe iii et caracterisee par une vie utile prolongee

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2707425A (en) * 1949-12-06 1955-05-03 Allis Chalmers Mfg Co Tool support for agricultural implements
US4929985A (en) * 1988-05-18 1990-05-29 Fujitsu Limited Compound semiconductor device
US5387804A (en) * 1988-12-28 1995-02-07 Sharp Kabushiki Kaisha Light emitting diode
US5393990A (en) * 1989-04-04 1995-02-28 Siemens Corporate Research, Inc. HEMT structure
US5247533A (en) * 1990-12-26 1993-09-21 Toyoda Gosei Co., Ltd. Gallium nitride group compound semiconductor laser diode
US5296395A (en) * 1991-05-17 1994-03-22 Apa Optics, Inc. Method of making a high electron mobility transistor
US5273933A (en) * 1991-07-23 1993-12-28 Kabushiki Kaisha Toshiba Vapor phase growth method of forming film in process of manufacturing semiconductor device
WO1996009653A1 (fr) * 1994-09-20 1996-03-28 Cree Research Inc. Diode electroluminescente a geometrie verticale formee d'une couche de nitrure du groupe iii et caracterisee par une vie utile prolongee

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008002521A3 (fr) * 2006-06-26 2008-02-14 Northrop Grumman Corp Dispositifs semi-conducteurs à hétérojonction basés sur sic
US7683400B1 (en) 2006-06-26 2010-03-23 Northrop Grumman Systems Corporation Semiconductor heterojunction devices based on SiC
JP2011049461A (ja) * 2009-08-28 2011-03-10 Ngk Insulators Ltd 半導体素子用エピタキシャル基板、半導体素子、および、半導体素子用エピタキシャル基板の作製方法
JP2011049467A (ja) * 2009-08-28 2011-03-10 Ngk Insulators Ltd 半導体素子用エピタキシャル基板、半導体素子、および、半導体素子用エピタキシャル基板の作製方法
CN102005471A (zh) * 2009-08-28 2011-04-06 日本碍子株式会社 半导体元件用外延基板、半导体元件及半导体元件用外延基板的制作方法
EP2290696A3 (fr) * 2009-08-28 2012-09-12 NGK Insulators, Ltd. Substrat épitaxial pour dispositif semi-conducteur, dispositif semi-conducteur et procédé de fabrication d'un substrat épitaxial pour dispositif semi-conducteur
US8378386B2 (en) 2009-08-28 2013-02-19 Ngk Insulators, Ltd. Epitaxial substrate for semiconductor device, semiconductor device, and method of manufacturing epitaxial substrate for semiconductor device

Also Published As

Publication number Publication date
EP0857358A1 (fr) 1998-08-12
SE9503630D0 (sv) 1995-10-18

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