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WO1997005526A1 - Systemes lithographiques a reticules programmables - Google Patents

Systemes lithographiques a reticules programmables Download PDF

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Publication number
WO1997005526A1
WO1997005526A1 PCT/US1996/012330 US9612330W WO9705526A1 WO 1997005526 A1 WO1997005526 A1 WO 1997005526A1 US 9612330 W US9612330 W US 9612330W WO 9705526 A1 WO9705526 A1 WO 9705526A1
Authority
WO
WIPO (PCT)
Prior art keywords
radiation
programmable
reticle
mask layout
lithography system
Prior art date
Application number
PCT/US1996/012330
Other languages
English (en)
Inventor
G. R. Padmanabhan
Original Assignee
Lsi Logic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lsi Logic Corporation filed Critical Lsi Logic Corporation
Priority to AU66019/96A priority Critical patent/AU6601996A/en
Publication of WO1997005526A1 publication Critical patent/WO1997005526A1/fr

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Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70216—Mask projection systems
    • G03F7/70283—Mask effects on the imaging process
    • G03F7/70291—Addressable masks, e.g. spatial light modulators [SLMs], digital micro-mirror devices [DMDs] or liquid crystal display [LCD] patterning devices
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/50—Mask blanks not covered by G03F1/20 - G03F1/34; Preparation thereof

Definitions

  • the present invention relates to photolithography systems for forming integrated circuits. More specifically, the invention relates to programmable reticles and systems employing such reticles for streamlining integrated circuit development and fabrication.
  • Photolithography is a widely used process in the integrated circuit fabrication industry. In fact, whenever a pattern must be transferred to a semiconductor wafer, a photolithography process is employed. Photolithography systems have evolved into highly complex systems for optically projecting such patterns onto wafers with micron to submicron resolution. Current integrated circuit fabrication processes may employ fifteen or more separate photolithography steps in the fabrication of a single integrated circuit.
  • a reticle is a plate having transparent and opaque regions which are arranged to define a mask pattern layout.
  • the regions of the photosensitive layer that are exposed to light are selectively retained or removed (depending upon the chemical nature of the photosensitive layer) in a subsequent development step.
  • the mask pattern is ultimately transferred to the underlying substrate and the exposed regions are transformed by a process such as ion implantation or etching.
  • a process such as ion implantation or etching.
  • Figure 1 illustrates a typical process flow 2 for developing an integrated circuit.
  • the development process begins at 4, and thereafter at a step 6, an integrated circuit is designed. It should be understood that such integrated circuit is designed solely by software means. Initially, the design exists only in a Boolean representation, and thereafter, it is converted to a multi-level circuit layout to be provided on a wafer. Associated with this layout is a series of mask designs that represent actual patterns to be imposed on the wafer. The mask designs, which are the output of process step 6, are generated in a process known as "tape-out.”
  • the mask designs are electronically transferred to a reticle or photomasking company which performs a manufacturing electron beam exposure system ("MEBS"), step 8, to generate a reticle corresponding to the design.
  • MEBS manufacturing electron beam exposure system
  • this step takes the electronic version of the mask and converts it to a physical version.
  • This is a rather complex and expensive process in which an electron beam is moved over an electrostatic medium as specified by the electronic representation of the mask.
  • the output of this process is a reticle having transparent and translucent regions corresponding to the mask layout.
  • the translucent regions may be defined by chromium or chromium oxide on a glass substrate, for example.
  • a beryllium media may be used.
  • a reticle is available and is provided for use in a photolithography step 10.
  • this photolithography step involves illuminating the wafer through the reticle to transfer the mask pattern onto the wafer, and thereby generate exposed regions for subsequent processing.
  • a wafer testing step 12 is performed. And at the conclusion of this step, it will be known whether the wafer is suitable for its intended purpose. The associated decision is represented by decision step 14 in process 2. If the wafer is found suitable, the process is simply concluded at 16. In other words, the mask design is adequate for the task at hand.
  • step 6 If, on the other hand, it is determined that the wafer has a problem related to the mask design, the process must return to step 6 where the mask is redesigned. Thereafter, the reticle must be formed at step 8, and wafer fabrication and testing must be performed at steps 10 and 12 as described above.
  • this scenario is rather common in modern chip design. It is very tedious, time consuming, and expensive to regenerate the reticles for each new cycle of this process.
  • MEBS step 8 is particularly resource intensive.
  • a programmable reticle is provided as a medium having a two- dimensional array of electronically controllable elements, each of which can be made either transparent or opaque as dictated by an electronic signal. Collectively, the opaque elements of the reticle define a mask layout pattern.
  • the programmable reticle forms part of a complete photolithography system including a radiation source which shines onto the reticle, a stepper which directs radiation from the reticle onto a wafer, and a programmable control system for defining the mask provided on the programmable reticle.
  • the elements of the two-dimensional array will be no larger than about ten microns.
  • the invention greatly simplifies the photolithography process. No longer is it necessary to prepare a new reticle by MEBS whenever a new pattern is to be provided to a wafer.
  • each new mask is provided by simply reprogramming the reticle elements.
  • the programmable reticle need not be realigned after each new mask is generated, thus reducing the time required to prepare a photolithography system for exposure.
  • error correction in photolithography can be conducted "on the fly" during a manufacturing or design.
  • the integrated circuit manufacturer no longer has to have a new reticle prepared each time that an error is detected.
  • the mask layouts for a new integrated circuit design can be transmitted directly from the designer's computer system to a photolithography system in accordance with this invention.
  • the present invention provides a photolithography system for fabricating integrated circuits on a semiconductor substrate.
  • the system can be characterized as including the following elements: (1) one or more stations for providing mask layout data defining features of an integrated circuit on the semiconductor substrate; (2) a programmable reticle in communication with one or more of the stations such that it receives mask layout data; (3) a radiation source aligned to provide radiation through the programmable reticle; and (4) an optical system for directing radiation passing through the programmable reticle onto a radiation-sensitive masking material on the semiconductor substrate such that regions of the radiation-sensitive masking material corresponding to the mask layout data are exposed to said radiation.
  • the programmable reticle will have an array of elements, each of which can be switched to either a transparent or an opaque state in response to the mask layout data.
  • the radiation from the radiation source will be blocked by those elements in the opaque state and transmitted by those elements in the transparent state.
  • the lithography system will have multiple stations each configured to provide mask layout data. Some of these stations may even be provided at locations remote from the programmable reticle, possibly at other cites within an enterprise.
  • a server may be required to communicate with the one or more stations to control the timing of the information provided to the programmable reticle.
  • the stations will be workstations or computer terminals adapted to communicate mask layout data to the server.
  • Another aspect of the present invention provides a method for using photolithography to fabricate integrated circuits on a semiconductor substrate.
  • the method can be characterized as including the following steps: (1) programming a programmable reticle (of the type described above) to define a mask layout; (2) directing radiation onto the programmable reticle such that the radiation passes through the elements of that reticle that are in a transparent state, and the radiation is blocked by the elements that are in an opaque state; and (3) directing the radiation pattern that the passes through the programmable reticle onto a radiation sensitive layer (typically a photoresist) on the semiconductor substrate, so as to expose the pattern of the mask layout onto the radiation sensitive layer.
  • a radiation sensitive layer typically a photoresist
  • the radiation sensitive layer will be processed in the usual manner to produce a mask on the wafer.
  • the exposed regions of the wafer will be transformed by one of many possible integrated circuit fabrication processes such as ion implantation, etching, etc.
  • the above steps will be repeated numerous times in order to form the integrated circuit. It is an envisioned that some steps of the overall process may employ traditional non ⁇ programmable reticles. In such embodiments, other steps would, of course, employ the programmable reticles of this invention.
  • Figure 1 is a flow chart illustrating a process for generating and using conventional reticles.
  • Figure 2 schematically illustrates the layout of a preferred embodiment of the present invention in which a programmable reticle is employed in a system having a stepper, a wafer, a server, and various stations connected to the server.
  • Figure 3 shows a programmable reticle of this invention as it might appear when programmed to provide multiple mask layouts for different dies on a given wafer.
  • the system 20 includes a radiation source 22 which may be a visible, ultra-violet, x-ray, an electron beam or other source as is known in the art.
  • a radiation source 22 which may be a visible, ultra-violet, x-ray, an electron beam or other source as is known in the art.
  • the source may be, for example, a filtered mercury arc lamp or an appropriate laser.
  • Radiation from radiation source 22 is directed through a programmable reticle 24 having an array of controllable elements or pixels, each of which can be switched between a transparent state and an opaque state in response to electronic signals.
  • the controllable elements of the reticle may be made from any media which can be electrically programmed to change their transmittance to the radiation.
  • programmable reticle 24 is preferably a hquid crystal diode array.
  • other programmable media may be employed as well.
  • electrochromic materials which altemate between transparent and translucent states by reversible electrochemical reactions may also be used.
  • Other media may be appropriate x-ray sources.
  • programmable reticle 24 Radiation passing through programmable reticle 24 is directed onto a wafer 28 by stepper 26.
  • Wafer 28 is held on a support 30 which may move the wafer by translation, rotation, or tilt. In this manner, various regions of wafer 28 are illuminated at different times.
  • the stepper 26 contains the optical and mechanical elements necessary to take the mask image provided by source 22 through reticle 24, maintain or reduce the image as necessary, and provide the image to a photosensitive layer on wafer 28.
  • the stepper 26 will reduce the image from reticle 24 by lx, 5x, or lOx.
  • the resolution required of programmable reticle 24 preferably should be between about lx and lOx greater than the Une width required of integrated circuits fabricated on wafer 28.
  • the largest dimension of the elements (e.g., a diagonal) of the reticle should be at most about 10 micrometers.
  • the programmable reticles of this invention may be employed in any photolithography system, including projection scanners, projection step-and-repeat machines (steppers), and contact/proximity aligners.
  • a projection scanner the entire wafer is exposed in a succession of scans throught the reticle.
  • a contact/proximity aligner the programmable reticle is located directiy above (to within a few millimeters) or in contact with the wafer.
  • Exposure systems for photolithography are known in the art and are discussed in, for example, chapter 8 of "Integrated Circuit Fabrication Technology", second edition, by D. Elliott, McGraw-Hill Publishing Company, New York, New York (1989). This book is inco ⁇ orated herein by reference, in its entirety, for all purposes.
  • the wafer will be coated with a radiation sensitive photoresist. If a "positive" photoresist is employed, the layer of photoresist becomes bond-broken where the radiation strikes it, thereby rendering it largely soluble in appropriate solvents.
  • the mask is then immersed in or otherwise exposed to a solvent which dissolves those portions of the photoresist layer which are not cross-linked and leaves intact those portions of the photoresist layer which are cross-linked. Thereafter, the mask is exposed to an etchant for an underlying masking layer which either does not attack the remaining photoresist or attacks it very slowly whereby the masking layer may be removed every place where it is not protected by the retained portions of the photoresist.
  • a "negative" photoresist in contrast, becomes insoluble in appropriate solvent only in those regions where it is exposed to radiation.
  • both positive and negative photoresists can be employed with the present invention.
  • the fabrication process will typically involve repeating the steps of (a) programming the programmable reticle, (b) directing radiation onto the programmable reticle, (c) directing the radiation pattem onto the radiation sensitive layer, (d) removing regions of the radiation sensitive layer, and (e) transforming unmasked regions of the wafer to thereby form an integrated circuit.
  • conventional, non-programmable reticles may be used in conjunction with the programmable reticles of this invention.
  • a programmable reticle is reserved for forming interconnect masks, while non ⁇ programmable reticles are employed to form all other types masks. This situation may be appropriate when the programmable reticle is provided on a medium having resolution insufficient to mask the finer features of an integrated circuit.
  • one problem with conventional photolithography technology is that reticles must be replaced whenever a new mask is required in fabricating an integrated circuit. This requires that a new reticle be very carefully aligned between radiation source 22 and stepper 26. Otherwise, features at different levels of the integrated circuit will not be properly aligned, thereby rendering the integrated circuit useless.
  • One important advantage of the present invention is that this reticle aligned procedure is no longer necessary between each photolithography step. This is because programmable reticle 24 is always maintained in fixed alignment between radiation source 22 and stepper 26, regardless of the mask layout required by the process at hand.
  • the input to programmable reticle 24 is provided by one or more of a series of data generation stations such as stations 32, 34, and 36 shown in Figure 2. These stations, either alone or collectively, provide mask layout data which define the regions of wafer 28 to be illuminated. While such data can be provided in any format which defines the opaque and transparent regions of a mask, the data may conveniently be provided in the widely-used "GDS" format. Packages available for generating such data are available from various sources including Mentor Graphics of San Jose, California. These packages are commonly used at the "tape-out" stage of integrated circuit development.
  • the tape-out data in GDS format is provided to a reticle manufacturer. Thereafter, additional software is employed by the reticle developer to convert the tape-out data to a form that can control the position of an electron beam used in MEBS for generating the hght and dark regions of the reticle. In the present invention, such additional software is unnecessary.
  • the data provided by the stations 32, 34, and 36 specifies the coordinates for a group of rectangles (or other shapes) which together make up the mask.
  • This mask layout data is communicated to a server 40 containing the logic or protocol for queing, multiplexing, and otherwise providing the data to programmable reticle 24.
  • the server 40 also provides status information to the various stations. Server 40 ensures that conflicting information from two of stations 32, 34, and 36 is not sent to programmable reticle 24. For example, if a wafer is being exposed to a sequence of photolithography steps, server 40 ensures that each time a wafer is repositioned on support 30, the proper mask layout data for the "current level" of the integrated circuit is provided to programmable reticle 24.
  • the stations 32, 34, and 36, as well as server 40 may be personal computers, workstations, minicomputers, and mainframes. It should be understood that these machines may be manufactured by different vendors and may also run different operating systems such as MS- DOS, Microsoft Windows, Microsoft NT, various forms of UNIX, OS/2, MAC OS and others.
  • the stations 32, 34, and 36 are connected to server 40 via bi-directional lines and appropriate I/O circuitry.
  • the bidirectional lines may be any suitable media such as coaxial cable, twisted pair wiring, fiber optic line, radio channels, and the like.
  • the network resulting from the interconnection ofthe lines may assume a variety of topologies, including ring, bus, star, and may include a collection of smaller networks linked by gateways and bridges.
  • one or more of the stations is located remote from the programmable reticle. This is because the invention eliminates the need for a reticle formation step, thus allowing integrated circuit designers to provide layout data from their software directly to the programmable reticle.
  • the integrated circuit fabrication plant (employing the programmable reticle) is located some distance from the integrated circuit design facilities. In fact, the fabrication plant and the integrated circuit design facilities are often owned by a different enterprises.
  • fabrication administration 42 communicates with server 40, thereby allowing the decisions of server 40 to be influenced or overridden by current requirements of the fabrication plant.
  • the fabrication administrator 42 will take the form of a user interface and associated logic for changing parameters of the server 40.
  • step 8 preparation of a reticle of MEBS
  • step 6 preparation of a reticle of MEBS
  • step 6 preparation of a reticle of MEBS
  • any necessary changes detected at decision step 14 of the process can be accounted for at design step 6, and more or less immediately transmitted to wafer fabrication plant. This is especially beneficial in the case where only a very small change must be made to an existing reticle. Previously when confronted with this situation, a designer or manufacturer would have to have a reticle manufacturer make an entirely new reticle by MEBS to correct the small error.
  • the present invention also provides another advantage at the manufacturing stage.
  • the reticle need not be physically replaced between each new mask step.
  • the photolithography system processes wafers faster, thereby increasing throughput.
  • various regions of a given reticle may be provided with different mask layout pattems.
  • a reticle 50 is shown to include a first region 54 which provides the mask layout for dies of a first type on a given wafer.
  • regions 56, 58, 60, and 62 each provide differing mask layouts for dies of multiple other types.
  • This arrangement is particularly beneficial for custom chip manufactures which may supply many different integrated circuits to their various customers. For example, if three different customers each require a different custom chip in small volumes, chips for all three orders may be fabricated on single chip by providing a reticle with three regions, each specifying a mask layout for one of the three customers. The different regions of the reticle are isolated with a stepper field as employed in conventional steppers.
  • an arrangement such as that shown in Figure 3 also may be useful during the design and development of an integrated circuit. For example, it two or more designs require evaluation, mask layout pattems for each of those designs could be provided on the same reticle. Thus, on a single wafer, two or more designs could be fabricated and thereafter tested in parallel.
  • the present invention may be embodied in many other specific forms without departing from the spirit or scope of the invention.
  • the programmable photolithography systems of this invention may be employed to pattem materials other than semiconductor substrates.
  • the principles of this invention can be applied to forming printed circuit boards, micromachined components such as micron-scale valves in stainless steel, etc.
  • the invention can be employed in applications other than conventional "black and white" photolithography. For example, if a liquid crystal diode is employed in the programmable reticle, shades of gray and even colors may be employed to project additional information onto a radiation sensitive substrate.
  • a gray element will transmit a fraction of the radiation transmitted by a transparent element, thereby only partially exposing a corresponding region of the substrate.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)

Abstract

La présente invention concerne un réticule programmable destiné au transfert de motifs sur les tranches dans un système photolithographique. Ce réticule programmable est conçu comme un milieu pourvu d'une matrice bidimensionnelle d'éléments qui peuvent être commandés par voie électronique, chacun de ces éléments pouvant être rendu transparent ou opaque sous la commande d'un signal électronique. Ensemble, les éléments opaques du réticule définissent un dessin du masque. Le réticule programmable fait partie intégrante d'un système photolithographique complet constitué d'une source de rayonnement illuminant le réticule, d'un photorépétiteur dirigeant sur la tranche le rayonnement du réticule, et d'un contrôleur programmable servant à définir le masque à réaliser sur le réticule progammable. Pour la plupart des applications, les éléments des matrices bidimensionnelles ne dépassent pas dix microns environ.
PCT/US1996/012330 1995-07-31 1996-07-25 Systemes lithographiques a reticules programmables WO1997005526A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU66019/96A AU6601996A (en) 1995-07-31 1996-07-25 Lithography systems employing programmable reticles

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US50953095A 1995-07-31 1995-07-31
US08/509,530 1995-07-31

Publications (1)

Publication Number Publication Date
WO1997005526A1 true WO1997005526A1 (fr) 1997-02-13

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Application Number Title Priority Date Filing Date
PCT/US1996/012330 WO1997005526A1 (fr) 1995-07-31 1996-07-25 Systemes lithographiques a reticules programmables

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WO (1) WO1997005526A1 (fr)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000042630A1 (fr) * 1999-01-18 2000-07-20 Micronic Laser Systems Ab Systeme de production de panneaux d'affichage a grande surface presentant une precision amelioree
US6133986A (en) * 1996-02-28 2000-10-17 Johnson; Kenneth C. Microlens scanner for microlithography and wide-field confocal microscopy
WO2000072090A3 (fr) * 1999-05-20 2001-02-01 Micronic Laser Systems Ab Procede de reduction des erreurs en gravure
US6489984B1 (en) 1998-12-29 2002-12-03 Kenneth C. Johnson Pixel cross talk suppression in digital microprinters
US6498685B1 (en) 1999-01-11 2002-12-24 Kenneth C. Johnson Maskless, microlens EUV lithography system
US6624880B2 (en) 2001-01-18 2003-09-23 Micronic Laser Systems Ab Method and apparatus for microlithography
US6841787B2 (en) 2001-11-07 2005-01-11 Applied Materials, Inc. Maskless photon-electron spot-grid array printer
US6897941B2 (en) 2001-11-07 2005-05-24 Applied Materials, Inc. Optical spot grid array printer
DE10354112A1 (de) * 2003-11-19 2005-06-30 Infineon Technologies Ag Verfahren und Anordnung zur Reparatur von Speicherchips mittels Mikro-Lithographie-Verfahren
US10670972B2 (en) 2014-06-13 2020-06-02 Infineon Technologies Ag Method and apparatus for exposing a structure on a substrate
FR3152063A1 (fr) * 2023-08-09 2025-02-14 Commissariat A L'energie Atomique Et Aux Energies Alternatives Dispositif de photolithographie à motifs modulables

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4013466A (en) * 1975-06-26 1977-03-22 Western Electric Company, Inc. Method of preparing a circuit utilizing a liquid crystal artwork master
JPS63159853A (ja) * 1986-12-24 1988-07-02 Hitachi Ltd レテイクル
US5045419A (en) * 1986-11-20 1991-09-03 Kabushiki Kaisha Toshiba Pattern exposure/transfer method and pattern exposure/transfer mask apparatus

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4013466A (en) * 1975-06-26 1977-03-22 Western Electric Company, Inc. Method of preparing a circuit utilizing a liquid crystal artwork master
US5045419A (en) * 1986-11-20 1991-09-03 Kabushiki Kaisha Toshiba Pattern exposure/transfer method and pattern exposure/transfer mask apparatus
JPS63159853A (ja) * 1986-12-24 1988-07-02 Hitachi Ltd レテイクル

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6133986A (en) * 1996-02-28 2000-10-17 Johnson; Kenneth C. Microlens scanner for microlithography and wide-field confocal microscopy
US6489984B1 (en) 1998-12-29 2002-12-03 Kenneth C. Johnson Pixel cross talk suppression in digital microprinters
US6498685B1 (en) 1999-01-11 2002-12-24 Kenneth C. Johnson Maskless, microlens EUV lithography system
KR100710970B1 (ko) * 1999-01-18 2007-05-16 마이크로닉 레이저 시스템즈 에이비 향상된 정밀도를 갖는 대영역 디스플레이 패널 생산시스템
WO2000042630A1 (fr) * 1999-01-18 2000-07-20 Micronic Laser Systems Ab Systeme de production de panneaux d'affichage a grande surface presentant une precision amelioree
US6844123B1 (en) 1999-01-18 2005-01-18 Micronic Laser Systems Ab System for production of large area display panels with improved precision
WO2000072090A3 (fr) * 1999-05-20 2001-02-01 Micronic Laser Systems Ab Procede de reduction des erreurs en gravure
US6624880B2 (en) 2001-01-18 2003-09-23 Micronic Laser Systems Ab Method and apparatus for microlithography
US6841787B2 (en) 2001-11-07 2005-01-11 Applied Materials, Inc. Maskless photon-electron spot-grid array printer
US6897941B2 (en) 2001-11-07 2005-05-24 Applied Materials, Inc. Optical spot grid array printer
DE10354112A1 (de) * 2003-11-19 2005-06-30 Infineon Technologies Ag Verfahren und Anordnung zur Reparatur von Speicherchips mittels Mikro-Lithographie-Verfahren
DE10354112B4 (de) * 2003-11-19 2008-07-31 Qimonda Ag Verfahren und Anordnung zur Reparatur von Speicherchips mittels Mikro-Lithographie-Verfahren
US10670972B2 (en) 2014-06-13 2020-06-02 Infineon Technologies Ag Method and apparatus for exposing a structure on a substrate
FR3152063A1 (fr) * 2023-08-09 2025-02-14 Commissariat A L'energie Atomique Et Aux Energies Alternatives Dispositif de photolithographie à motifs modulables

Also Published As

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