WO1997048226A1

WO1997048226A1 - Image pickup device and controller for the same

Info

Publication number: WO1997048226A1
Application number: PCT/JP1997/002024
Authority: WO
Inventors: Kikue Shimokawa
Original assignee: Sony Corporation
Priority date: 1996-06-11
Filing date: 1997-06-11
Publication date: 1997-12-18
Also published as: US6603512B2; KR19990036310A; US20030090582A1; KR100445213B1; JP4006763B2

Abstract

Since an image pickup device is made to pick up the image of a travelling object (2) transferred along a transfer passage (1) during the effective exposure period corresponding to the pulse width of trigger pulse signals TRIG-IN generated from a pulse width variably setting circuit (5) by detecting the object (2) with a position sensor (3) and generating the signals TRIG-IN having a pulse width variably set by circuit (5) based on the detected output of the sensor (3), and then, supplying modulated synchronous signals TG-VD and TG-HD having reference timing which is made coincident with the trailing edge of the trigger pulse signal generated in accordance with the signals TRIG-IN and a shutter control signal SHCLTL having reference timing which is made coincident with the leading edge of the signals TRIG-IN to a CCD camera (10), the image pickup device can be synchronized to synchronous signals having a random period and can continuously and variably control a wide-range exposure period.

Description

Description Imaging device and control device therefor

TECHNICAL FIELD The present invention relates to an image pickup device for factory automation (FA) suitable for, for example, picking up an object moving at high speed, and a control device therefor.

Background Art The applicant of the present invention controls the charge accumulation time of an inter-line transfer (IT) type solid-state imaging device (CCD image sensor) without using a mechanical iris. An imaging device having an electronic shutter function for adjusting the exposure time is proposed in Japanese Patent Application Laid-Open No. 4-119977. In this imaging device, by using the electronic shutter function, the above-mentioned shutter speed can be varied according to the movement of the subject, which is particularly advantageous for capturing an image of a high-speed moving object.

Here, for example, in an imaging apparatus mainly used for FA and imaging a moving object, for example, a configuration as shown in FIG. 1 is adopted, and an object moving on a moving path 20 ° is used. 0 1 is the When it moves forward, the position detection unit 203 detects this and supplies a mouth-level trigger signal shown at time t 11 in FIG.

When the trigger signal is supplied, the shutdown signal generation circuit 204 supplies a shirt signal to the CCD control circuit 205 as shown at time t11 in FIG. When the CCD signal is supplied, the CCD control circuit 205 supplies a shirt control signal for sweeping off the electric charge accumulated in the photoelectric conversion unit of the CCD image sensor 206 to a super-flow drain. To stop. Thus, the accumulation of effective charges is started in each pixel of the photoelectric conversion unit of the CCD image sensor 206.

The CCD control circuit 205 is supplied with a vertical synchronization signal shown at time t11 to time t12 in FIG. 2C and a horizontal synchronization signal shown in FIG. 2D from the synchronization signal generation circuit 207. ing. When the CCD control circuit 205 is supplied with the horizontal control signal, the CCD control circuit 205 starts the horizontal synchronization signal shown in FIG. 2 (d) from the time t11 when the vertical synchronization signal falls as shown in FIG. 2 (c). After 9 pulses have been counted, the clock is counted several hundred times, and a readout signal is supplied to the CCD image sensor 206 at time t13 shown in FIG. 2 (e).

As a result, after the shirt control signal is supplied to the CCD image sensor 206 at time t11 in FIG. 2B, the CCD image sensor 206 is supplied to the CCD image sensor 206 at time t13 in FIG. 2E. Until the readout signal is supplied, a charge corresponding to the imaging light irradiated through the imaging lens 208 is accumulated in the CCD image sensor 206, and this time t11 to time t11 The period between 13 and 13 is the charge storage time. FIG. 2 (f) shows the vertical blanking period VBLK. The charge read from the CCD image sensor 206 is supplied to the signal processing circuit 209 as an imaging signal. The signal processing circuit 209 performs signal processing such as adding a synchronization signal to the imaging signal, and outputs this as a video signal via an output terminal 210. The video signal output via the output terminal 210 is supplied to, for example, a monitor. Thus, the state of the object 201 when the object 201 is moved can be analyzed.

Since the imaging apparatus for imaging such a moving object is mainly used for FA, the object 201 shown in FIG. 1 is moved at a high speed, for example, 1/10000 second or the like. In some cases, you may want to perform imaging with a high-speed shutdown.

However, in the above-described imaging apparatus, for example, after counting nine pulses of the horizontal synchronization signal from the fall of the vertical synchronization signal, the readout signal is supplied to the CCD image sensor at the timing of several hundred clocks in the evening. . That is, the output timing of the readout signal is fixed and set in advance based on the pixel array of the CCD image sensor.

Therefore, the charge storage time of the imaging device cannot be reduced to a time equal to or less than the time from the falling time of the vertical synchronization signal to the time at which the readout signal is output. For this reason, the conventional imaging apparatus could not perform imaging with a high-speed shutter such as 1/1000 second.

As described above, the imaging device starts accumulating effective charges in response to a trigger signal supplied from the position detection unit 203. That is, the above-described image pickup apparatus includes the trie supplied from the position detector 203. It operates according to the timing of the trigger signal, and for example, as shown in Fig. 3 (a), when the trigger signal is supplied at an arbitrary timing, after the predetermined charge accumulation time, that is, the exposure time, 3 The readout signal shown in (b) is supplied to the CCD image sensor, and the electric charge stored in each pixel of the photoelectric conversion unit is read out to the vertical transfer unit, and at the same time, the vertical synchronization signal V—SYNC is generated, As shown in c), the charge read out to the vertical transfer unit in synchronization with the generated vertical synchronization signal V—SYNC is output as an imaging signal via the horizontal transfer unit.

In addition, the applicant of the present application disclosed in Japanese Patent Application No. 6-1525502 that a modulation synchronization signal was generated based on a trigger signal generated at an arbitrary timing, thereby synchronizing a random period. We have proposed an imaging system that can perform high-speed imaging such as 1/1000 second in synchronization with a signal.

By the way, in the conventional imaging system as described above, imaging can be performed by high-speed shutdown, but the exposure period cannot be continuously variably set over a wide range.

Therefore, an object of the present invention is to provide an imaging apparatus and a control apparatus thereof that can be synchronized with a synchronization signal having a random period and that enable continuous variable control of an exposure period over a wide range.

Disclosure of the invention

The imaging device according to the present invention generates an electric charge according to the amount of incident light. Light receiving means, vertical transfer means for transferring the charge generated by the light receiving means, horizontal transfer means for outputting the charge transferred via the vertical transfer means, and a shirt control signal. A solid-state imaging device having a charge sweeping section for sweeping out the charge accumulated in the light receiving means; a trigger signal generating means for generating a trigger signal; and a pulse width based on an input timing of the trigger signal. A pulse width variable setting means for generating a trigger pulse signal which can be set variably, a shutdown control signal having a leading edge of the trigger pulse signal as a reference, and a trailing edge of the trigger pulse signal as a reference. A signal generating means for outputting a synchronization signal for timing; a read signal for transferring the electric charge accumulated in the light receiving means to the vertical transfer means; Drive signal generating means for outputting a transfer signal for outputting the stored electric charge via the horizontal transfer means based on the timing of the synchronization signal; and a shut-off control signal, the read signal, and the transfer signal. And a driving unit for driving the solid-state imaging device based on the above-mentioned method, wherein an image of a subject is taken in an effective exposure period corresponding to a pulse width of the trigger pulse signal.

Further, the image pickup apparatus according to the present invention includes: a light receiving unit that generates electric charge according to the amount of incident light; a vertical transfer unit to which the electric charge generated by the light receiving unit is transferred; A solid-state image pickup device having horizontal transfer means for outputting the stored charge, charge sweeping means for sweeping out the charge accumulated in the light receiving means in response to a control signal, and a trigger signal generating means for outputting a trigger signal Pulse width variable setting means for generating a trigger pulse signal whose pulse width can be variably set based on the input timing of the trigger signal, and a pulse width variable setting means for generating the trigger pulse signal based on the trailing edge timing of the trigger pulse signal. The first shutdown control signal Signal generating means for outputting a second shutdown control signal generated based on the timing of the leading edge of the trigger pulse signal, and a synchronization signal generated based on the timing of the trailing edge of the trigger pulse signal; Signal selection means for selectively outputting one of the first shutter control signal and the second shirt control signal; and a read signal for transferring the electric charge stored in the light receiving means to the vertical transfer means. Drive signal generating means for generating a transfer signal for outputting the electric charge read out to the vertical transfer means via the horizontal transfer means based on the synchronization signal; and selecting by the signal selecting means Driving means for driving the solid-state imaging device based on the obtained first or second shutdown control signal, the readout signal and the transfer signal.

The control device of the imaging apparatus according to the present invention includes: a detection unit that detects a subject and outputs a detection signal; and a pulse width variable setting unit that outputs a trigger pulse signal having a variable pulse width based on the detection signal. Signal generation means for generating a shutter control signal having a leading edge of the trigger pulse signal as a reference timing and a synchronization signal having a trailing edge of the trigger pulse signal as a reference timing, The synchronizing signal and the shutdown control signal are supplied to an imaging device to perform imaging during an exposure period corresponding to a pulse width of the trigger pulse signal.

Further, the control device of the imaging apparatus according to the present invention includes: a detecting unit that detects a subject and outputs a detection signal; and a pulse width variable unit that generates a trigger pulse signal having a variable pulse width based on the detection signal. Setting means for generating a trailing edge of the trigger pulse signal based on the timing.

(1) a second control signal generated based on the timing of the leading edge of the trigger pulse signal; Signal generating means for outputting a synchronization signal generated based on the timing of the trailing edge of the pulse signal; and selectively outputting one of the first shirt control signal and the second shut control signal. And a signal selection unit that supplies the synchronization signal and a first or second shirt control signal to the imaging device.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a configuration of a conventional imaging device.

FIG. 2 is a time chart showing the operation of the conventional imaging apparatus. FIG. 3 is a time chart showing an imaging operation in a conventional imaging device synchronized with a trigger pulse signal.

FIG. 4 is a block diagram showing a configuration of an imaging system to which the present invention is applied.

FIG. 5 is a circuit diagram showing a specific configuration example of a variable pulse width setting circuit in the above imaging system.

FIG. 6 is a time chart showing the operation of the variable pulse width setting circuit.

FIG. 7 is a schematic plan view showing the structure of a CCD image sensor used for the CCD camera in the above imaging system.

FIG. 8 is a block diagram showing a configuration of the above CCD camera.

FIG. 9 is a block diagram showing a configuration of a timing generator in the above CCD camera.

Figure 10 shows the H-counting time of the above timing generator. FIG. 3 is a block diagram illustrating a configuration.

FIG. 11 is a time chart showing the operation of the H-counter. FIG. 12 is a block diagram showing a configuration of a light enable signal generator of the image capturing device in the imaging system.

FIG. 13 is a block diagram illustrating a configuration of a modulated HD signal generation unit of the control device in the imaging system.

FIG. 14 is a circuit diagram showing a specific configuration of the polarity control circuit of the modulated HD signal generation unit.

FIG. 15 is a time chart showing the operation of the modulated HD signal generator.

FIG. 16 is a timing chart showing the operation of the write enable signal generation unit.

FIG. 17 is a time chart illustrating the operation of the control device. FIG. 18 is a time chart showing the operation of the timing generator.

FIG. 19 is a time chart showing the operation of the above timing generator during the vertical transfer stop period.

FIG. 20 is a block diagram showing another configuration of the CCD camera in the imaging system to which the present invention is applied.

FIG. 21 is a block diagram showing another configuration of the CCD camera in the imaging system to which the present invention is applied.

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the best mode for carrying out the present invention will be described in detail with reference to the drawings.

The imaging device and the control device according to the present invention are applied to, for example, an imaging system as shown in FIG.

An imaging system for detecting a moving object 2 transferred by a transfer path 1 including a belt conveyor or the like by a position sensor 3 and capturing a still image based on a detection output of the position sensor 3. The pulse width variable setting circuit 5 that generates the trigger pulse signal TRIG-IN based on the detection output of 3, and the video signal is obtained by performing imaging according to the trigger pulse signal TRIG-IN generated by the pulse width variable setting circuit 5. When an imaging device including a CCD camera 10 that outputs the image signal and a control device 20 that controls the operation of the CCD camera 10, and when the external synchronization signals EXT—HD and EXT—VD are supplied to the control device 20. In addition, it has an image capturing device 30 for capturing a video signal from the CCD camera 10.

In this imaging system, the position sensor 3 detects the moving object 2 transferred by the transfer path 1, and when the moving object 2 reaches the front of the position sensor 3, generates a trigger signal TRIG as the detection. Then, the trigger signal TRIG is supplied to the variable pulse width setting circuit 5. As shown in FIG. 5, a specific example of the configuration of the variable pulse width setting circuit 5 includes a monomultivibrator 5A and a semi-fixed resistor 5a externally connected to the monomultivibrator 5A. It consists of a time constant circuit 5B with a capacitor 5b. As shown in FIG. 6, the pulse width variable setting circuit 5 has a time constant circuit as shown in FIG. 6 when the mono multivibrator 5 A is triggered by the trigger signal TRIG from the position sensor 3. A trigger pulse signal TRIG-IN with a pulse width W corresponding to the time constant of the path 5B is generated. The pulse width W of the trigger pulse signal TRIG-IN according to the time constant of the time constant circuit 5B can be continuously variably set by the semi-fixed resistor 5a.

Then, the variable pulse width setting circuit 5 supplies the trigger pulse signal TRIG-IN generated according to the detection output signal from the position sensor 3 to the control device 20 and the image capturing device 30.

The control device 20 controls the timing of exposure in the CCD camera 10 based on the trigger pulse signal TRIG-IN supplied from the variable pulse width setting circuit, and is supplied from the image capturing device 30. The timing at which the CCD camera 10 outputs a video signal is controlled based on the write enable signal WE.

The CCD camera 10 captures an image of a moving object under the control of the control device 20, outputs a video signal at an evening based on the control of the control device 20, and supplies the video signal to the image capturing device 30. The image capturing device 30 captures a video signal from the CCD camera 10. Specifically, the control device 20 includes terminals C 1 and C 2 for supplying horizontal and vertical synchronization signals SG-HD and SG-VD to the CCD camera 10, and horizontal and vertical modulation synchronization for the CCD camera 10. Signals TG-HD, TG-V Terminals C3 and C4 for supplying VD, and a trigger pulse signal TRIG-IN based on detection of the moving object 2 by the position sensor 3 is supplied from the pulse width variable setting circuit 5 to the terminal C5. And a terminal C6 for supplying the CCD camera 10 with the shutdown control signal SHCTL generated based on the trigger pulse signal TRIG-IN supplied to the terminal C5. Further, the control device 20 supplies the terminals C 7 and C 8 to which the external synchronization signals EXT—HD and EXT—VD are supplied from the image capturing device 30 and the light enable signal WE from the image capturing device 30. the terminal C 9 is an external synchronization signal supplied from the image capture device 30 to the terminal C 7, C 8 EXT- HD, the synchronization signal S G-HD ₃ SG- VD based on the EXT-VD generated The synchronization signal generator 21 outputs the generated synchronization signals SG—HD and SG—VD to the terminals C 1 and C 2, and the synchronization signals SG—HD and SG—VD from the synchronization signal generator 21 Creates a modulation synchronization signal TG—HD, TG—VD based on the write enable signal WE, etc. supplied to C9, and outputs the created modulation synchronization signal TG—HD, TG-VD to terminals C3 and C4 The modulation HD that generates the shutdown control signal SHCTL based on the trigger pulse signal TRIG-IN supplied to the terminal C5 and outputs it to the terminal C6 And a No. creation unit 22.

The synchronizing signal generator 21 generates horizontal and vertical synchronizing signals SG—HD and SG—VD according to the external synchronizing signals EXT—HD and EXT—VD supplied from the terminals C 7 and C 8. , Supplied to the CCD camera 10 via the terminals CI and C2.

Further, the modulated HD signal generation section 22 outputs the synchronization signal SG—HD, SG—VD and the write enable signal WE according to the timing of the trigger pulse signal TGIG—IN supplied from the terminal C5. It generates a modulated horizontal sync signal TG-HD and a modulated vertical sync signal TG-VD based on, and supplies them to the CCD camera 10 via terminals C3 and C4. In addition, the modulated HD signal generator 22 changes the frequency of the modulated horizontal synchronization signal TG—HD according to the set shutdown speed, and In addition to controlling the exposure time of 0, that is, the charge accumulation time, the video signal from the CCD camera 10 is supplied to the image capturing device 30 at a timing synchronized with the light enable signal WE supplied to the terminal C 9. Thus, the output of the video signal from the CCD camera 10 is controlled.

The image capture device 30 includes terminals C 10 and C 11 for outputting external synchronization signals EXT—HD and EXT—VD, terminals C 12 for receiving a video signal from the CCD camera 10, A terminal C 13 for outputting the write enable signal WE, a terminal C 14 for receiving the trigger pulse signal TR IG—IN from the position sensor 3, and an external synchronization signal EXT—HD, EXT—VD. The sync signal generator 31 generates a memory 32 for storing the video signal supplied to the terminal C 12, and the write enable signal WE based on the trigger pulse signal TRIG—IN supplied to the terminal C 14. A write enable signal generating unit 33 that supplies the generated write enable signal WE to the control device 20 via the terminal C13.

Then, the synchronization signal generation section 31 generates an external horizontal synchronization signal EXT-HD and an external vertical synchronization signal EXT-VD, supplies them to the memory 32, and supplies the signals to the control device 20 via the terminals C10 and C11. To supply. The light enable signal generating section 33 generates a write enable signal WE in response to the trigger pulse signal TRIG-IN supplied to the terminal C14 and supplies the write enable signal WE to the memory 32. To the control device 20 via the The memory 32 stores a video signal supplied from the CCD camera 10 to the terminal C 12 in accordance with the write enable signal from the write enable signal creation unit 32. Further, the CCD camera 10 includes an interline transfer (IT) type CCD image sensor 11 having a structure as shown in FIG. 4, for example. The IT-type C CD image sensor 1 1, a light receiving unit SEVEN corresponding to each pixel of the light receiving portion S _0dd and even-numbered Fi one field corresponding to each pixel of the odd field, charges accumulated in the light receiving section SOD SEVE _N A vertical transfer unit VREG from which the data is read out, and a horizontal transfer unit H _REG that outputs the charge read out to the vertical transfer unit V _REG as an image signal in units of one horizontal line. By controlling the potential of the substrate formed below _DD and Seven, the charge accumulated in each photodetector SODD and SEVEN is swept away to that substrate, and the charge accumulation time is controlled. Has electronic shutdown function.

As shown in FIG. 8, the CCD camera 10 includes a vertical drive unit 12 that controls the transfer of charges in a vertical transfer unit from which charges stored in a light receiving unit of the CCD image sensor 11 are read. , A timing generator for generating a signal for driving the vertical drive unit 12 and the like

13 and a mass clock generator 14 for supplying a mass clock MCK of about 28.6 MHz to the timing generator 13. Also, this CCD camera 10 has the above-mentioned timing generator 1

The horizontal sync signal IT—HD / TG—HD and the vertical sync signal IT—VD / TG—VD to be supplied to 3 Switches 16a and 16b for switching between VD and supplied from terminals C1 and C2 The synchronization signal generator 17 that generates the internal synchronization signal IT-HD, IT-VD based on the horizontal synchronization signal SG-HD and the vertical synchronization signal SG-VD, and the imaging supplied from the CCD image sensor 11 Signal supplied from timing generator 13 Correlated double sampling (CDS) circuit (hereinafter referred to as “CDS”) that performs so-called correlated double sampling based on the sampling pulses SHP and SHD to remove noise such as reset noise contained in the image signal. It operates based on the CDS circuit 18 and the synchronization signal SYNC supplied from the synchronization signal generator 17, performs so-called process processing on the image signal supplied from the CDS circuit 18, and outputs it as a video signal in _c the CCD camera 1 0 and a processing section 19 which, by changing disconnect the sweep rate Tutsi 1 6 a, 1 6 b described above, the internal synchronizing signal iT one HD from the timing generator 13, IT1 Normal operation mode for capturing moving images based on VD, shutter control signal SHC TL supplied from terminal C6 and modulation synchronization signal TG—HD, TG one supplied to terminals C3 and C4. VD The mode is switched between the random shirt evening mode in which a still image is captured in accordance with the image.

Specifically, the synchronizing signal generator 17 generates an internal synchronizing signal IT-HD from the horizontal synchronizing signal SG-HD supplied from the terminal C1 and the vertical synchronizing signal SG-VD supplied from the terminal C2. , IT—Generate VD and supply it to switches 16a and 16b. The switch 16a selectively selects one of the modulated horizontal synchronizing signal TG—HD supplied from the terminal C 3 and the internal horizontal synchronizing signal IT—HD supplied from the synchronizing signal generator 17 as the timing generator 1. The switch 16b supplies one of the modulated vertical synchronization signal TG—VD supplied from the terminal C4 and the internal vertical synchronization signal IT—VD supplied from the synchronization signal generator 17. It is selectively supplied to the timing generator 13.

This imaging system operates in the random shutter mode. In this case, the horizontal and vertical synchronizing signals TG-HD and TG-VD supplied to terminals C3 and C4 are supplied to timing generator 13 via switches 16a and 16b. It has become.

In the timing generator 13, the modulated horizontal synchronizing signal TG-HD is predetermined from the evening of the falling edge of the modulated vertical synchronizing signal TG-VD synchronized with the trailing edge of the trigger pulse signal TRIG-IN. After counting, for example, nine, a read signal is formed for reading out the electric charge accumulated in the light receiving portion of the CCD image sensor 11 to the vertical transfer portion of the CCD image sensor 11. In addition, the CCD image sensor 11 includes a signal V_SUB for controlling the voltage of the substrate by the vertical drive unit 12, and a shutter control signal supplied from the modulated HD generation unit 22 of the control unit 20. By superimposing the charge sweeping pulse every evening of SHCTL, the charge accumulated in each pixel of the light receiving section is swept away to the substrate. Accordingly, the effective exposure period is the period from the evening when the electric charges accumulated in each pixel of the light receiving section are finally swept away to the substrate to the timing of the readout signal.

Here, the timing generator 13 is configured, for example, as shown in FIG. That is, the timing generator 13 includes an edge detection circuit 13 1 to which the vertical synchronization signal TG—VD / IT—VD selected by the switch 16 b is supplied, and an edge detection circuit 13. The output of 1 is supplied to the data input terminal. V—Counter 13 2, and the master clock MCK from the master clock generator 14 is inverted and supplied to the edge detection circuit 132. And a decoder 134 supplied with the output of the above V—counter 132. The horizontal sync signal TG-HD / I / selected by switch 16a, the edge detection circuit 135 supplied with HD, and the output of this edge detection circuit 135 supplied to the data input terminalされる 1 カ 1 マスタマスタマスタマスタマスタマスタマスタマスタマスタマスタマスタマスタマスタマスタマスタマスタマスタマスタマスタマスタ供給する供給する供給する供給する. And a decoder 138 to which the output of the above-mentioned counter 1336 is supplied.

The edge detecting circuit 131 is composed of two cascaded flip-flops 1311A and 13IB, each of which has a master clock MCK inverted by the above-mentioned amplifier 133 supplied to a clock input terminal, and each flip-flop. It comprises a gate 13 1 C to which the outputs of the flip-flops 13 1 A and 13 1 B are supplied, and the vertical synchronization signal TG—VD / IT—VD selected by the switch 16 b is applied to the flip-flop 13 1 A Is supplied to the input terminal. The edge detection circuit 13 1 detects the falling edge of the vertical synchronization signal TG—VD / IT—VD, and outputs the edge detection output of one clock width of the master clock MCK at the falling edge. Supplied to the data input terminal of the above V-counter. The decoder output of the decoder 138 is supplied to the clock input terminal of the V-counter 132. The V-counter 132 counts the decode output of the decoder 138 based on the edge detection output by the edge detection circuit 1331 and supplies the count output to the decoder 134. Further, the edge detection circuit 135 includes two cascade-connected flip-flops 135 A, 1 B in which the master clock MCK inverted by the above-described inverter 137 is supplied to a clock input terminal. 3 5 B and each The flip-flop 13 is composed of a gate 135 C to which the outputs of 135 A and 135 B are supplied, and the horizontal synchronizing signal TG—HD / IT—HD selected by the switch 16 a is applied to the flip-flop. Rip flop 1 35A data is supplied to the evening input terminal. The edge detection circuit 135 detects the falling edge of the horizontal synchronizing signal TG—HD / IT—HD, and outputs the edge detection output of one clock width of the master clock MCK at the timing of the falling edge. — Supply to the input terminal of 136. The decode input of the decoder 134 is supplied to the clear input terminal of the H-counter 136.

The H-counter 136 counts the master clock MCK based on the edge detection output supplied from the edge detection circuit 135 to the data input terminal, and supplies the count output to the decoder 138. Then, the decoder 138 decodes the count output of the H-counter 136 to generate various drive timing signals XV 1, XV 2, XV 3, XV 4, and the like of the CCD image sensor 11. Generate XSG1, XSG2, PG, HI, H2.

Here, as shown in FIG. 10, the H-counters 136 are, as shown in FIG. 10, counts 13 A and 136 B in which the edge detection output from the edge detection circuit 135 is supplied to the load terminal. A flip-flop 136C, 136D for supplying the edge detection output to the reset terminal; and a gate 136E, to which the respective outputs Q, Q of the flip-flops 136C, 136D are supplied. Become.

The counter 136 A is an N-ary counter for counting the master clock MCK, and is inverted by the above-mentioned member 137 in FIG. 1 The master clock MCK as shown in (b) is supplied to the clock input pin. When the period of the edge detection output shown in Fig. 11 (a) supplied to the load terminal is longer than N1, the count output is shown in Fig. 11 (c). As described above, one pulse A is supplied to the clock input terminal of the flip-flop 1336C at the time of N1 count. The flip-flop 1336C supplies the gate 1336E with an output Q as shown in FIG. 11 (d), whose state is inverted by the count output from the counter 136A.

The counter 136B is an N2 (N1 <N2) -decimal counter for counting the master clock MCK, and is shown in FIG. 11B, which is inverted by the impeller 137. Such a clock MCK is supplied to the clock input terminal. When the period of the edge detection output shown in Fig. 11 (a) supplied to the load terminal is longer than N2, the count 136B is used as the count output as shown in Fig. 11 (e). At the time of N2 count, one pulse B is supplied to the clock input terminal of the flip-flop 133D. The flip-flop 136D supplies the gate 136E with an output Q as shown in FIG. 11 (f) whose state is inverted by the count output from the counter 1336B.

The gate 136E is a logical product circuit, which outputs the logical product of the outputs Q and Q of the flip-flops 136C and 136D, and the falling edge of the edge detection output by the edge detection circuit 135. An output pulse XV as shown in Fig. 11 (g), which rises after N1 counts and falls after N2 counts from the evening of the night.

In the H-Counter 136 having such a configuration, the edge detection circuit described above is used. If the cycle of the edge detection output by 135 is shorter than N 1 (for example, when N 1 is 40 counts and the cycle of the page detection output is 4), each of the above flip flops 13 36 C, 1 3 6 D output Q, Q becomes both mouth first level, the output pulse XV also not exist _c also, the write enable signal generator 3 3 of the image capture device 3 0, for example 1 2 As shown in the figure, the external vertical synchronization signal EXT—VD is input to the clock terminal CK and reset by the trigger pulse signal TRIG—IN supplied from the variable pulse width setting circuit 5 via the terminal C14. It has a flip-flop 34 and monomultivibrators 35 and 36 that form pulses of a predetermined length from the output of the flip-flop 34. The trigger pulse signal TRIG-IN supplied to the terminal C14 is provided. The corresponding light enable signal WE Is generated and supplied to the memory 32 and to the control device 20 via the terminal C13.

On the other hand, as shown in FIG. 13, for example, as shown in FIG. 13, the modulated HD signal generator 22 of the controller 20 receives the trigger pulse signal TRIG-IN from the pulse width variable setting circuit 5 via the terminal C5. Polarity control circuit 221, a polarity designation switch 222 connected to the polarity control circuit 221, and two monomultivibrators 2 triggered by the output of the polarity control circuit 221. 23, 224, the modulated HD signal generator 225 supplied with the output of the mono multivibrator 223, the output of the modulated HD signal generator 225, and the mono multivibrator described above It is equipped with a shut-off switch 22 6 to which the output of the evening 222 is supplied.

The polarity control circuit 2 2 1 responds to the setting state of the polarity designation switch 2 2 2 The above-mentioned trigger pulse signal TRIG—outputs an inverted trigger pulse signal or a non-inverted trigger pulse signal in which the polarity of IN is inverted. The polarity control circuit 2 21 has, for example, a specific configuration shown in FIG. As shown, for example, it is composed of a polarity inversion circuit using an NPN transistor 221A and an emitter follower circuit using an NPN transistor 221B. The polarity control circuit 221 shown in FIG. 14 is configured such that the trigger pulse signal TRI G-IN is connected to the respective NPN transistors 22 1 A and 22 1 B via the polarity specifying switch 22 2. It is supplied selectively at each pace.

When the polarity specifying switch 222 is set so as to supply the trigger pulse signal TRIG-IN to the base of the NPN transistor 221A constituting the polarity inverting circuit, the NPN transistor 221 is set. An inverted trigger pulse signal obtained by inverting the polarity of the trigger pulse signal TRIG-IN by the polarity inverting circuit formed by the 2221A is output through the emitter follower circuit formed by the NPN transistor 22B. Also, the polarity specifying switch 222 is set so that the trigger pulse signal TRIG-IN is supplied to the base of the NPN transistor 221 B constituting the emitter follower circuit. In this state, the trigger pulse signal TRIG-IN is output as it is as a non-inverted trigger pulse signal via the emitter follower circuit of the NPN transistor 22B.

Here, the polarity designating switch 222 supplies the trigger pulse signal TRIG-IN to the base of the NPN transistor 221 A constituting the polarity inverting circuit in the random shirt mode. Is set to. As a result, in the random shirt evening mode, Fig. 15 From the trigger pulse signal TRIG-IN as shown in (a), an inverted trigger pulse signal as shown in FIG. 15 (b) is obtained by the polarity control circuit 221.

The mono multi pipe breaker 223 is triggered by a rising edge of the output of the polarity control circuit 221 and supplies a camera trigger signal having a predetermined pulse width to the modulated HD signal generator 225 as an output thereof. You. Therefore, in the random shirt mode, the rising edge of the inverted trigger pulse signal, that is, the trailing edge of the inverted trigger pulse signal, triggers the mono multivibrator 223 to trigger the camera as shown in Fig. 15 (c). The signal is supplied to the modulated HD signal generator 225.

The modulated HD signal generator 225 operates with reference to the rising edge, ie, the leading edge, of the camera trigger signal supplied from the mono multi-pibble signal 223, as shown in FIGS. 15 (d) and (e). The modulation synchronizing signals TG-VD and TG-HD as shown in Fig. 15 are output to terminals C3 and C4, and the first synchronizing signal as shown in Fig. 15 (f) synchronized with the rising edge of the camera trigger signal. The shutdown control signal is supplied to the shutdown switching switch 226.

Further, the mono multivibrator 224 is triggered by the falling edge of the output of the polarity control circuit 221, and outputs the second shirt control signal having a predetermined pulse width as the output of the mono multivibrator 224. Supply 226. Therefore, in the random shutdown mode, the falling edge of the inverted trigger pulse signal, that is, the leading edge of the inverted trigger pulse signal triggers the monomultivibration signal 224 to be synchronized with the leading edge of the inverted trigger pulse signal. Figure 15 (g) Such a second shirt evening control signal is supplied to the above shirt evening switching switch 226.

In the case of the normal random shutter mode in which the external control of the exposure time is not performed, the above-mentioned shutter switch 226 is the first shutter generated by the modulated HD signal generator 225. The control signal SHCTL1 is output to the terminal C6, and in the case of the random shirt evening mode in which the external control of the exposure time is performed, the second shutter evening control signal generated by the above-mentioned mono-multi-pibble one-hour 224 is output. Switching is set so that SHCLTL 2 is output to pin C 6.

Here, during the effective exposure period in the CCD camera 10, as described above, the shutter control signal S HCTL in which the electric charge accumulated in each pixel of the light receiving section is finally swept away in the sub-street In the normal random shutter mode in which the external control of the exposure time is not performed, the first shirt output as the shutter control signal SHCTL is used since the period from the timing of the read signal to the timing of the readout signal is not performed. The period from the rising edge of the evening control signal SHCTL1 to the rising edge of the read signal is T1. Note that the effective exposure period T1 in the normal random shirt evening mode is based on the timing of the falling edge of the modulated vertical synchronization signal TG—VD synchronized with the trailing edge of the trigger pulse signal TRIG—IN and the timing of the modulated horizontal synchronization signal TG — Since it is the time until the readout signal is formed by counting a predetermined number of HDs, the frequency can be variably set with high accuracy by changing the frequency of the modulated horizontal synchronization signal TG—HD.

Also, in the case of the random shutter mode in which the external control of the exposure time is performed, the second system generated by the mono multi-pibble 224 is used. Since the shutter control signal SHCTL2 is output as the shutter control signal SHCTL, the effective exposure period T3 is from the rising edge of the second shirt control signal SHCTL2 to the rising edge of the readout signal. This effective exposure period T 3 is the trigger pulse signal TR

Since this is equivalent to the sum of the period T2 corresponding to the pulse width W of the IG-IN and the effective exposure period T1 in the normal random shutter mode, the trigger pulse signal output from the variable pulse width setting circuit 5 is output. TRIG—

By varying the pulse width W of IN, it is possible to vary continuously over a wide range. Here, by setting the effective exposure period T1 to a minimum value (for example, 1/10000 second), the effective exposure period T3 can be externally controlled accurately from 1/10000 second to で only by setting the period T2. can do

When the trigger enable signal generator 33 of the image capture device 30 receives the trigger pulse signal TRIG-IN shown in FIG. 16A from the variable pulse width setting circuit 5, Figure supplied

16 Synchronized with the external vertical sync signal EXT—VD shown in (b)

A write enable signal WE shown in (d) is generated, and the write enable signal WE is supplied to the memory 32 and supplied to the modulated HD signal generation section 22 of the control device 20 via the terminal C9. I do.

Specifically, the flip-flop 34 of the write enable signal generator 33 is reset by the trigger pulse signal TRIG-IN supplied to the terminal C14, and the external vertical synchronization from the external synchronization signal generator 31 is output. Operates using the signal EXT-VD as a clock. That is, Figure 16

As shown in (c), the output P11 of the flip-flop 34 is the first external vertical signal after the trigger pulse signal TRIG-IN is supplied. Sync signal EXT—Low level during the period up to the end of IN.

Then, based on the timing of the rising edge of the output PI 1 of the flip-flop 34, the write enable signal WE is shaped by the mono multi-pibrators 35 and 36 and supplied to the memory 32 and the terminal C 13. Is done.

Further, the modulated HD signal generation unit 22 in the control device 20 includes a field determination signal FLD for identifying the fields of the synchronization signals SG—HD and SG—VD shown in FIG. Supplied from 1. Then, as shown in FIG. 17 (e), during the vertical transfer stop period for stopping the transfer of the vertical transfer register of the CCD image sensor 11, the CL / 4 signal is changed to the modulated horizontal synchronization signal TG-HD. And supplied to the CCD camera 10.

Fig. 17 (a) shows the trigger pulse signal TRIG-IN, Fig. 17 (b) shows the modulated vertical sync signal TG-VD, and Fig. 17 (f) shows the output from the CCD camera 10. The video signal VIDE〇 is shown.

Then, the sum of the electric charges read out to the vertical transfer unit as described above is obtained for each of two vertically adjacent pixels based on the control from the evening imaging generator 13. For example, when the horizontal synchronizing signal SG-HD shown in FIG. 18 (a) is supplied, the timing generator 13 generates the signals shown in FIGS. 18 (d) to (g) at predetermined time intervals. The vertical transmission signals XVI, XV2, XV3, and XV4 shown are generated. The charges transferred to the vertical transfer unit are transferred in the vertical direction by a well-known four-phase driving method.

Specifically, the timing generator 13 From the timing when SG-HD becomes low level, the approximately 28 MHz master clock MCK supplied from the master clock generator 14 shown in Fig. 18 (b) is divided by 2 into Fig. 18 (c). After the clock CL shown in (4) is counted 44 times, the vertical transfer signal XV1 is set to the high level. After that, the clock CL is further counted 27 times, and the vertical transfer signal XV1 is set to the low level. In the timing generator 13, the count of this clock CL is performed by the H-counter 136 which is reset by the above-mentioned horizontal synchronization signal SG-HD. The sync signal TG-HD contains the CL / 4 signal. Therefore, when the modulated horizontal synchronizing signal TG-HD is supplied to the evening generator 13, the clock CL is supplied during the period when the CL / 4 signal shown in FIG. 19B is supplied, that is, during the vertical transfer stop period. H—Counter 136 is reset every four periods of clock CL, and cannot count clock CL 44. As a result, in this timing 13, the vertical transfer signals XV 1 to XV 4 are not formed during the period when the CL / 4 signal is supplied as the modulated horizontal synchronization signal TG-HD. That is, during this period, the vertical transfer is stopped in the vertical transfer unit of the CCD image sensor 11. FIG. 19 (a) shows a normal horizontal synchronization signal SG-HD, and FIG. 19 (c) shows a vertical transfer signal XV1.

In this imaging system, as described above, by supplying the CL / 4 signal as the modulated horizontal synchronization signal TG-HD, the vertical transfer of charges in the vertical transfer unit of the CCD image sensor 11 is stopped. ing. Also, the modulated horizontal sync signal TG—CL as HD / As shown in Figure 17 (e), the supply of the four signals is based on the rise of the vertical synchronization signal VD immediately after the rise of the first field discrimination signal FLD after the supply of the write enable signal WE. Stopped at timing. The timing generator 13 starts generating the vertical transfer signals XV1 to XV4 at this timing, and transfers the generated vertical transfer signals XV1 to XV4 to the CCD image sensor via the vertical drive unit 12. 1 supply to 1.

Then, the vertical transfer unit of the CCD image sensor 11 sequentially transfers the charges based on the supplied vertical transfer signals XV 1 to XV′4 and outputs the charges as an imaging signal. As a result, the CCD image sensor 11 outputs an image signal synchronized with the vertical synchronization signal TG-VD of the first ODD field after the supply of the write enable signal WE.

In this imaging system, as described above, by controlling the timing of stopping the supply of the CL / 4 signal as the modulated horizontal synchronization signal TG-HD, the vertical transfer of the vertical transfer unit of the CCD image sensor 11 is performed. , And the timing of the output of the imaging signal is controlled in the evening according to the write enable signal WE from the image capturing device 30.

Here, in this imaging apparatus, as described above, the moving object 2 is detected by the position sensor 3 and the trigger pulse signal TR IG-IN is generated by the variable pulse width setting circuit 5 based on the timing. The imaging timing of the CCD camera 10 is controlled based on the trigger pulse signal TRIG-IN.

Then, the modulated HD signal creation unit 22 of the control device 20 Thus, based on the trigger pulse signal TRIG-IN supplied to the terminal C5, a shutdown control signal SHCTL having a predetermined pulse length is generated, and this shutdown control signal SHCTL is transmitted via the terminal C6. Supply to CCD camera 10.

Also, as described above, when the trigger pulse signal TRI G-IN is supplied from the terminal C5, the modulated HD signal generation unit 22 receives the external synchronization signals EXT—HD and EXT—VD from the synchronization signal generation unit 21. TG-HD and a modulated vertical synchronization signal TG-VD based on the write enable signal WE from the image capturing device 30 during the vertical transfer suspension period. Insert a CL / 4 signal into TG-HD to control to stop the charge transfer in the vertical transfer section of the CCD image sensor 11.

Then, the timing generator 13 of the CCD camera 10 reads out the load accumulated in the light receiving section of the CCD image sensor 11 to the vertical transfer section after the predetermined charge accumulation time ends. A read signal is supplied to the image sensor 11.

Also, as described above, the vertical transfer signals V 1 to V 4 are supplied to the vertical transfer section of the CCD image sensor 11 at the timing when the CL / 4 signal in the modulated horizontal synchronization signal TG—HD ends, and The image sensor 11 sequentially outputs the charges read to the vertical transfer unit as an image pickup signal. This imaging signal is converted into a video signal via the CDS 18 and the process processing section 19 and supplied to the image capturing device 30.

As is clear from the above description, in this imaging system, the timing at which a video signal is output from the CCD camera 10 based on the trigger pulse signal TRIG-IN from the variable pulse width setting circuit 5 is used as an image. It can be controlled based on the write enable signal WE from the capturing device 30. Therefore, in this imaging system, the timing for outputting the video signal from the 000 camera 10 can be set arbitrarily according to the convenience of the image capturing device 30. Therefore, the image capturing device 30 can reliably capture the image.

Further, in the imaging system shown in FIG. 4 described above, the switches 16a and 16b provided in the CCD camera 10 are switched so that the internal synchronization signal IT-HD, IT—Normal operation mode for capturing moving images based on VD, shirt control signal SHCTL supplied from terminal C6, and modulation synchronization signal TG—HD, TG supplied to terminals C3 and C4. — Random shutter mode that captures still images is switched according to VD. However, the above switches 16a and 16b are omitted, and the CCD camera 1 shown in FIG. As shown in FIG. 10, the terminals C 3 and C 4 are connected directly to the timing generator 13, and the modulation synchronization signal TG—HD is sent from the controller 20 to the timing generator 13 via the terminals C 3 and C 4. , TG—VD or normal sync signal SG—HD, sync signal SG—VDH So as to supplied, it may be to switch the operation mode by the controller 20 side.

Further, in the imaging system shown in FIG. 4 described above, the control of the operation of the CCD camera 10 is controlled by the control device 20 so that the video signal from the CCD camera 10 is captured into the image capturing device 30. However, the control device 20 and the CCD camera 10 do not need to be provided separately. For example, as in the CCD camera 120 shown in FIG. May be mounted on c That is, the CCD camera 120 shown in FIG. 18 includes a synchronizing signal generator 21 and a modulation signal generator 22 constituting the control device 20 in the imaging system shown in FIG. Terminals C 7 and C 8 to which the external synchronization signal EXT—HD, EXT—VD are supplied from the image capture device 30 described above, and light enable from the image capture device 30 The terminal C 9 to which the signal WE is supplied, and the external synchronization signal EXT—HD, EXT—VD supplied from the image capturing device 30 to the terminals C 7 and C 8, and the internal synchronization signal IT—HD and IT Synchronization signal generator 127 that generates VD and supplies this internal synchronization signal IT-HD, IT—VD to timing generator 13 via switches 16a and 16b, and generates this synchronization signal Modulation is performed based on the internal synchronization signals IT-HD, IT-VD from the unit 127 and the line enable signal WE supplied to the terminal C9. Creates signals TG-HD, TG—VD, and supplies modulated synchronization signals TG—HD, TG—VD to timing generator 13 via switches 16a and 16b. Part 22 is provided.

By using the CCD camera 120 having such a configuration, in the imaging system shown in FIG. 4 described above, the configuration is simplified by omitting the control device 20, and the CCD is used for the convenience of the image capturing device 30. The timing at which a video signal is output from the camera 120 can be controlled, and the image capturing device 30 can reliably capture an image.

Claims

The scope of the claims

1. Light receiving means for generating electric charge according to the amount of incident light, vertical transfer means for transferring the electric charge generated by the light receiving means, and outputting the electric charge transferred via the vertical transfer means A solid-state imaging device having a horizontal transfer unit, a charge sweeping unit for sweeping out the charge accumulated in the light receiving unit in response to a shutter control signal, a trigger signal generating unit for generating a trigger signal, Pulse width variable setting means for generating a trigger pulse signal whose pulse width can be variably set based on the trigger signal input timing, and a shutter for setting the leading edge of the trigger pulse signal as a reference timing A control signal; a signal generating means for outputting a synchronizing signal with the trailing edge of the trigger pulse signal as a reference timing; and a reading means for transferring the electric charge accumulated in the light receiving means to the vertical transfer means. Drive signal generating means for outputting an output signal and a transfer signal for outputting the electric charge read out to the vertical transfer means via the horizontal transfer means based on the timing of the synchronizing signal; A driving means for driving the solid-state imaging device based on the control signal, the readout signal, and the transfer signal; and imaging an object during an effective exposure period corresponding to a pulse width of the trigger pulse signal. An imaging device characterized by the following.

2. The signal generating means includes an internal synchronizing signal generating means for generating an internal synchronizing signal, a shut-off control signal using a leading edge of the trigger pulse signal as a reference, and a trailing edge of the trigger pulse signal as a reference. A modulating synchronizing signal generating means for generating a synchronizing signal to be used as a timing of the above, and a signal for selectively outputting one of the internal synchronizing signal and the synchronizing signal Selection means, wherein the drive signal generation means outputs the read signal and the transfer signal based on the internal synchronization signal or the synchronization signal selected by the signal selection means. The imaging device according to claim 1.

3. The imaging device according to claim 1, wherein the solid-state imaging device is an in-line one-line transfer type solid-state imaging device.

4. Light receiving means for generating electric charge according to the amount of incident light, vertical transfer means for transferring the electric charge generated by the light receiving means, and outputting the electric charge transferred via the vertical transferring means A solid-state imaging device having horizontal transfer means, a charge sweeping means for sweeping out the charge accumulated in the light receiving means according to a control signal, a trigger signal generating means for outputting a trigger signal, A pulse width variable setting means for generating a trigger pulse signal whose pulse width can be set variably based on the trigger signal input timing; and a pulse width variable setting means for generating a trigger pulse signal based on the trailing edge timing of the trigger pulse signal. The second shirt control signal generated based on the timing of the leading edge of the trigger pulse signal and the second shirt control signal generated based on the leading edge of the trigger pulse signal, and the timing of the trailing edge of the trigger pulse signal are generated based on the trigger signal. Signal generating means for outputting a synchronizing signal, signal selecting means for selectively outputting one of the first shutter control signal and the second shutter control signal, and transferring the electric charge accumulated in the light receiving means to the vertical direction. Drive signal generation means for generating, based on the synchronization signal, a read signal for transferring to the transfer means and a transfer signal for outputting the charge read to the vertical transfer means via the horizontal transfer means; Driving means for driving the solid-state imaging device based on the first or second shutter control signal, the readout signal, and the transfer signal selected by the signal selection means; An imaging device having:

5. The signal generating means includes an internal synchronizing signal generating means for generating an internal synchronizing signal, a shutoff control signal having a leading edge of the trigger pulse signal as a reference timing, and a trailing edge of the trigger pulse signal. A modulation synchronization signal generating means for generating a synchronization signal serving as a reference timing; and a signal selection means for selectively outputting one of the internal synchronization signal and the synchronization signal. Outputting the readout signal and the transfer signal based on the internal synchronization signal or the synchronization signal selected by the signal selection means.

4. The imaging device according to 4.

6. The imaging device according to claim 4, wherein the solid-state imaging device is an in-line one-line transfer type solid-state imaging device.

7. Detecting means for detecting a subject and outputting a detection signal, variable pulse width setting means for outputting a trigger pulse signal having a variable pulse width based on the detection signal, and a leading edge of the trigger pulse signal Signal generating means for generating a shutter control signal having a reference timing of the trigger signal and a synchronization signal having a trailing edge of the trigger pulse signal as a reference timing, wherein the synchronization signal and the shutter control signal are provided. A control device for an imaging device, characterized in that the imaging device is supplied to the imaging device to perform imaging during an exposure period according to the pulse width of the trigger pulse signal.

8. The signal generating means includes an internal synchronizing signal generating means for generating an internal synchronizing signal, a shutoff control signal using the leading edge of the trigger pulse signal as a reference timing, and a trailing edge of the trigger pulse signal. A modulation synchronizing signal generating means for generating a synchronizing signal as a reference timing; and a signal for selectively outputting one of the internal synchronizing signal and the synchronizing signal. 8. The control device for an imaging device according to claim 7, further comprising a selection unit.

9. Detection means for detecting a subject and outputting a detection signal;

Pulse width variable setting means for generating a trigger pulse signal having a variable pulse width based on the detection signal; and first shutoff control for generating a trailing edge of the trigger pulse signal based on evening timing. And a second signal generated based on the timing of the leading edge of the trigger pulse signal.

Signal generating means for outputting a shut-off control signal of (2) and a synchronizing signal generated based on the timing of the trailing edge of the trigger pulse signal; Signal selecting means for selectively outputting one of the shut-off control signals, and supplies the synchronization signal and the first shirt control signal or the second shut-off control signal to the imaging device. A control device for an imaging device, comprising:

10. The signal generating means includes: an internal synchronizing signal generating means for generating an internal synchronizing signal; a shutter control signal having a leading edge of the trigger pulse signal as a reference timing; and a trailing edge of the trigger pulse signal. Modulation synchronizing signal generating means for generating a synchronizing signal having a reference timing, and signal selecting means for selectively outputting one of the internal synchronizing signal and the synchronizing signal. The control device for an imaging device according to claim 9, wherein