WO1994013008A3 - Forming a layer - Google Patents
Forming a layer Download PDFInfo
- Publication number
- WO1994013008A3 WO1994013008A3 PCT/GB1993/002359 GB9302359W WO9413008A3 WO 1994013008 A3 WO1994013008 A3 WO 1994013008A3 GB 9302359 W GB9302359 W GB 9302359W WO 9413008 A3 WO9413008 A3 WO 9413008A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- article
- forming
- recess
- methods
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
- H01L21/67167—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers surrounding a central transfer chamber
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76837—Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76882—Reflowing or applying of pressure to better fill the contact hole
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Physical Vapour Deposition (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940702401A KR940704056A (en) | 1992-11-19 | 1993-11-16 | Layer Formation Method |
EP94900220A EP0621980A1 (en) | 1992-11-19 | 1993-11-16 | Forming a layer |
JP6512877A JPH07503106A (en) | 1992-11-19 | 1993-11-16 | formation of layers |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9224260.1 | 1992-11-19 | ||
GB929224260A GB9224260D0 (en) | 1992-11-19 | 1992-11-19 | Forming a layer |
Publications (2)
Publication Number | Publication Date |
---|---|
WO1994013008A2 WO1994013008A2 (en) | 1994-06-09 |
WO1994013008A3 true WO1994013008A3 (en) | 1994-07-21 |
Family
ID=10725348
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/GB1993/002359 WO1994013008A2 (en) | 1992-11-19 | 1993-11-16 | Forming a layer |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP0621980A1 (en) |
JP (1) | JPH07503106A (en) |
KR (1) | KR940704056A (en) |
GB (1) | GB9224260D0 (en) |
TW (1) | TW296461B (en) |
WO (1) | WO1994013008A2 (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB9414145D0 (en) * | 1994-07-13 | 1994-08-31 | Electrotech Ltd | Forming a layer |
US5932289A (en) * | 1991-05-28 | 1999-08-03 | Trikon Technologies Limited | Method for filling substrate recesses using pressure and heat treatment |
KR960026249A (en) * | 1994-12-12 | 1996-07-22 | 윌리엄 이. 힐러 | High Pressure, Low Temperature Semiconductor Gap Filling Process |
KR960042974A (en) * | 1995-05-23 | 1996-12-21 | ||
JPH09102541A (en) * | 1995-10-05 | 1997-04-15 | Mitsubishi Electric Corp | Semiconductor device and its manufacture |
JPH09115866A (en) | 1995-10-17 | 1997-05-02 | Mitsubishi Electric Corp | Semiconductor device manufacturing method |
US6171957B1 (en) | 1997-07-16 | 2001-01-09 | Mitsubishi Denki Kabushiki Kaisha | Manufacturing method of semiconductor device having high pressure reflow process |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5011793A (en) * | 1990-06-19 | 1991-04-30 | Nihon Shinku Gijutsu Kabushiki Kaisha | Vacuum deposition using pressurized reflow process |
EP0430040A2 (en) * | 1989-11-27 | 1991-06-05 | Micron Technology, Inc. | Method of forming a conductive via plug or an interconnect line of ductile metal within an integrated circuit using mechanical smearing |
EP0526889A2 (en) * | 1991-08-06 | 1993-02-10 | Nec Corporation | Method of depositing a metal or passivation fabric with high adhesion on an insulated semiconductor substrate |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61222459A (en) * | 1985-03-28 | 1986-10-02 | 日本電気株式会社 | Medical irradiation field projector |
JPS63294839A (en) * | 1987-05-27 | 1988-12-01 | Nec Corp | Ct simulator for radiotherapy |
JPS6491199A (en) * | 1987-10-02 | 1989-04-10 | Toshiba Corp | Operation controller using voice recognizing function |
DE8713524U1 (en) * | 1987-10-08 | 1989-02-02 | Siemens AG, 1000 Berlin und 8000 München | Third generation computer tomograph |
JPH01218466A (en) * | 1988-02-26 | 1989-08-31 | Shimadzu Corp | Thermotherapy device |
JPH01280444A (en) * | 1988-04-30 | 1989-11-10 | Toshiba Corp | X-ray ct scanner device |
JPH0268042A (en) * | 1988-09-02 | 1990-03-07 | Yokogawa Medical Syst Ltd | Table device for medical equipment |
JPH0422344A (en) * | 1990-05-17 | 1992-01-27 | Toshiba Corp | Control device for operation of medical photographing apparatus |
-
1992
- 1992-11-19 GB GB929224260A patent/GB9224260D0/en active Pending
-
1993
- 1993-11-16 WO PCT/GB1993/002359 patent/WO1994013008A2/en not_active Application Discontinuation
- 1993-11-16 JP JP6512877A patent/JPH07503106A/en active Pending
- 1993-11-16 EP EP94900220A patent/EP0621980A1/en not_active Withdrawn
- 1993-11-16 KR KR1019940702401A patent/KR940704056A/en not_active Withdrawn
- 1993-12-28 TW TW082111086A patent/TW296461B/zh active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0430040A2 (en) * | 1989-11-27 | 1991-06-05 | Micron Technology, Inc. | Method of forming a conductive via plug or an interconnect line of ductile metal within an integrated circuit using mechanical smearing |
US5011793A (en) * | 1990-06-19 | 1991-04-30 | Nihon Shinku Gijutsu Kabushiki Kaisha | Vacuum deposition using pressurized reflow process |
EP0526889A2 (en) * | 1991-08-06 | 1993-02-10 | Nec Corporation | Method of depositing a metal or passivation fabric with high adhesion on an insulated semiconductor substrate |
Non-Patent Citations (1)
Title |
---|
H.HIGUCHI ET AL.: "PLANAR TECHNOLOGY FOR MULTILAYER METALLIZATION", EXTENDED ABSTRACTS, vol. 80, no. 1, May 1980 (1980-05-01), PRINCETON, NEW JERSEY US, pages 456 - 458 * |
Also Published As
Publication number | Publication date |
---|---|
JPH07503106A (en) | 1995-03-30 |
EP0621980A1 (en) | 1994-11-02 |
GB9224260D0 (en) | 1993-01-06 |
KR940704056A (en) | 1994-12-12 |
WO1994013008A2 (en) | 1994-06-09 |
TW296461B (en) | 1997-01-21 |
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