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WO1993018201A1 - Procede d'implantation du plasma et equipement - Google Patents

Procede d'implantation du plasma et equipement Download PDF

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Publication number
WO1993018201A1
WO1993018201A1 PCT/US1993/001788 US9301788W WO9318201A1 WO 1993018201 A1 WO1993018201 A1 WO 1993018201A1 US 9301788 W US9301788 W US 9301788W WO 9318201 A1 WO9318201 A1 WO 9318201A1
Authority
WO
WIPO (PCT)
Prior art keywords
target
wafer
target electrode
plasma
ion
Prior art date
Application number
PCT/US1993/001788
Other languages
English (en)
Inventor
Susan B. Felch
Charles Burleigh Cooper, Iii
Terry Tienyu Sheng
Stephen S. Rosenblum
Original Assignee
Varian Associates, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Varian Associates, Inc. filed Critical Varian Associates, Inc.
Publication of WO1993018201A1 publication Critical patent/WO1993018201A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32357—Generation remote from the workpiece, e.g. down-stream
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/48—Ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32412—Plasma immersion ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/3266—Magnetic control means
    • H01J37/32678—Electron cyclotron resonance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32697—Electrostatic control
    • H01J37/32706—Polarising the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/223—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
    • H01L21/2236—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase from or into a plasma phase

Definitions

  • This invention relates to the field of semiconductor processing and particularly to the field of doping of semiconductors by ion implantation.
  • Materials called semiconductor are the basis of most of modern electronic devices.
  • Semiconductor materials such as silicon, have a crystalline structure in which each atom is tightly bound to its neighbor such that the material is a very poor conductor of electricity because none of the carriers of electricity are mobile. Some electrons can become conductors if they acquire sufficient energy to break free.
  • the conductivity of a pure semiconductor is called the intrinsic conductivity, but the material is not useful as an electronic device in that form.
  • a small amount of certain types of impurity are needed to be added into its crystal lattice. Even an extremely small amount of such impurities will provide a tremendous increase in the number of current carriers.
  • the impurity selected is an atom of the same size as the semiconductor atom having a different number of electrons in its outer or valence band so as to result in a chemically bonded structure where the unbonded electron or hole can move around in the structure with very little energy expenditure.
  • This process of adding an impurity has typically been called "doping". Early doping was accomplished by simultaneously placing a plurality of semiconductor wafers in a high temperature diffusion furnace into which has been added gas containing dopant which was diffused into the semiconductor. This process worked well for most early so called discrete transistors.
  • PI 3 Plasma Immersion Ion Implantation
  • This system locates the target within the plasma in the center of the plasma chamber and away from the chamber walls.
  • the object of our invention is to provide an improved implantation apparatus with the uniformity of scanning implantation but with the simplicity of PI 3 .
  • a further object is to provide simple implantation apparatus with shallow junction capability, having high throughput, as well as better uniformity and control of implant.
  • the present invention provides a configuration which applies a pulsed uniform electric field over one surface of a large area target electrode so that a large cross section ion beam is available.
  • the target electrode upon which the substrate workpiece is to be mounted is placed on the downstream chamber wall as opposed to being immersed in the plasma, and a unipolar, variable pulse width high voltage is applied to the target.
  • This configuration also permits a symmetrical plurality of vacuum pumping ports to be placed completely around the target to facilitate symmetrical removal of reaction products and neutral species during implantation.
  • ground shielding which is symmetrically placed close to and distributed around the sides of the target electrode, so that secondary plasma formation is eliminated.
  • FIG. 1 is a schematic representation of a cross section of a portion of our inventive implanter.
  • FIG. 2 is a cross section of an embodiment of our invention.
  • FIG. 3A is a bottom view of our implanter showing the symmetry of the vacuum ports.
  • FIG. 3B is section BB side view of FIG 3A exhaust manifold.
  • FIG. 4A, 4B and 4C are alternate embodiments of workpiece and electrode configurations.
  • the electrons 54 in the charged gas in the close vicinity of the electrode 13 are repelled first, because they are lighter.
  • This sheath extends to a distance of 1 to 3 cm above the target electrode 13.
  • the positive ions in this region 53 are accelerated by the large area negative potential of the target along the straight field lines pe ⁇ endicular to the planar face of the electrode 13. Since the workpiece wafer 12 is situated between the gases and the electrode 13, the positive ions impact and implant into the wafer.
  • All of the exhaust ports are preferably connected as shown in bottom views, FIGS. 3A and 3B, to a centrally located manifold 37 in order to have a uniform and symmetrical pressure gradient in the vicinity of the target electrode for uniform distribution of plasma components and the reaction products.
  • Very high voltage gradients exist in the gap 32 between the side wall of the target electrode 13 and the cylindrical ground shield 22.
  • This gap 32 must be large enough so that an arc is not struck in this space and so that the region is cleanable. It is preferable to round the corners of the target 13 and shield 22 near the mouth of the gap 32 to avoid field emission and spurious arcing. Our embodiment will not arc below 6KV DC. Also, the gap 32 must be narrow enough so that ions cannot be trapped in the gaps to sustain a plasma when the accelerating voltage pulse is supplied to the target 13. This gap distance is related to the chamber pressure and should be less than the order of the mean free path for the ion involved at the pressure employed. In our configuration, the gap 32 is on the order of 0J25 inches.
  • a standard microwave generator 5 is coupled to the ECR plasma source 2 via waveguide 7 containing an RF tuner 6 such as a stub tuner.
  • the microwaves enter into the plasma source through RF window quartz disk 8.
  • an alumina layer 9 could be coated on disk 8 or ' it could be part of the alumina chamber liner 10, as shown.
  • BF 3 is the source gas, sputtering of contaminants from the stainless steel walls of the plasma chamber may occur which will introduce contaminant ions into the implant.
  • Magnet coils 3 and 4 are shown surrounding the plasma source 2 and provide the uniform strong axial fixed magnetic field necessary to sustain electron cyclotron resonance in the chamber 2.
  • An electron in motion in a magnetic field is acted upon by the field to produce force on the electron at right angles to the direction of motion of the electron.
  • the radius of curvature is an inverse function of the intensity of the magnetic field.
  • the liner 10 is preferably made from alumina but could be made from any material which does not contain elements which should not be co-implanted.
  • the liner material could be made of a material that is resistant to sputtering or chemical etching by the plasma species. In the case of processing with BF 3 , resistant materials include oxides (i.e. alumina), nitrides (i.e., boron nitride or silicon nitride) or carbides (i.e., silicon carbide).
  • the liner could be of a sacrificial material which has measurable etch rates in the presence of the plasma species, but does not contribute undesirable impurities which could be co-implanted.
  • sacrificial materials include carbon (i.e., graphite, diamond) or poly-crystalline silicon.
  • the plasma source chamber could be coated with films of liner materials which could be applied by plasma spraying, CVD, sputtering or evaporation. Alternatively, the plasma, source chamber walls could be protected by a separate piece of material composed entirely of or coated with the desired liner material.
  • Magnet 19 is a coil which may be used to assist in canceling the magnetic fields in the vicinity of the target electrode to improve plasma ion density uniformity at electrode wafer interface.
  • Chamber 1 is an axially symmetrical structure with the target electrode 13 mounted to the wall of the chamber opposite from the mouth of plasma source 2.
  • Slit valve 27 permits the loading and unloading of the chamber by a transfer arm (not shown) without requirement for pumping down from atmosphere each time a new wafer is introduced in the chamber. It is believed that our system will be able to treat 30 six-inch wafers per hour when fully automated for doping time per wafer of 1 minute. During wafer doping only the four ports 20, 21, 20a and 21a are pumped. At other times the chamber can be pumped through high conductance side port 38 at greater speed to provide a lower base pressure. During loading of a wafer the pressure is below 1 X 10" 6 torr in the chamber. We find that this helps eliminate deposition on the wafer and coimplantation of contaminating elements.
  • the target electrode 13 is electrically isolated from the chamber walls by a dielectric ring vacuum seal 23 and mechanically clamped
  • Viable implantation can be carried out over the following range of conditions.
  • the flow rate of BF 3 gas can be varied between 4 to 50 SCCM giving pressures of 0.3-2.0 mtorr and the microwave power varied from 550 to 1400 W.
  • Pulse voltages can be varied from 1-30/x seconds at voltages from 1-5KV. Pulse repetition rate can be varied from DC to 10,000 Hz.
  • Our chambers can be oriented with the wafer facing up, down, or sideways with respect to gravity. We believe that the quality of the finished product is independent of the gravity orientation of the wafer during implantation so long as the gas flows in a straight line from the source region to the wafer and passes around the wafer as it is being pumped out.
  • ECR electrospray generating
  • Other types of remote plasma generation providing high density, low plasma potential such as inductively coupled plasma generation, helicon or hollow cathode sources could also be employed.
  • FIG. 2 we have determined that ion bombardment of the aluminum target electrode 13 in the region of the periphery 39 of the wafer 12 could be responsible for the introduction Of contamination of the wafer being implanted.
  • FIG. 4A, 4B and 4C show other configurations of the target 13 which improve or overcome this difficulty.
  • FIG. 4A we show a shortening of the target electrode 13a so that its periphery exactly matches the periphery of the overlying target 12. Obviously this configuration will reduce the extent of the target 13a which is directly bombarded by ions.
  • FIG. 4B illustrates our preferred target electrode embodiment which is a configuration where the target electrode 13b has a diameter which is considerably smaller than the diameter of the wafer 12a. This configuration also avoids contamination by shielding the electrode from direct ion bombardment.
  • the target electrode 13c has a very much larger planar surface area 43 than the frontal surface area of the wafer 44.
  • the passivation layer 40 would preferably be a silicon wafer of larger diameter than wafer 12 in order to minimize contamination from direct ion bombardment of the target electrode.
  • the wafer 12 may simply be held by gravity on the top surface of the wafer 40 or by use of a vacuum chuck. To improve the heat transfer across wafer 40, its surfaces top and bottom should be very smooth.
  • the temperature of the wafer 12 is not normally a problem because of the lower implantation energy employed in our invention than in comparison to raster scanning implantation techniques.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Analytical Chemistry (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physical Vapour Deposition (AREA)

Abstract

L'invention se rapporte à un procédé et un appareil destiné à l'implantation d'ions à faible puissance et forte dose qui ne requiert pas d'immersion de la tranche cible (12) dans le plasma (50) et qui produit une résistance uniforme de la feuille, un rendement élevé et un contrôle précis de la jonction à une profondeur inférieure à 100 nm.
PCT/US1993/001788 1992-03-02 1993-03-01 Procede d'implantation du plasma et equipement WO1993018201A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US84435392A 1992-03-02 1992-03-02
US07/844,353 1992-03-02

Publications (1)

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WO1993018201A1 true WO1993018201A1 (fr) 1993-09-16

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Cited By (51)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5449920A (en) * 1994-04-20 1995-09-12 Northeastern University Large area ion implantation process and apparatus
US5508227A (en) * 1994-06-08 1996-04-16 Northeastern University Plasma ion implantation hydrogenation process utilizing voltage pulse applied to substrate
EP0710977A1 (fr) * 1994-11-04 1996-05-08 Hitachi, Ltd. Procédé et dispositif de traitement de surface
DE19538903A1 (de) * 1995-10-19 1997-04-24 Rossendorf Forschzent Verfahren zur Implantation von Ionen in leitende bzw. halbleitende Werkstücke mittels Plasmaimmersionsionenimplantation (P III) und Implantationskammer zur Durchführung des Verfahrens
US5654043A (en) * 1996-10-10 1997-08-05 Eaton Corporation Pulsed plate plasma implantation system and method
US5661043A (en) * 1994-07-25 1997-08-26 Rissman; Paul Forming a buried insulator layer using plasma source ion implantation
US5672541A (en) * 1995-06-14 1997-09-30 Wisconsin Alumni Research Foundation Ultra-shallow junction semiconductor device fabrication
US5693376A (en) * 1995-06-23 1997-12-02 Wisconsin Alumni Research Foundation Method for plasma source ion implantation and deposition for cylindrical surfaces
EP0747927A3 (fr) * 1995-06-06 1998-02-18 Varian Associates, Inc. Appareil pour l'obtention d'une uniformité de doses dans un procédé d'implantation d'ions à dopage par plasma (PLAD)
DE19702294A1 (de) * 1997-01-23 1998-07-30 Rossendorf Forschzent Modulator für die Plasmaimmersions-Ionenimplantation
RU2122602C1 (ru) * 1996-08-28 1998-11-27 Акционерное общество "АвтоВАЗ" Способ вакуумной ионно-плазменной обработки
US5883016A (en) * 1994-06-08 1999-03-16 Northeastern University Apparatus and method for hydrogenating polysilicon thin film transistors by plasma immersion ion implantation
US5911832A (en) * 1996-10-10 1999-06-15 Eaton Corporation Plasma immersion implantation with pulsed anode
US6113735A (en) * 1998-03-02 2000-09-05 Silicon Genesis Corporation Distributed system and code for control and automation of plasma immersion ion implanter
US6120660A (en) * 1998-02-11 2000-09-19 Silicon Genesis Corporation Removable liner design for plasma immersion ion implantation
US6153524A (en) * 1997-07-29 2000-11-28 Silicon Genesis Corporation Cluster tool method using plasma immersion ion implantation
RU2161662C2 (ru) * 1999-03-29 2001-01-10 Слепцов Владимир Владимирович Способ обработки поверхности твердого тела
US6213050B1 (en) 1998-12-01 2001-04-10 Silicon Genesis Corporation Enhanced plasma mode and computer system for plasma immersion ion implantation
US6274459B1 (en) 1998-02-17 2001-08-14 Silicon Genesis Corporation Method for non mass selected ion implant profile control
US6338313B1 (en) 1995-07-19 2002-01-15 Silison Genesis Corporation System for the plasma treatment of large area substrates
EP1144717A4 (fr) * 1998-12-01 2003-04-16 Silicon Genesis Corp Mode, procede et systeme ameliores au plasma d'implantation ionique par immersion dans le plasma
US6893907B2 (en) 2002-06-05 2005-05-17 Applied Materials, Inc. Fabrication of silicon-on-insulator structure using plasma immersion ion implantation
US6939434B2 (en) 2000-08-11 2005-09-06 Applied Materials, Inc. Externally excited torroidal plasma source with magnetic control of ion distribution
US7037813B2 (en) 2000-08-11 2006-05-02 Applied Materials, Inc. Plasma immersion ion implantation process using a capacitively coupled plasma source having low dissociation and low minimum plasma voltage
US7094316B1 (en) 2000-08-11 2006-08-22 Applied Materials, Inc. Externally excited torroidal plasma source
US7094670B2 (en) 2000-08-11 2006-08-22 Applied Materials, Inc. Plasma immersion ion implantation process
US7109098B1 (en) 2005-05-17 2006-09-19 Applied Materials, Inc. Semiconductor junction formation process including low temperature plasma deposition of an optical absorption layer and high speed optical annealing
WO2006099438A1 (fr) * 2005-03-15 2006-09-21 Varian Semiconductor Equipment Associates, Inc. Ajustement de profil dans l'implantation ionique par immersion plasma
US7137354B2 (en) 2000-08-11 2006-11-21 Applied Materials, Inc. Plasma immersion ion implantation apparatus including a plasma source having low dissociation and low minimum plasma voltage
US7166524B2 (en) 2000-08-11 2007-01-23 Applied Materials, Inc. Method for ion implanting insulator material to reduce dielectric constant
US7183177B2 (en) 2000-08-11 2007-02-27 Applied Materials, Inc. Silicon-on-insulator wafer transfer method using surface activation plasma immersion ion implantation for wafer-to-wafer adhesion enhancement
US7223676B2 (en) 2002-06-05 2007-05-29 Applied Materials, Inc. Very low temperature CVD process with independently variable conformality, stress and composition of the CVD layer
US7244474B2 (en) 2004-03-26 2007-07-17 Applied Materials, Inc. Chemical vapor deposition plasma process using an ion shower grid
US7288491B2 (en) 2000-08-11 2007-10-30 Applied Materials, Inc. Plasma immersion ion implantation process
US7291360B2 (en) 2004-03-26 2007-11-06 Applied Materials, Inc. Chemical vapor deposition plasma process using plural ion shower grids
US7294563B2 (en) 2000-08-10 2007-11-13 Applied Materials, Inc. Semiconductor on insulator vertical transistor fabrication and doping process
US7303982B2 (en) 2000-08-11 2007-12-04 Applied Materials, Inc. Plasma immersion ion implantation process using an inductively coupled plasma source having low dissociation and low minimum plasma voltage
US7312162B2 (en) 2005-05-17 2007-12-25 Applied Materials, Inc. Low temperature plasma deposition process for carbon layer deposition
US7312148B2 (en) 2005-08-08 2007-12-25 Applied Materials, Inc. Copper barrier reflow process employing high speed optical annealing
US7320734B2 (en) 2000-08-11 2008-01-22 Applied Materials, Inc. Plasma immersion ion implantation system including a plasma source having low dissociation and low minimum plasma voltage
US7323401B2 (en) 2005-08-08 2008-01-29 Applied Materials, Inc. Semiconductor substrate process using a low temperature deposited carbon-containing hard mask
US7335611B2 (en) 2005-08-08 2008-02-26 Applied Materials, Inc. Copper conductor annealing process employing high speed optical annealing with a low temperature-deposited optical absorber layer
US7422775B2 (en) 2005-05-17 2008-09-09 Applied Materials, Inc. Process for low temperature plasma deposition of an optical absorption layer and high speed optical annealing
US7429532B2 (en) 2005-08-08 2008-09-30 Applied Materials, Inc. Semiconductor substrate process using an optically writable carbon-containing mask
US7428915B2 (en) 2005-04-26 2008-09-30 Applied Materials, Inc. O-ringless tandem throttle valve for a plasma reactor chamber
US7430984B2 (en) 2000-08-11 2008-10-07 Applied Materials, Inc. Method to drive spatially separate resonant structure with spatially distinct plasma secondaries using a single generator and switching elements
US7465478B2 (en) 2000-08-11 2008-12-16 Applied Materials, Inc. Plasma immersion ion implantation process
US7479456B2 (en) 2004-08-26 2009-01-20 Applied Materials, Inc. Gasless high voltage high contact force wafer contact-cooling electrostatic chuck
US7687787B2 (en) 2005-03-15 2010-03-30 Varian Semiconductor Equipment Associates, Inc. Profile adjustment in plasma ion implanter
WO2015048122A1 (fr) * 2013-09-27 2015-04-02 Varian Semiconductor Equipment Associates, Inc. Revêtement de sic dans un implanteur ionique
CN114446495A (zh) * 2022-01-18 2022-05-06 大连理工大学 一种面向等离子体带收集脱落物的倒置样品台

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Cited By (63)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5449920A (en) * 1994-04-20 1995-09-12 Northeastern University Large area ion implantation process and apparatus
US5883016A (en) * 1994-06-08 1999-03-16 Northeastern University Apparatus and method for hydrogenating polysilicon thin film transistors by plasma immersion ion implantation
US5508227A (en) * 1994-06-08 1996-04-16 Northeastern University Plasma ion implantation hydrogenation process utilizing voltage pulse applied to substrate
US5661043A (en) * 1994-07-25 1997-08-26 Rissman; Paul Forming a buried insulator layer using plasma source ion implantation
US6231777B1 (en) 1994-11-01 2001-05-15 Hitachi, Ltd. Surface treatment method and system
EP0710977A1 (fr) * 1994-11-04 1996-05-08 Hitachi, Ltd. Procédé et dispositif de traitement de surface
MY115990A (en) * 1994-11-04 2003-10-31 Hitachi Ltd Surface treatment method and system
KR100389642B1 (ko) * 1994-11-04 2003-10-08 가부시끼가이샤 히다치 세이사꾸쇼 표면처리방법및표면처리장치
CN1069439C (zh) * 1994-11-04 2001-08-08 株式会社日立制作所 表面处理的方法和系统
EP0747927A3 (fr) * 1995-06-06 1998-02-18 Varian Associates, Inc. Appareil pour l'obtention d'une uniformité de doses dans un procédé d'implantation d'ions à dopage par plasma (PLAD)
US5672541A (en) * 1995-06-14 1997-09-30 Wisconsin Alumni Research Foundation Ultra-shallow junction semiconductor device fabrication
US5693376A (en) * 1995-06-23 1997-12-02 Wisconsin Alumni Research Foundation Method for plasma source ion implantation and deposition for cylindrical surfaces
US5988103A (en) * 1995-06-23 1999-11-23 Wisconsin Alumni Research Foundation Apparatus for plasma source ion implantation and deposition for cylindrical surfaces
US6338313B1 (en) 1995-07-19 2002-01-15 Silison Genesis Corporation System for the plasma treatment of large area substrates
DE19538903A1 (de) * 1995-10-19 1997-04-24 Rossendorf Forschzent Verfahren zur Implantation von Ionen in leitende bzw. halbleitende Werkstücke mittels Plasmaimmersionsionenimplantation (P III) und Implantationskammer zur Durchführung des Verfahrens
RU2122602C1 (ru) * 1996-08-28 1998-11-27 Акционерное общество "АвтоВАЗ" Способ вакуумной ионно-плазменной обработки
US5654043A (en) * 1996-10-10 1997-08-05 Eaton Corporation Pulsed plate plasma implantation system and method
US5911832A (en) * 1996-10-10 1999-06-15 Eaton Corporation Plasma immersion implantation with pulsed anode
DE19702294A1 (de) * 1997-01-23 1998-07-30 Rossendorf Forschzent Modulator für die Plasmaimmersions-Ionenimplantation
US6207005B1 (en) 1997-07-29 2001-03-27 Silicon Genesis Corporation Cluster tool apparatus using plasma immersion ion implantation
US6153524A (en) * 1997-07-29 2000-11-28 Silicon Genesis Corporation Cluster tool method using plasma immersion ion implantation
US6321134B1 (en) 1997-07-29 2001-11-20 Silicon Genesis Corporation Clustertool system software using plasma immersion ion implantation
US6120660A (en) * 1998-02-11 2000-09-19 Silicon Genesis Corporation Removable liner design for plasma immersion ion implantation
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