WO1992011699A1 - Digital-to-analogue conversion - Google Patents

Abstract

A practical power amplifier for directly producing analogue power from a digital input includes an oversampling filter (14) for increasing the pulse repetition rate and a noise shaping filter (18) for reducing the word length. Before the digital samples are fed to a pulse width modulator (20) their value is adjusted so that the output pulses produced by the modulator (20) approximate to those which would have been produced had a continuously varying representation of the digital samples been sampled by a periodic comparison waveform and then fed to the modulator. The detector (16) thereby enables the modulator to have the low distortion characteristics usual of naturally sampled analogue modulation, whilst the circuit accepts the regularly occurring digital samples from conventional digital devices.

Description

DIGITAL-TO-ANALOGUE CONVERSION

The present invention relates to a method of converting a series of digital samples to analogue signals, a method of converting such digital samples to analogue power, and to apparatus for performing these methods.

Although increasingly audio systems utilise digital techniques, there is at present no apparatus available which directly converts a series of digital samples to analogue power. In looking to provide such a device, the present applicants have developed a novel method of digital to analogue conversion.

According to a first aspect of the present invention there is provided a method of converting a series of digital samples to analogue signals, the digital samples being at a rate above the Nyquist rate, the method comprising the steps of reducing the length of n-bit words formed by said digital samples, and modulating the digital samples to produce a series of output pulses having a characteristic related to the value of said digital samples, and wherein the method further comprises adjusting the value of said digital samples prior to said modulation. A method of the invention utilises digital samples at a rate above the Nyquist rate to ensure that good system resolution is obtained. When the digital samples are to be received from a source such as a prerecorded compact disc, for example, it would be possible to store on the compact disc preprocessed digital information to have the increased rate required for later retrieval. However, where the digital samples are provided at or below the Nyquist rate, the method preferably comprises the step of increasing the rate of successive digital samples to the rate above the Nyquist rate. The rate may be increased, for example, by interpolating additional samples between said digital samples.

For example, .the value of said digital samples may be adjusted by interpolating said digital samples to form a representation thereof and adjusting the samples to values of said representation.

In an embodiment said interpolation is arranged to form a linear representation of said samples. In an alternative embodiment, an Nth order polynomial approximation to a continuously varying representation of said digital samples is formed. Preferably, the digital samples represent analogue signals having frequencies in the audio range, and wherein the output pulses contain audio range frequencies. In some embodiments, the digital samples may be regularly occurring. Preferably, said method further comprises filtering the digital samples to attenuate noise in the audio band.

In a preferred embodiment, the word length of the n- bit words formed by said digital samples is reduced by dropping the least significant bits of each word.

Although the use of a high repetition rate for the digital samples enhances the system resolution, the high rate can cause difficulties for subsequent processing steps. These difficulties may be overcome, without loss of resolution, by reducing the word length of the digital samples, for example, by way of a noise shaper.

According to a further aspect of the present invention there is provided a method of converting a series of digital samples to analogue signals, the method comprising modulating the digital samples to produce a series of output pulses having a characteristic related to the value of said digital samples, and wherein the method further comprises adjusting said digital samples prior to said modulation, said digital samples being adjusted such that said characteristic of the output pulses produced by said modulation otf said adjusted digital samples is the same as would' have been produced had a continuously varying representation of said digital samples been sampled by a comparison waveform and then modulated. The method of the present invention enables high quality digital to analogue conversion enabling substantially no harmonic distortion of the input for the band of interest. Naturally, this is important for the audio band, where most of the experiments have taken place, but the method may be used in other frequency bands as required.

In an embodiment, the method further comprises the steps of forming an approximation, accurate to a system resolution, of the time at which said continuously varying representation and said comparison waveform coincide, and utilising said time approximation to adjust said digital samples.

Additionally and/or alternatively, the method may further comprise the steps of forming an approximation, accurate to a system resolution, of the value of said continuously varying representation when it coincides with said comparison waveform, and utilising said value approximation to adjust said digital samples.

In an embodiment an Nth order polynomial approximation to said continuously varying representation is formed from N + 1 adjacent digital samples. For example, N may be equal to 3 such that said polynomial approximation is formed from four adjacent digital samples.

The method may further comprise the steps of forming an estimate of the time at which said continuously varying representation and said comparison waveform coincide by forming an average value of two or more adjacent digital samples, and forming the difference between said comparison waveform and said polynomial representation at the time estimated.

In an embodiment, a derivative of said difference may additionally be formed, and a better estimate of the time may then be formed from said first time estimated and from the difference formed at that first time and its derivative.

Preferably an iterative process is utilised to form a better estimate or estimates of the time at which the comparison waveform and the continuously varying representation coincide, and wherein the value of the comparison waveform or of the continuously varying representation at the estimated time is set to be, or be representative of, said adjusted digital samples.

In an embodiment, said digital samples are modulated by way of a uniformly sampling pulse width modulator, and wherein said digital samples are adjusted prior to modulation to emulate the values of the analogue waveform corresponding to said digital samples which coincide with said periodic comparison waveform.

The method may further comprise the step of increasing the repetition rate of the digital samples, for example, to a rate above the Nyquist rate. For example, the repetition rate may be increased by interpolating additional samples between said digital samples.

In an embodiment in which said digital samples form n- bit words, the method may further comprise reducing the length of said words, for example, by dropping the least significant bits of each word.

Additionally and/or alternatively, the digital samples may be filtered to attenuate noise in the audio band. In preferred embodiments of the methods defined above said digital samples are regularly occurring and form n-bit words. The methods may further comprise the steps of dropping the least significant bits of each word, applying the dropped bits to a filter for attenuating audio band noise, and feeding back the filtered bits to the regularly occurring digital samples.

In a preferred embodiment, the digital samples are modulated by a pulse width modulator such that the width of pulses of said series of output pulses is related to, for example, proportional to, the value of said adjusted digital samples. For example, the method may further comprise performing the pulse width modulation by applying the adjusted digital samples to a counter arranged in response to each sample, to output a pulse whose width is proportional to the value of the sample.

In one embodiment, an output latch is turned on by way of a first counter, the value of the digital samples is counted in a second counter, and the output latch is turned off by way of said second counter after a delay determined by the count of said second counter.

In an embodiment, the method further comprises applying said series of output pulses to a low pass filter. This further step is utilised when the method is to provide a method of digital to analogue conversion. The invention also extends to a method of converting digital signals to analogue power using a method of converting a series of digital samples to analogue signals as defined above, and the method further comprises applying said series of output pulses to a power amplifier to produce an analogue power output representative of said digital samples.

The method may further comprise applying said series of output pulses to a power switch to produce a modulated output voltage. Additionally and/or alternatively the method may further comprise filtering said modulated output voltage to reduce unwanted components.

According to a further aspect of the present invention there is provided an apparatus for converting a series of digital samples to analogue signals, the apparatus comprising shaping means for receiving successive digital samples at a rate above the Nyquist rate and as n-bit words and being arranged to reduce the length of said words, and modulating means coupled to receive said digital samples and arranged to produce a series of output pulses having a characteristic related to the value of said digital samples, and the apparatus further comprising adjusting means arranged to adjust said digital samples prior to their modulation by said modulating means.

The digital samples may be stored at the rate above the Nyquist rate. However, where the samples are retrieved, for example, from a conventional compact disc, the apparatus further comprises input means for receiving successive digital samples, and interpolating means coupled to said input means and arranged to increase the rate of said digital samples above the Nyquist rate, said shaping means being coupled to receive increased rate digital samples from said interpolating means. In a preferred embodiment, said interpolating means is arranged to increase said rate by interpolating additional samples between said received successive digital samples.

In an embodiment, said adjusting means may be arranged to adjust the value of said digital samples by interpolating said digital samples to form a representation thereof and adjusting the samples to the values of said representation. For example, in one embodiment, the apparatus comprises means for obtaining the values of N + 1 adjacent digital samples, and means for computing said representation of said samples. Said computing means may be arranged to form a linear representation of said samples. Alternatively, said computing means may be arranged to form an Nth order polynomial approximation to a continuously varying representation of said digital samples.

The invention also extends to an apparatus for converting a series of digital samples to analogue signals, the apparatus comprising input means for receiving digital samples, modulating means coupled to said input means to receive said digital samples, and arranged to produce a series of output pulses having a characteristic related to the value of said digital samples, and the apparatus further comprising adjusting means arranged to adjust said digital samples prior to their modulation by said modulating means, wherein said adjusting means is arranged to adjust said digital samples such that said characteristic of the output pulses produced by said modulation of said adjusted digital samples is the same as would have been produced had a continuously varying representation of said digital samples been sampled by a comparison waveform and then modulated. Apparatus of the invention may be used as any conventional D/A converter in any appropriate field.

In an embodiment, said adjusting means is arranged to adjust said digital samples by forming an approximation, accurate to a system resolution, of the time at which said continuously varying representation and said comparison waveform coincide, the time approximation being utilised to adjust said digital samples.

Preferably, said adjusting means is arranged to adjust said digital samples by forming an approximation, accurate to a system resolution, of the value of said continuously varying representation when it coincides with said comparison waveform, the value approximation being utilised to adjust said digital samples.

The apparatus may further comprise means for obtaining the values of N + 1 adjacent digital samples, and means for computing an Nth order polynomial approximation to said continuously varying representation from the values obtained. For example, N may be equal to 3 such that said polynomial approximation is formed from four adjacent digital samples.

Preferably, the apparatus further comprises means for forming an average value of two or more adjacent digital samples to provide a time estimate, and means for determining the difference between said comparison waveform and said polynomial approximation at the time estimated. The apparatus may comprise means for forming a derivative of said difference, and means for forming a better time estimate from said first time estimate and from the difference determined at that first time and its derivative. Preferably, the apparatus has means for performing one or more iterations on the time estimate, and means for adjusting said digital samples to the value of the comparison waveform or of the continuously varying representation at the estimated time. The adjusting means of each apparatus defined above may be implemented by way of an integrated circuit on a chip, or by any other suitable means. The components of said adjusting means may be formed in silicon or other semiconductor materials or may be provided in software. Preferably, the adjusting means comprises storage means, and processor means. For example, the values of adjacent digital samples may be stored in said storage means and used in computational software routines under the control of said processor means. The apparatus may further comprise means coupled to the input means and arranged to increase the repetition rate of the digital samples, for example, to a rate above the Nyquist rate. For example, the repetition rate increasing means may comprise interpolation means for interpolating additional samples between said digital samples. In one preferred embodiment, the interpolation means is an oversampling filter. In an embodiment in which repetition rate increasing means are provided, a noise shaping filter may be coupled to receive the digital samples at the increased repetition rate.

The apparatus may comprise means coupled to receive said digital samples and arranged to attenuate noise in the audio band.

In an embodiment said modulating means comprises a digital pulse width modulator. For example, said digital pulse width modulator may comprise a main counter for receiving data from said adjusted digital samples and outputting a series of output pulses. Preferably, said counter is arranged such that the width of said output pulses is proportional to the value of said adjusting digital samples. In one embodiment, said digital pulse width modulator further comprises an output latch and a precounter arranged to turn on said output latch, the main counter being arranged to turn off said output latch. In an embodiment, the apparatus further comprises filtering means connected to an output of said modulating means. ^■ The filtering means is generally provided when the apparatus is to be used as a digital to analogue converter. The invention also extends to a digital power amplifier for converting digital samples to analogue power and comprising apparatus as defined above. The digital power amplifier further comprises amplifier means coupled to an output of said apparatus for receiving said output pulses. There is clearly a need for a digital power amplifier for amplifying digital signals in the audio band, for example received from compact disc players and the like. Of course, the power amplifier may be used in any situation where there is a need to power loads to high accuracy. In a preferred embodiment said amplifier means comprises power switch means coupled to a filter.

Embodiments of the present invention will hereinafter be described, by way of example, with reference to the accompanying drawings, in which:- Figure 1 shows schematically a conceptual circuit for producing either of two modes of pulse width modulation.

Figures 2a, 2b, and 2c show waveforms from the operation of the pulse width modulator of Figure 1,

Figure 3 shows a block diagram of a power amplifier of the present invention,

Figure 4 shows part of input waveforms of a pulse width modulation process to illustrate the difference between naturally sampled and uniformly sampled PWM,

Figure 5 illustrates a computation technique to be used by apparatus of the invention,

Figure 6 shows a flow diagram illustrating the implementation of an algorithm of apparatus of the invention.

Figure 7 shows a block diagram of one embodiment of a noise shaping filter of apparatus of the invention. Figures 8a and 8b show graphically the transfer function of filters to illustrate the selection of a noise shaping filter for apparatus of the invention,

Figure 9 shows a block diagram of one embodiment of a digital pulse width modulator of apparatus of the present invention.

Figure 10 shows schematically a power switch for apparatus of the invention,

Figure 11 shows schematically an alternative embodiment of a power switch to operate class AD switching. Figure 12 shows an output spectrum for a single tone input' roduced by apparatus of the present invention,

Figure 13 shows a similar output spectrum produced on alternative apparatus, Figure 14 shows an output spectrum for a twin tone input produced by apparatus of the present invention, and

Figure 15 shows for comparison an output spectrum for the same input produced by alternative apparatus.

Increasingly, audio systems utilise digital techniques to take advantage of the accuracy and freedom from degradation by noise that such techniques provide. However, at present audio systems must convert the digital samples to an analogue voltage or current which is used to drive an analogue power amplifier to reproduce the sound. For some while, the present applicants have been seeking to produce a truly digital power amplifier able to convert digital audio data directly into analogue power. They identified that pulse width modulation (PWM) is suitable for digital power amplification with no intermediate digital to analogue conversion stage. There are many classifications of PWM, but the most fundamental concerns the mode of sampling. Basically, there are two modes, natural sampling and uniform sampling, and although at first sight the results of the two sampling modes appear somewhat similar, it has been found that the differences are crucial.

Figure 1 shows schematically a conceptual circuit for producing either of the two modes of pulse width modulation. In this respect, the circuit comprises a comparator 2 having one input receiving the output from a sawtooth generator 4. The high frequency sawtooth waveform cw(t) is the comparison or sampling waveform. For natural sampling, an input signal in(t) to be modulated is applied directly to the other input of the comparator 2. The input waveform in(t) could be a sinusoid or other continuously varying or analogue signal.

Figure 2a shows part of the input signal in(t) and of the comparison waveform cw(t). The comparator 2 is arranged to turn on and produce a positive output whenever the comparison waveform cw(t) is at its minimum, and to drop to zero and turn off whenever the comparison waveform cw(t) crosses the input waveform in(t). The resultant naturally sampled pulse modulated waveform NS, is shown in Figure 2b. In this respect, it will be apparent that the width of each of the pulses of the waveform NS is representative of the amplitude of the input waveform at the time when the input waveform in(t) crosses the comparison waveform cw(t). More significantly it is important to recognise that the pulse widths of the waveform NS are based on irregularly spaced samples of the input in(t). Thus, a change of state of the waveform NS occurs whenever the input waveform in(t) and the comparison waveform cw(t) cross.

Of course, the signal available from a digital audio system is not a continuously varying input signal as in(t), but instead a series of digital samples or bits. In many applications these digital samples are regularly spaced or occurring and for the purpose of the following explanation it is assumed that the samples are regularly occurring. However, the invention is equally applicable when the samples do not arrive regularly.

An input of regularly occurring digital samples is represented in Figure 1 by the imposition of a sample and hold device 6 which is clocked by, and therefore operates at the same frequency as, the sawtooth generator 4. If the same input signal in(t) is fed to the sample and hold device 6 the output of the device is a series of samples, each having a value which is held for a pulse period. Figure 2a shows a value In(n), In(n+1) .... for each pulse period and shows an output signal s(t) which could be the output of the device 6. It will be appreciated that the samples In illustrated in Figure 2a, rather than being the output of the device 6, could be the actual samples output from a digital audio system. In the representation shown in Figure 2a, for clarity, the output s(t) of the sample and hold device 6 is shown to be held at a signal value In(n), In(n+1) .... for each period which differs from the value of the signal in(t) at the beginning of each period of the sawtooth waveform cw(t). Normally, however, the circuit shown in Figure 1 would produce a signal s(t) which has its value held at the level of the signal in(t) at the start of each pulse period.

The modulation performed by the comparator 2 can be a trailing edge modulation, and as stated above, the comparator 2 is turned on whenever the comparison waveform cw(t) is at its minimum value, and is turned off when the input waveform s(t) crosses the comparison waveform cw(t). The uniformly sampled waveform US produced is shown in Figure 2c. Although at first sight, the waveforms NS and US shown in Figures 2b and 2c may appear very similar, they are quite 'fundamentally different since the values of the input waves in(t) or s(t) which determine the trailing edges occur at different times. Thus, the samples of the input s(t) which are used to determine the uniformly sampled PWM pulse width are regularly spaced in time, whereas the samples of the input waveform in(t) which are used to determine the naturally sampled PWM pulse width are irregularly spaced in time. In initial work to provide a device for converting digital audio data in a serial or parallel sequence of bits directly into analogue power to drive a loudspeaker, it was proposed to use uniformly sampled PWM. It was recognised that such uniformly sampled PWM has a different modulation spectrum than the naturally sampled form, and that this in its turn results in higher levels of harmonic distortion than with the naturally sampled form. However, at that time, it was thought quite impossible to make use of the naturally sampled PWM due to the uniform sampling inherent in digital audio data streams. Theoretical considerations and simulations found uniformly sampled PWM to be an inherently non-linear process inevitably producing distortion, but it was also found that with falling signal levels or with increased pulse repetition rates, increasing linearity could be achieved.

Figure 3 shows schematically a practical power amplifier which uses pulse width modulation, but which does not exhibit the problems which have been identified for uniformly sampled pulse width modulation. In this respect, the amplifier can be considered to comprise a digital to analogue converter 8 which may or may not be used to drive a power amplifier 10. The D/A converter 8 comprises an input terminal 12 to which a sequence of bits in either serial or parallel form is applied. An oversampling filter 14 increases the sampling rate as discussed below and its output is fed to a "cross-point" detector 16. In its turn, the output of the detector 16 is fed to a noise shaper 18 whose output is connected to a uniform digital pulse width modulator 20. As specified above, the output of the modulator 20 may be applied to the power amplifier 10, or may be used to provide an analogue output. In this latter case, the output of the modulator 20 would generally be applied to an analogue low-pass filter (not shown).

The circuits, 14, 18 and 20 will be described and discussed hereinbelow. In this respect, it has been found that for uniformly sampled PWM the circuits 14 and 18 are extremely important in providing a practical digital power amplifier. The use of the oversampling filter 14 was found to make the PWM more linear and to enhance the system resolution. The noise shaper 18, in which the word length is reduced, provided a more practical internal clock rate for the modulator 20 and therefore enabled a practical amplifier to be achieved.

However, we will look first at the operation of the "cross-point" detector 16 as it is this element of the circuit of the converter 8 which enables the problems identified above, which were thought to be fundamental to pulse width modulation, to be overcome. In this respect, the detector 16 acts as adjusting means to adjust the conversion process so that it apes the lower distortion naturally sampled mode rather than the uniformly sampled mode. The detector 16 achieves this by adjusting the digital samples prior to modulation so that the modulator sees adjusted values which are substantially the same as those which would have been received had a continuously varying signal been sampled by a periodic comparison waveform. In this respect, the continuously varying signal is a representation of the digital samples actually received. We can appreciate from the discussion above that the difference between naturally sampled pulse width modulation and uniformly sampled pulse width modulation occurs because there is a difference in the time instant at which a continuously varying signal, in(t), Figure 2a, crosses the comparison waveform cw(t) as compared to time instant at which the regularly occurring samples cross the comparison waveform cw(t). The detector 16 is arranged to calculate an approximation of the difference between a uniformly sampled signal and its naturally sampled continuously varying representation, and to use that calculation to adjust the digital samples input to the modulator 20. It has been found that this technique provides high quality, low distortion conversion from digital to analogue signal formats. In one implementation which has been found to be particularly accurate and yet have practical achieveability, the detector 16 uses a small number of adjacent, uniformly spaced input samples to derive a polynomial approximation to an original analogue waveform over a short time interval. This polynomial is then used to numerically approximate the corresponding input amplitude values at the natural sampling instant. These amplitude values are directly proportional to the naturally sampled PWM pulse widths. The technique can be seen more clearly with reference to Figures 4 and 5. Figure 4 shows one period of the comparison waveform cw(t) and shows it crossing part of the continuously varying input signal in(t). Figure 4 also shows the sampled and held signal s(t) which is derived from regularly spaced sample values In(n), I (n+1)..... Figure 4 clearly shows that the crossover point or coincidence of each input in(t) or s(t) with the comparison waveform cw(t) occurs at different times, and it will also be appreciated that the corollary is that if one looks at the value of either input waveform at a selected time, say t₀, their values are different. In the present implementation it is required to adjust the value of the waveform s(t) to the value of the corresponding analogue input in(t) at its crossover point. Figure 5 illustrates the computation technique which the detector 16 uses. Figure 5 shows two adjacent incoming digital samples in(n) and in(n+l). Figure 5 also shows the analogue comparison waveform cw(t), which is a sawtooth function of period, Tc, where in each period:-

cw(t)=t (-b<cw(t)<b) (1)

for time t, the time from the start of the period, and b, the maximum amplitude of the comparison waveform.

We wish to know the value of the analogue input, in(t), as it crosses or coincides with the comparison waveform cw(t) so that this value can be output from the detector 16 and input to the PW modulator 20. To this end an estimate of the time, t_κ, when the comparison waveform cw(t) equals the input or equivalently when the difference between the comparison waveform and the input is zero is derived. This approximation to t_χ, is then used to estimate in(t_χ) (or cw(t_χ)), the amplitude value where the input equals the comparison waveform. The details of this process are described below. We begin by deriving in _N(t), an N th order polynomial approximation to a continuously varying or analogue signal based on N + 1 adjacent samples from the digital input sequence. Next, we define a new function, f(t) such that:-

f(t) s cw(t) - ift _N(t) (2) with ^• f(t=t_χ) = 0.

For N = 3 it can be shown that a single Newton-Raphson iteration is sufficient for approximating t_χ to 16 bit accuracy from t₀, a good initial estimate to t_χ:-

From Figure 5 it can be seen that the initial estimate t₀, to the time when iή_N(t) crosses the comparison waveform cw(t), which has been found to be sufficiently accurate, is directly proportional to the average of two uniformly spaced input samples, in(n) and in(n + 1) occurring at each end of the sampling interval under consideration, that is:- t_n = k infnl + infn+11 (4)

Evaluation of the Equation (3) and then of Equation (1) gives cw(t^), an approximation to cw(t_χ) (or in(t_χ)), the value of the comparison waveform at the cross point between in(t) and cw(t).

This algorithm can be readily implemented by way of an appropriate integrated circuit, for example, provided on a chip. Preferably, memory for storing the data and the information derived therefrom, and processor means for running software routines to implement the computations are provided. ifi Ct) and its derivative, ifi' (t) are derived and updated every few samples by using standard difference table techniques.

Moreover, by ensuring that iή'3(t) «cw'(t) = 1, 1

can be approximated by: -

f ' ( t_n ) cw ' ( t_n )-iή ' ( t_n ) l-if ' ( t₀ ) 1 - δ ( 5 )

= l + δ + δ² + ^{* • •} = 1 + δ + ^• * ^* + δ ^M

where δ = in'3( ₀) « 1. The division may be approximated to sufficient accuracy with M = 3 and by this, time consuming divide instructions are avoided.

Thus to summarise, the procedure is to (i) derive the interpolation polynomial ift₃(t) and its derivative if.3' ( ), (ii) evaluate Equation 4 to find a crude approximation to the time of the cross point, (iii) use Equations 2 and 5 to find the difference between the comparison waveform and the polynomial approximation to the analogue input, and the derivative of this difference at this crude approximation, (iv) evaluate Equation 3 to derive a high quality estimate to the time of the cross point, and finally (v) use Equation 1 to compute that value of the comparison waveform at the cross point. (Note from Equation 1 that the fourth step and the fifth step produce the same numerical result).

Figure 6 shows a flow diagram illustrating how the algorithm can be implemented in practice on an integrated circuit. It will be appreciated that Figure 6 represents a software program for performing the computations described above. At initialisation, the routine shown in Figure 6 has a function block 22 which is asked to obtain four values as in(n), in(n+l), in(n+2) and in(n+3) of the series input of digital samples. Generally all of the input values will be from adjacent and successive samples. The four values input are then, at the function block 26, used to compute iή3(t) which is a representation of the continuously varying analogue signal over the interval spanned by the four values under consideration.

Furthermore, the derivative of this polynomial, that is iή'₃(t) is also computed. At the next function block 32, an initial estimate t_Q of the time at which the comparison waveform cw(t) crosses the polynomial iή3(t) is formed. This is performed by averaging the values of the two input samples which are on either side of the cross point using the Equation (4), eg in(n+l) and in(n+2). The function block 34 is then able to compute the value of the polynomial and of its derivative, that is in3(t_Q) and in'3(t_Q). From this polynomial the function f(t_Q) can be developed by the function block 36 in accordance with Equation 2 above. The expansion of Equation 5 is also used by function block 36 to compute the reciprocal of the derivative of function f(t_Q), that is 1 f(t₀)

Function block 38 uses the output of function block 36 and the initial estimate of time from block 32 to form a final estimate of the time of the crossing point. In this embodiment, this is done by a single Newton-Raphson iteration. The final estimate t^ is then used to compute the value of the comparison waveform cw(t_j) at time t± and this value is output by the function block 42. The routine can then be repeated with four new values, which may be entirely fresh, or preferably include three of the original values and the next arriving value.

In the flow diagram of Figure 6 all of the computations are shown to be sequential. However, it will be appreciated that input values could be received as available and the polynomials and their derivatives derived by function block 26 irrespective of the state of the calculations in function blocks 32 to 42. Some sort of queuing system for the data could clearly be provided. This would enable sufficient computation capacity to ensure that all the computations can be made in real time. It has been made clear above that the oversampling filter 14 and the noise shaper 18 of the converter 8 were developed for use with a uniformly sampled pulse width modulation system before the "cross-point" detector 16 was designed and developed. However, and as shown in Figure 3, these elements can be incorporated in the converter 8. When the use of PWM was first promulgated by the present applicants for the implementation of a digital power amplifier, it was realised that if an input sinusoid of frequency fm had been sampled at a standard audio sampling frequency fc of 32, 44.1 or 48 kHz, there would be, when the digital samples were modulated by a uniformly sampled pulse width modulator, considerable distortion of the input signals. For example, it was found by mathematical analysis that if the frequency fm of the original analogue signal was 15kHz, if this had been sampled at a sampling frequency fc of 32kHz, such that the ratio q = fc/fm was 2.13, the fourth harmonic would be larger than the fundamental. The solution found was to increase the pulse repetition rate, that is the value of fc, to avoid such distortions. Generally, it is necessary to increase the rate to above the Nyquist rate. The need for an increased pulse repetition rate, and the distortions which can appear without it, are presented analytically and with simulation results in "Towards a digital power amplifier" by M. Sandier, presented at the 76th Convention of A.E.S., October 8th to 11th, 1984, A.E.S. Preprint No. 2135, -and in "Progress towards a digital power amplifier" by M. Sandier, presented at the 80th Convention of A.E.S. , March 4th to 7th, 1986, A.E.S. Preprint No. 2361. The oversampling filter 14 increases the sampling frequency and thereby acts to increase the pulse repetition rate, to above the Nyquist rate, and may comprise any means for so doing. Where the samples are regular and it is required that they remain at a regular repetition rate an interpolation technique is preferred. Thus, the filter 14 may be an IIR or FIR filter arranged to interpolate additional digital samples between those input to the device whereby the sampling frequency of the digital input signal is increased. As this is a well known technique, further description thereof is not necessary.

Of course, the pulse repetition rate of digital samples might be increased in the digital equipment from which an input to the converter 8 is received. For example, a few modern compact disc players do produce digital samples whose sampling frequency is higher than the 44.1kHz which is the norm for digital audio CD players. Alternatively, the compact discs may be prerecorded such that the information stored thereon is a series of digital samples arranged upon retrieval to occur at a higher repetition rate than is currently conventional. Where the digital samples already have a repetition rate above the Nyquist rate, the oversampling filter 14 will not, of course, be required.

We have seen that for low distortion and high resolution, the sampling frequency of the arriving samples is either to be high, or is to be considerably increased by way of the filter 14. These samples, after they have been adjusted for value by the detector 16 as described above, are to be fed to the modulator 20. For a digital input the modulator 20 will generally be configured as a clocked counter. In this circumstance, the master clock which drives the counter must run at a multiple of the pulse repetition frequency, this multiple being (2 to the power of the number of bits). If a 16-bit input signal at 44.1kHz, digital audio, has had its sampling frequency increased by the filter 14 by sixteen times, to 705.6kHz, this would mean that the logic of the modulator 20 would have to be clocked at a rate of 46.2GHz. The output power circuit, as the amplifier 10, would then need to include switches making transitions in significantly less than one nanosecond.

This potential problem is overcome by providing the noise shaper 18 which basically allows the number of bits in a signal representation to be traded for sampling rate. That is, the noise shaper 18 is arranged to reduce the number of bits in the words formed by the digital samples to ensure that pulse width modulation of the adjusted samples is practicable by decreasing considerably the clock rates required. Thus, the noise shaper 18 may drop the least significant bits of each word or may round the words. As an example, a noise shaper output word length of 8-bits and a pulse repetition frequency of 705.6kHz, requires a clock rate of only 180.6MHz.

We have seen from the above that oversampling enables high resolution. In this respect, apparatus of the invention is able to produce an output from a conventional 16-bit compact disc input with no sound degradation or distortion, and would be similarly able to handle a 32-bit input. However, such oversampling produces practical problems in that the clock rate of the modulator to be utilised would need to be impractically high. These practical problems are overcome by the employment of the noise shaper.

The noise shaper 18 is also effective to attenuate noise in the audio band by forcing quantisation error into the off-signal bandwidth. Where the original sampling rate has been increased by the filter 14 such that the bandwidth has increased, this leads to added noise being pushed into a part of the spectrum not occupied by signal resulting in low noise over the relatively low frequency audio band.

Figure 7 shows schematically one implementation of the noise shaper 18. As shown, the input samples In are first fed to an array of parallel fast latches indicated at 50. This minimises input delay. The samples are then passed to an adder 52 where a feedback signal is added. Where the digital samples at the input 12 (Figure 3) are 16-bit words, the adder 52 would generally have two 16-bit inputs and there is the option to feedback up to fifteen bits. The 16-bit word is then fed to the N-bit quantiser 56 which sends a predetermined number N of least significant bits around the feedback loop. The significant bits are fed to an output latch 58. The lower order bits which have been discarded by the quantiser 56, that is the quantisation noise, are fed to a feedback filter 60 before being fed back to the adder 52. The filter 60 is chosen so as to create high open loop gain at frequencies which are low compared to the sampling frequency. For example, the feedback filter 60 can be a simple high pass polynomial type derived from the noise shaping transfer function, NTF(z):-

NTF(z) = (l-z^-1)ⁿ => n = 1 => H(z) = z^-1 n = 2 => H(z) = 2z^-1-z^-2 n = 3 => H(z) = 3z^_1-3z^"2+z^"3

.etc. (6)

where n is the filter order.

How well such a filter attenuates in band noise is approximately independent of the input signal, but does depend on the shape of the power spectral density of the noise. If we assume white quantisation noise, the output error spectrum is such that low frequency noise components will be much smaller than those at higher frequencies. Noise shaping is a known technique, and accordingly will not be further described herein. Any other techniques for reducing the clock rate required of the modulator, but still enabling high quality conversion may, of course, be utilised. For example, multi-bit sigma-delta modulators could be substituted. In this respect, although the output of the noise shaper 18 has a reduced word length, there is no degradation in the signal quality over the audio band. The output is therefore capable of providing signal resolution up to 20 kHz which is still equivalent to that of a 16-bit signal, even though it is represented by only eight bits. Of course, the N-bit quantiser 56 can be arranged to discard any number of bits and thereby change the word length of the output accordingly. The noise shaper of Figure 7 can be arranged to process 16-bit 2's complement parallel data with either a first or second order loop filter, and to output a preset number of bits between one and sixteen to the pulse width modulator 20. Dither may be added to the signal being filtered by the noise shaper 18, either by application to the adder 52 or by utilisation of a further adder (not shown).

Theoretically the noise shaper 18 may be implemented by any standard filter. However, the signal output by the noise shaper is to be applied to a pulse width modulator, and high frequency, high gain noise generated by the noise shaper may be reflected, by the modulation, into the audio bands of interest. Any such problems can be overcome by utilising as the noise shaper a filter whose characteristics have been optimised.

Figure 8a shows the noise transfer function of the simple high pass polynomial type filter referred to previously, in this case a fifth order filter. It will be seen that the noise transfer function of this conventional filter has high noise gain over the range 60kHz to 180kHz, and this noise can be reflected into the signal bandwidth. However, this problem can be avoided by shaping the noise transfer function of the filter to reduce the noise gain at particular frequencies causing reflections. For example, and as illustrated in Figure 8b, the filter characteristic may be shaped to attenuate noise in the audio band, indicated at A. The noise transfer function may also be arranged to fall at band B, at which frequencies high gain noise is known to produce reflections. Techniques for producing filters tailored to have characteristics appropriate to the circuit requirements are, of course, well known and are outside the scope of this application.

One implementation of a pulse width modulator, which may be arranged to provide single sided or double sided modulation, is illustrated in Figure 9. We have seen that for an 8-bit word input at 705.6kHz, a clock rate of 180MHz will be necessary, and at this speed the timing of the logic signals is crucial as some of them will have to travel the length of the circuit board. The pulse width modulator shown in Figure 9 was constructed in CMOS technology with special attention being paid to the layout of the circuit, involving a low dielectric multi-layer board designed to high tolerances using computer aided design, and produced using computerised numerically controlled tools. Fast signals are sectioned off as much as possible and a microwave strip line matching technique used wherever necessary. Surface mounted devices are used to minimise package lead inductance and individual devices are powered by independent local supplies. Complementary clocking is used to maintain output symmetry when needed, and propagation delays are compensated by using both synchronous and asynchronous delay line techniques. The pulse width modulator 20 shown in Figure 9 comprises an output latch 76 which is arranged to be set by a precounter 72, whose output is coupled to one input thereof, and to be reset by a main counter 74, whose output is coupled to the other input of the output latch 76. The precounter 72 is clocked by way of a preset sub-division of an input clock (not shown), and the main counter 74 is clocked by the same preset sub-division of the input clock. The input to the precounter 72 is from a latch 62 by way of a loading circuit 64. The latch 62 and the loading circuit 64 are both clocked by a preset sub-division of the input clock, but at a much slower rate. In one embodiment, the ratio of the latch 62 and loading circuit 64 clock rate to that of the counters 72, 74 is 8:2304. The input to the main counter 74 is similarly from a latch 66 by way of a loading circuit 68. The latch 66 is clocked by the same clock pulses as the latch 62.

For double sided modulation the processor calculates an adjusted value for the digital samples for both the leading and trailing edges of the output pulses. The leading edge values are then fed to an input 70 of the modulator for application to the precounter 72, whilst the trailing edge values are fed to an input 78 for application to the main counter. In operation, each latch 62, 66 on being clocked, captures and holds the value on the respective input 70, 78. The value held by the latch 62 is fed to the loading circuit 64 when this loading circuit 64 is clocked, and this value is then loaded into the precounter 72. The counter 72 then counts down to zero and generates an output pulse to set the output latch 76 when attaining zero. This output pulse is also applied to the loading circuit 68, which has received a value from the latch 66, which thus loads the main counter 74. This main counter 74 similarly counts down and outputs an output pulse to reset the output latch 76 when attaining zero. Thus, it will be appreciated that the output of the latch 76 is the pulse width modulated waveform.

It will be appreciated that there are several classes of uniform modulation, for example one sided AD modulation, two sided AD modulation (one sample per pulse), two sided, two sample per pulse AD modulation (one sample per pulse edge), one sided BD modulation, and two sided BD modulation (one sample per pulse) being examples. Any of these classes, and indeed any other modulation schemes, may be utilised although it is thought that the modulator structure shown in Figure 9 using two sided, two sample per pulse class AD pulse width modulation would be particularly suitable. Of course, the particular structure of the modulator shown in Figure 9 is given by way of example only, and alternative structures could be utilised. It will be appreciated that the output of the modulator 20 is two output pulse streams, the period between two complementary pulses being proportional to the value of the digital signal samples which were applied at the input 12. Thus, the digital to analogue converter 8 could be used as the basis of a stand alone converter. However, Figure 3 shows the use of the converter 8 in a presently preferred implementation as part of a digital power amplifier. Thus, and as is clear from Figure 3, the output pulse stream is fed to a power amplification stage 10. Again, it will be appreciated that the power amplification stage 10 may be configured as is required. In the particular embodiment illustrated, the power amplification stage 10 comprises a power switch 80 having¹ a pulsed voltage output mirroring the input signal. The output pulses from the modulator 20 are applied by way of the power switch 80 and a low pass filter 84 to a load. An embodiment of a power switch is illustrated in Figure 10 in which two power transistors 86, for example, MOSFETS, are connected in series between the positive and negative rails. It will be seen that the output pulses are fed directly to the gates of the MOSFETS 86 by way of buffers 88, 90. One of these buffers, 88 is an inverter whereas, the other buffer 90 is non-inverting. It will be appreciated that the two transistors 86 will be switched on alternatively, but care has to be taken that both transistors are not fully conductive at the same time as this would allow a large current transient to flow through the transistors.

The use of power MOSFETS in these alternative output stages is preferred as they are current controlled devices, their turn on and turn off times being controlled by the rate of current charge and discharge to the gate. Under correct drive conditions, these times may be as low as 5 nanoseconds and therefore the MOSFETS can be fully responsive to the output pulses generated by the converter 8.

The pulse voltage produced across the power MOSFET is fed to the low pass recovery filter 84 which is to remove all unwanted components from the complicated PWM modulation waveform. The filter requirements are quite stringent, but for maximum linearity, it is preferred that the inductors used should be air-cored or at least ferrite cores with air gaps. Air-cored conductors are somewhat bulky, but this may be offset to some extent if amplifiers of this type are adopted for a new form of digitally controlled active loudspeaker in which the crossover filter of the loudspeaker is combined with the filter 84.

Of course, the type of filter and its construction can be chosen as is required. A number of filter designs have been compared on the basis of a trade-off between delay and amplitude characteristics, and at present a Butterworth filter is preferred in spite of the superior delay distortion properties of a Bessel polynomial filter. Figure 11 shows a bridge circuit which is an alternative power switch to operate class AD switching. The bridge circuit is connected between the positive and negative rails and four power switches 92 are connected together in a bridge arrangement. As indicated, two of the switches 92 are normally open, and the other two are normally closed. The state of each switch is changed by the application thereto of either the output pulse A or the inversion A of the output pulse. The load, which will include an appropriate filter, preferably an LC filter, is connected across the bridge circuit. Clearly, the power switches 92 may be configured as appropriate, and, for example, may be power MOSFETS as previously.

Results from computer simulations of a digital power amplifier as shown in Figure 3 are given in Figures 12 and 14. Comparison results are provided in Figures 13 and 15. Thus, Figure 12 shows the spectrum of the signal output from the power amplifier 10 when a digital representation of a 5kHz near full scale sinusoidal input has been applied at input 12. Figure 13 shows the output spectrum for the same input but fed to a digital amplifier without a cross- point detector 16. It will be immediately noted that the spectrum of Figure 12 is completely without harmonic distortion, whereas harmonic distortion at 10kHz and 15kHz is clearly shown in Figure 13.

Figures 14 and 15 are similar output spectra produced from the same systems as produce the spectra of Figures 12 and 13. However, in Figures 14 and 15 the input was a twin tone input comprised of sinusoids at 250Hz and 8kHz having an amplitude ratio of 4 to 1. It will be seen from Figure 14, that the result from a circuit of the invention is an output spectrum which is free of harmonic and intermodulation distortion. Again, the spectrum of Figure 15 shows harmonic distortion of the input tones as well as intermodulation distortion between the input tones.

Figures 12 to 15, which were all produced by computer simulations of a digital power amplifier including an oversampling filter 14 and a noise shaping filter 18, clearly show how these techniques result in high quality conversion over the frequency range of interest.

It will be appreciated that modifications in and variations to the apparatus and method described above may be made. For example, the "cross-point" detector 16 involves solving an equation, and this, in its turn, involves generating a polynomial which approximates to a continuously varying representation of the original digital samples. Then, the time instance at which the continuously varying representation crosses a comparison waveform is computed. The polynomial generation involves using a number of samples of the digital signal, four in the embodiment described above, to obtain the coefficients defining the polynomial. One method of generating the polynomial has been described above, but many others exist. Thus, the method described above uses forward interpolation in which the samples are equally spaced in the time direction. A so called inverse interpolation technique could alternatively be used in which the samples are non- equally spaced in the amplitude direction. However the samples are chosen, many different interpolation methods can be used.

Once a polynomial has been obtained, the solution or root of the equation is found to give the cross-point and a modified sample value which is used in the modulator. Of course, there is a question as to how often the polynomial is to be derived. This might be one for every sample to be modified, or it is possible to reduce the average amount of computation per sample by using the polynomial more than once in finding successive cross-points.

In whatever manner the polynomial is derived, it is advantageous to maintain a difference table to make it easy to update the polynomial for subsequent samples. The specific embodiment describes adjusting the values of the digital samples so that the modulated output pulses appoximate to those which would have been produced by a naturally sampled analogue waveform. However, it would be possible, alternatively, to adjust the digital samples in other ways to give different results. For example, a linear interpolation of the digital samples would not give as low a distortion as the specific embodiment, but would need less processing power.

The input signal is strictly band limited. There is therefore an upper boundary for how much the signal can change from one sampling instance to the next. This could be used to provide a range of values for a particular cross-point, which is a considerably smaller sub-set than the set of all possible cross-points. This could be used to reduce the maximum number of iterations associated with the cross-point derivation technique described above.

In the circuit illustrated, the particular components of the converter 8 are placed in a particular order. However, this order is shown simply because it has been the order in which the components have been connected for testing and simulation. Given that the modulator 20 is to provide the output of the converter 8, its position may well be fixed at the output thereof, but the other components can, apparently, be placed in any order. For example, if the detector 16 were in advance of the oversampling filter 14, the cross-point computation could take place at a lower rate which could be advantageous. However, as this could cause the cross-point estimate to be less accurate, it might be necessary then to increase the order of the polynomial.

Alternatively, there may be advantages in placing the cross-point detector 16 after both the oversampling filter 14 and the noise shaper 18. In this instance, the numerical processes of the detector 16 would be performed on low word length samples. This may mean that more of the detector could be efficiently implemented in silicon and look-up tables and the like could be used in place of some of the computations.

In the above example, the particular components of the converter 8 are shown as discrete components. Of course, the converter and amplifier do not have to be constructed from a series of identifiable components and the functions provided by individual elements of the detector 16, the oversampling filter 14 and the noise shaper 18 can be provided as required.

In the specific description it has been taken that the inputs will be taken from conventional sources of digital audio signals, and that these signals are then to be processed by apparatus of the invention to power an amplifier, for example. However, it would be possible to perform signal processing required by the method of the invention in advance and to store the results. For example, the digital signals retrieved from a compact disc may have been preprocessed and stored on the disc for use with apparatus of the invention.

Other modifications and variations to the invention as described and illustrated may be made within the scope of the appended claims.

Claims

1. A method of converting a series of digital samples to analogue signals, the digital samples being at a rate above the Nyquist rate, the method comprising the steps of reducing the length of n-bit words formed by said digital samples, and modulating the digital samples to produce a series of output pulses having a characteristic related to the value of said digital samples, and wherein the method further comprises adjusting the value of said digital samples prior to said modulation.

2. A method as claimed in Claim 1, wherein the value of said digital samples is adjusted by forming an Nth order polynomial approximation to a continuously varying representation of said digital samples, and adjusting the samples to values of said polynomial approximation.

3. A method as claimed in Claim 1 or Claim 2, wherein the method comprises the step of increasing the rate of successive digital samples to the rate above the Nyquist rate by interpolating additional samples between said digital samples.

4. A method as claimed in any preceding claim, wherein the word length of the n-bit words formed by said digital samples is reduced by dropping the least significant bits of each word.

5. A method of converting a series of digital samples to analogue signals, the method comprising modulating the digital samples to produce a series of output pulses having a characteristic related to the value of said digital samples, and wherein the method further comprises adjusting said digital samples prior to said modulation, said digital samples being adjusted such that said characteristic of the output pulses produced by said modulation of said adjusted digital samples is the same as would have been produced had a continuously varying representation of said digital samples been sampled by a comparison waveform and then modulated.

6. A method as claimed in Claim 5, further comprising the step of forming an approximation, accurate to a system resolution, of the time at which said continuously varying representation and said comparison waveform coincide, and utilising said time approximation to adjust said digital samples.

7. A method as claimed in Claim 6, further comprising the step of forming an Nth order polynomial approximation to said continuously varying representation from N + 1 adjacent digital samples.

8. A method as claimed in Claim 7, further comprising the steps of forming an estimate of the time at which said continuously varying representation and said comparison waveform coincide by forming an average value of two or more adjacent digital samples, and forming the difference between said comparison waveform and said polynomial representation at the time estimated, and additionally forming a derivative of said difference, and forming a better estimate of the time from said first time estimated and from the difference formed at that first time and its derivative.

9. A method as claimed in any preceding claim, wherein said digital samples are modulated by way of a pulse width modulator, and wherein said digital samples are adjusted prior to modulation to emulate the values of an analogue waveform corresponding to said digital samples when sampled by a comparison waveform.

10. A method as claimed in any preceding claim, wherein the digital samples are regularly occurring and represent analogue signals having frequencies in the audio range, and wherein the output pulses contain audio range frequencies.

11. A method of converting digital samples to analogue power using a method of converting a series of digital samples to analogue signals as claimed in any preceding claim, and further comprising applying said series of output pulses to a power amplifier to produce an analogue power output representative of said digital samples.

12. Apparatus for converting a series of digital samples to analogue signals, the apparatus comprising shaping means for receiving successive digital samples at a rate above the Nyquist rate and as n-bit words and being arranged to reduce the length of said words, and modulating means coupled to receive said digital samples and arranged to produce a series of output pulses having a characteristic related to the value of said digital samples, and the apparatus further comprising adjusting means arranged to adjust said digital samples prior to their modulation by said modulating means.

13. Apparatus as claimed in Claim 12, further comprising input means for receiving successive digital samples, and interpolating means coupled to said input means and arranged to increase the rate of said digital samples above the Nyquist rate, said shaping means being coupled to receive increased rate digital samples from said interpolating means, and wherein said interpolating means is arranged to increase said rate by interpolating additional samples between said received successive digital samples.

14. Apparatus as claimed in Claim 12 or Claim 13, wherein said means for reducing the length of the n-bit words is arranged to block the passage of the least significant bits of each word.

15. Apparatus for converting a series of digital samples to analogue signals, the apparatus comprising input means for receiving digital samples, modulating means coupled to said input means to receive said digital samples, and arranged to produce a series of output pulses having a characteristic related to the value of said digital samples, and the apparatus further comprising adjusting means arranged to adjust said digital samples prior to their modulation by said modulating means, wherein said adjusting means is arranged to adjust said digital samples such that said characteristic of the output pulses produced by said modulation of said adjusted digital samples is the same as would have been produced had a continuously varying representation of said digital samples been sampled by a comparison waveform and then modulated.

16. Apparatus as claimed in Claim 15, wherein said adjusting means is arranged to adjust said digital samples by forming an approximation, accurate to a system resolution, of the time at which said continuously varying representation and said comparison waveform coincide, the time approximation being utilised to adjust said digital samples.

17. Apparatus as claimed in Claim 15 or 16, further comprising means coupled to said input means and arranged to increase the rate of said digital samples, and means coupled to receive said digital samples as n-bit words and arranged to reduce the length of said words.

18. Apparatus as claimed in any of Claims 12 to 17, wherein said adjusting means comprises means for obtaining the values of N + 1 adjacent digital samples, and means for computing an Nth order polynomial approximation to a continuously varying representation of said digital samples from the values obtained.

19. Apparatus as claimed in Claim 18, further comprising means for forming an average value of two or more adjacent digital samples to provide a time estimate, and means for determining the difference between a comparison waveform and said polynomial approximation at the time estimated, and further comprising means for forming a derivative of said difference, and means for forming a better time estimate from said first time estimate and from the difference determined at that first time and its derivative.

20. Apparatus as claimed in any of Claims 12 to 19, wherein said adjusting means comprises storage means, and processor means.

21. Apparatus as claimed in any of Claims 12 to 20, further comprising means coupled to receive said digital samples and arranged to attenuate noise in the audio band.

22. Apparatus as claimed in any of Claims 12 to 21, wherein said modulating means comprises a digital pulse width modulator having a main counter for receiving said adjusted digital samples, said counter being arranged such that the width of said output pulses is proportional to the value of said adjusted digital samples.

23. Apparatus as claimed in Claim 22, wherein said digital pulse width modulator further comprises an output latch and a precounter arranged to turn on said output latch, the main counter being arranged to turn off said output latch.

24. Apparatus as claimed in any of Claims 12 to 23, further comprising filtering means connected to an output of said modulating means.

25. A digital power amplifier for converting digital samples to analogue power comprising apparatus as claimed in any of Claims 12 to 24, and further comprising amplifier means coupled to an output of said apparatus for receiving said output pulses.