WO1992010045A1

WO1992010045A1 - Data muting method and apparatus for communication systems

Info

Publication number: WO1992010045A1
Application number: PCT/US1991/008568
Authority: WO
Inventors: Kevin M. Laird; Gregory L. Cannon
Original assignee: Motorola, Inc.
Priority date: 1990-12-03
Filing date: 1991-11-15
Publication date: 1992-06-11

Abstract

Briefly, according to the invention, a receiver (700) having an audio output device (720) is disclosed. The receiver receives a carrier signal modulated with an information signal. A demodulator (722) included in the receiver (700) demodulates the received carrier signal and routes the demodulated information signal (302) to a delay circuit (310). The output of the demodulator (722) is also coupled to a decoder (318) where a data portion (404) of the demodulated information signal (302) is decoded to determine the exact start time of a voice portion (406) of the demodulated information signal (302). A coupler means couples the signal (302) to the audio output device (720) substantially simultaneously with the start of the voice portion (406) with no delay. As a result the received voice portion (406) is available on the audio output device (720) without the delay required to determine the nature of the signal (302). In other aspects of this invention a detector means (318) detects the presence of a voice portion of the information signal with no preceding data. In response to this detection the coupler (312) couples the output of the delay circuit (310) to the audio output device (720).

Description

DATA MUTING METHOD AND APPARATUS FOR COMMUNICATION SYSTEMS

Technical Field

This invention relates generally to receivers and transceivers in communication systems and more specifically to receivers receiving data and voice signals.

Background

In communication systems that utilize voice channels for data transmissions it is necessary to mute the data in the receiver to prevent the radio user from hearing it. In the prior art, data muting in receivers typically has been accomplished by detecting the presence of a data signal and then muting the output of the receiver so that it is not heard. Many different techniques exist for detecting the presence of the data signal, such as, for example, those described in U.S. Pat. Nos. 3,758,860, 3,939,431 ,

4,197,502, 4,233,565, 4,229,822, and 4,430,742. Most of the foregoing prior art techniques require the reception of several bits in order to detect the data signal. Since a finite amount of time is needed for the detection of data, a short data burst is always passed to a listener. Some systems use a data operated squelch (DOS) tone as a preamble to the data to inform the receiver circuitry of an arriving data signal. This DOS tone is detected via a detector circuit which subsequently acts to mute the speaker so as to prevent the user from hearing the received data. FIG. 1 shows a block diagram 100 of one such mute circuit.

A demodulated signal 102 is routed to a buffer 106 and a detector 108 via a signal line 104. The output of the buffer 106 is coupled to the input of an audio mute gate 112. The detector 108 detects the presence of data or DOS tone and directs the mute gate 112, via the gate control line 110, to open so as to prevent the gated audio (not voice) from getting to an amplifier 115 and a speaker 116. As soon as the presence of voice is detected the detector 108 asserts the gate control line 110 to close the analog gate 112. With the analog gate closed, the audio path between the buffer 106, the amplifier 115, and eventually the speaker 116 is established allowing demodulated voice be heard on the speaker 116.

In general the detector 108 takes a finite amount of time to detect the presence of a DOS tone and assert the gate control line 110. In addition, there is a finite reaction time for the audio mute gate 112 to react to the state of the gate control line 110. During this finite time period, however short, a data burst will get to the speaker 116. FIG. 2 shows a timing diagram depicting the passage of some data through the audio mute gate 112. Time t_a 202 is the reaction time of the detector 108 when data is present. Time tb is the attack time of the audio mute gate 112. Times t_c and tςj are the data absent detect time and the audio mute gate release time respectively. As is apparent from the timing diagram 200, a data burst 210 equal in time to the sum of t_a 202 and tb 204 is passed through the audio mute gate 112 and heard on the speaker 116. Furthermore, a portion of the voice signal equal in time to the sum of the two times t_c 206 and td 208 is missed.

The data burst 210 and the missing of a portion of the voice signal are annoying to the user and are therefore undesirable. It is clear that a need exists for a means to differentiate the data signals from voice and prevent them from reaching the speaker 116. Several means are available to provide a solution to this problem, however all with various deficiencies.

Receivers of some communication systems assume that data is not present and then mute the speaker on the detection of data. This is depicted in FIG. 2. Other systems assume that data is present and mute the audio. Upon detection of no data (voice), the system would unmute the audio. The problem with this approach is that the first part of the transmission is muted while determining whether it is data or not. Another problem with this solution is that in some data/voice systems there is a post-Push To-Talk (post PTT) ID sent with each transmission. In such systems, portions of the post PTT ID will be heard on the speaker due to the finite time required for the detection of data. A second solution would use a high Q notch filter in systems where DOS tones are employed. Since DOS tones are audio tones in the voice spectrum a portion of the voice spectrum is filtered as well. The impact of this filtering of the voice spectrum varies from person to person. While it would not render the voice message unintelligible, it would distort the sound of the person to the point where they could be unrecognizable.

Therefore, there exists a long felt need for a means to effectively eliminate the annoying data bursts or tones heard on a speaker with maximum throughput in a data/voice communication system.

Summary of the Invention

Briefly, according to the invention, a receiver having an audio output device is disclosed. The receiver receives a carrier signal modulated with an information signal. A demodulator included in the receiver demodulates the received carrier signal and routes the demodulated signal to a delay circuit. The output of the demodulator circuit is also coupled to a decoder where a data portion of the information signal is decoded to determine the exact start time of a voice portion of the information signal. A coupler means couples the demodulated information signal to the audio output device substantially simultaneously with the start of the voice portion. As a result the received voice portion is available on the audio output device without the delay required to determine the nature of the received information signal. In other aspects of this invention a detector means detects the presence of a voice portion of the information signal with no preceding data. In response to this detection the coupler couples the output of the delay circuit to the audio output device. Furthermore, the coupler decouples the information signal from the audio output device in the event that data has been detected. Such decoupling prevents data bursts from reaching the audio output device.

Brief Description of the Drawings The essentials of the present invention would better be understood by the following diagrams:

FIG. 1 shows a typical data mute circuit used in present data/voice communication systems.

FIG 2 shows a timing diagram associated with the mute circuit of FIG.1.

FIG. 3 shows a block diagram of the data mute with delay circuit in accordance with the present invention.

FIG. 4 shows a timing diagram associated with the data mute with delay circuit of FIG. 3. FIG. 5 shows a block diagram of an audio delay circuit in accordance with the present invention.

FIG. 6 shows a schematic diagram of an audio delay circuit in accordance with the present invention.

FIG. 7 shows a block diagram of a receiver in accordance with the present invention.

FIG. 8 shows a block diagram of an alternative embodiment of a receiver in accordance with the present invention.

FIGs. 9A and 9B show flow charts of the operation of a digital signal processor in the receiver of FIG. 8. Detailed Description of the Preferred Embodiment

Referring to FIG. 3, a block diagram of a data mute with delay circuit 300 is shown in accordance with the present invention. A demodulated information signal 302 is routed to a buffer 306 and a detector/decoder 318. The demodulated information signal 302 contains either voice, data, or a combination of both signals. The output of the buffer 306 is the buffered demodulated audio signal 315 which is branched to the inputs of an analog gate 316 and an audio delay circuit 310. The output signal of the audio delay circuit 310 is the buffered and delayed demodulated audio signal 317 which is coupled to the input of analog gate 312. The analog gate 312 and 316 are controlled by the detector/decoder 318 via the gate control lines 320 and 321 respectively.

To better understand the operation of the data mute with delay circuit 300 the following conventions are established: an analog gate is closed when it is in a state that passes audio signals. an analog gate is open when it is in a state that prevents the passage of an audio signal. data decode time t d is the time required by the detector/decoder 318 to detect the presence of a data signal, voice detect time t_V is the time required by the detector/decoder 318 to detect the absence of data or otherwise the presence of voice. gate open time t_g0 is the time required by the analog gates 316 and 312 to open in response to their respective gate control lines. gate close time t_gc is the time required by the analog gates

316 and 312 to close in response to their respective gate control lines. detector/gate attack time (t_att) is the sum of the data decode time tdd and and the gate open time t_go. an audio signal is a data signal, a voice signal, or a combination of both such signals. The combination of the output signals of the analog gates 312 and 316 is the output audio 323. The detector/decoder 318 which controls both the analog gates 312 and 316 allows only one of the two gates to be closed at any one period. The analog gates 312 and 316 have high output impedances when in the open state so that they would not interfere with each other.

The standby state of the data delay with mute circuit 300 is defined as the state with no demodulated audio signal at its input.

This state is in response to the absence of a carrier signal at the antenna of a receiver that the data delay with mute circuit 300 is a part of. In this state both the analog gates 312 and 316 are open.

The demodulated audio signal 302 is checked by the detector/decoder 318 for the presence of data. As the data is being detected the buffered demodulated audio signal 315 is delayed for a period of time equal to t d P^lus safety margin by the audio delay circuit 310. If no data is detected the signal is assumed voice and the analog gate 312 is closed coupling the delayed signal 317 at the output producing the output audio 323. Since the audio is delayed while detection of voice is in progress, no chopping of the voice signal occurs and the voice audio will be available at the output audio 323 in its entirety. The analog gate 312 remains closed for the duration of the voice signal.

In the event that data is detected, the detector/decoder 318 decodes the contents of the data in search of timing and other valuable information. The detection of data indicates that the demodulated audio signal 302 is either an all data signal or is a mixed signal containing a pre-amble data followed by voice. The pre-amble data has a pre-determined format and contains such information as the duration of the received signal, the duration of the pre-amble, and the nature of the signal following the pre¬ amble. Using the information contained in the pre-amble data the detector/decoder 318 determines whether the signal following the pre-amble data is voice and if so what is its exact start time. With this knowledge the detector/decoder 318 synchronizes its timing circuits with the demodulated audio signal 302 and asserts gate control line 321 a time period equal to t_gc before the start of the voice portion. The time t_gc allows the analog gate 316 to be fully closed exactly at the time that the voice signal becomes available. With the analog gate 316 closed the output audio 323 would be the voice portion of the buffered demodulated audio signal 315 in real time and without the annoying data bursts or tones. The analog gate 316 remains closed for the duration of the voice signal.

If the detected pre-amble data indicates the presence of an all data signal, both the analog gates 312 and 316 remain open. With both analog gates 312 and 316 open no signals will pass to the output and therefore the output audio 323 is muted. The muting of the output audio 323 continues for the duration of the data signal. Indeed if no voice signal is following the data signal, the output audio 323 remains muted until the reception of another demodulated voice audio signal.

To summarize, the output audio 323 of the circuit 300 is muted and the demodulated signal 302 is delayed while its contents are analyzed for the presence of data. The detection of no data assumes voice and results in the analog gate 312 closing producing the output audio 323. In the event that data is detected, both analog gates 312 and 316 remain open until its contents are decoded. For an all data signal the analog gates 312 and 316 remain open for the duration of the received signal hence no audio is routed out.. If, however a data-voice signal is detected, the detector/decoder 318 decodes the data signal and extracts the exact start time and the duration of the voice signal. With this information in hand the detector/decoder 318 proceeds to gate the signal 315 to the output with no delay and in real time through analog gate 316 Referring to FIG. 4 a timing diagram 400 of the operation of the data mute with delay circuit 300 is shown. The demodulated audio signal 302 is a combination of a data signal 404 and a voice signal 406. The demodulated audio signal 302 is delayed by the audio delay circuit 310 for a time period 402 while the presence of the data signal 404 and the start of the voice signal 406 is being detected by the detector/decoder 318. With the start of the voice signal 406 determined the output audio 323 contains the voice signal in real time and no delay as shown.

FIG. 5 shows a block diagram of the audio delay circuit 310 including an analog delay line 502, a low pass filter 504, an amplifier 506, and a pulse generator 508. The pulse generator 508 provides a clock f_c to the analog delay line 502. The output of the analog delay line 502 is filtered by the low pass filter 504 and subsequently amplified by the amplifier 506. The analog delay line 502 is an RD5108A from EG & G RETICON semiconductors. The pulse generator 508 is a 555 timer based clock oscillator. The lowpass filter 504 and the amplifier 506 may be combined using operational amplifiers as well known in the art.

Referring now to FIG. 6, a schematic diagram of the audio delay circuit 310 is shown. For ease of explanation, the circuit 310 is divided in three sections as outlined in the block diagram of FIG. 5. The operation of the circuit 310 is explained in U. S. patent application serial No. 07/590,862, filed 10/1/90 the disclosure of which is hereby incorporated by reference. The operation of the circuit 310 is repeated here for convenience.

The circuit 310 is comprised of the analog delay line 502, pulse generator 508, low pass filter 504, and the amplifier 506. The clock frequency is determined by the delay desired using the following equation:

2048

delay time desired

To achieve a delay of 60 msec, a clock frequency of

34,133 KHz is needed. The pulse generator block 508 is comprised of a 555 timer with its associated circuitry. The operation of the 555 timer circuits is well known in the art.

The delay line circuit 502 includes a delay IC 604 which is RD5108A from EG & G RETICON semiconductors. The RD5108A is a 1024 sample bucket brigade device. It contains internal clock drivers that can accept TTL or higher, single phase input (f_c). Internal sample-and-hold provides a smooth stair step output over each sample period in normal operation. The delay time is controlled by the clock f_c. For a more detailed explanation of the operation of the RD5108A the reader is referred to the EG & G RETICON manual dated May 1987.

The amplifier 506 and the filter 504 are realized by the operational amplifier 606. The low pass filter is used to eliminate any noise in the audio path that is generated by the sampling clock. To attenuate the 34 KHz clock noise by 20 dB a simple 2 pole Butterworth filter with a corner at 3 KHz is used. This filter along with the audio shaping circuit and the natural attenuation of the human audio system should be sufficient attenuation of the noise. A resistor 610 in parallel with a capacitor 608 form the negative feed back for the operational amplifier 606. The demodulated audio signal 302, after being buffered by the buffer 306, is routed to the input of the delay IC 604 pin 6 via a resistor 616 and a capacitor 618. The delay circuit 502 using the pulses generated by the generator 508 delays the demodulated audio signal 302 for a specific period (60 msec in this example). The delayed audio is available at pin 4 of the delay IC 604 is connected to pin 2, the inverting input of the operational amplifier 606 through a capacitor 612 and a resistor 614. The operation amplifier 606 after filtering and amplifying the input signal produces the delayed audio 328 via a resistor 620 and a capacitor 622.

Referring to FIG. 7 now, a block diagram of a receiver 700 is shown as an alternative embodiment of the present invention. A received radio frequency signal modulated with voice, data, or a combination of both is received by the antenna 702 and filtered by the filter(s) 704. Filtered signals are routed to the amplifier 706 where they are amplified and coupled to the first input of a mixer 708. The second input of the mixer 708 receives reference signal from a local oscillator 714. The output of the mixer 708 is connected to an intermediate frequency (IF) filter 710. The filtered signal of the IF filter 710 is applied to a demodulator 722. The demodulator 722 may be of conventional design and is used to demodulate incoming signals to produce the demodulated audio signal 302. The signal 302 is routed to the data mute with delay circuit 300. At the data mute with delay circuit 300 the demodulated audio signal 302 is processed and delayed via the delay circuit 310 while its various components are detected by the detector/decoder 318. The detector/decoder 318 provides for both the detector and the decoder means of the receiver 700. The delay time can vary from one receiver to another depending on system characteristics and performance requirements. Typically, a minimum delay equal to the detect time of the detector/decoder 318 plus the response time of the analog gate 312 (or 316, whichever is greater) is required. The analog gates 312 and 316 provide the coupling means for the delayed signal 317 and the undelayed signal 315 respectively. The output audio 323 of the audio delay with mute circuit 300 is coupled to the audio filter 716 where audio interferences are filtered out. The filtered output of the audio filter 716 is routed to an amplifier 718 and subsequently to the audio output device of the receiver such as a speaker 720.

Data signals, after being detected by the detector 318 of the circuit 300, are decoupled from the audio filter 716. This decoupling results in the speaker 720 being muted. A controller 724 receives data signals from the demodulator 722 and is in communication with the circuit 300 via control lines 326. In many applications the controller 724 is inclusive of the circuit 300. The controller 724 processes the incoming data signals and presents them to the user appropriately. Typically, upon the reception of a signal the controller 724 operates to alert the radio user of such a reception. Once the alert signal has been generated, the received signal is presented to the user in a variety of ways depending upon the message type and optional features that may be enabled or disabled. Text messages are presented on a display 725. Referring to FIG. 8 now, a block diagram of a receiver 800 is shown as the preferred embodiment of the present invention. A received radio frequency information signal modulated with data is received by the antenna 802 and filtered by the filter(s) 804. In this embodiment the received information signal contains digitized voice which appears to the receiver as regular data signals. Filtered signals are routed to the amplifier 806 where they are amplified and coupled to the first input of a mixer 808. The second input of the mixer 808 receives a reference signal from a local oscillator 814. The output of the mixer 808 is connected to an intermediate frequency (IF) filter 810. The filtered signal of the IF filter 810 is applied to an analog to digital converter (A/D) 828. The A/D 828 comprises an anti-aliasing filter, a sample and hold circuit, and the analog to digital conversion circuits. The output signal of the A/D 828 is connected to a digital signal processor (DSP) 824. The DSP 824 contains several blocks for performing a series of tasks such as; channel monitoring, signal demodulation, data detection, signal delay, and audio gating. All these functions are controlled in software the procedure of which is well known in the art. A flow chart 900 depicting the essentials of the operation of the DSP 824 is presented in FIG. 9 and will be discussed later.

The DSP 824 uses a memory block 826 for all its audio storage and buffering. Data signals, after being demodulated and decoded by the DSP 824, are presented to the user in a variety of ways depending upon the message type and optional features that may be enabled or disabled. One means of presenting the data messages to the user is on a display 830. The voice portion of the received signal which is digitized is available at a second output of the DSP 824 which is connected to a digital to analog converter (D/A) 822. The D/A converter 822 converts the digitized voice back to analog and routes it to an audio filter 816 where it is smoothed. The filtered voice is subsequently amplified by an audio amplifier 818 before being submitted to an output device such as speaker 820.

Those skilled in the art appreciate the availability of other receiver circuits to achieve similar results. The presentation of this receiver should be construed only as an example (and not as a limitation) to further clarify the embodiment of the present invention.

Referring now to FIG. 9A, a flow chart of the operation of the DSP 824 is shown in accordance with the principle of the present invention. From the start block 902 the DSP 824 is in the monitor mode via the monitor channel activity block 904. The output of the block 904 is connected to a condition block 906. At the condition block 906 a decision is made as to whether a signal has been received. The NO output of the decision block 906 returns to block 904 resuming the monitoring of the channel activity. The YES output of block 906 is connected to a demodulate received signal block 908. This block demodulates the incoming signal and couples it to blocks 910, 912, and 922. Block 910 is a delay demodulated signal block where the demodulated signal is delayed for a period of time corresponding to the performance characteristics of the DSP 824 and/or receiver 800. Block 922 is a gate demodulated signal block where the demodulated signal is gated using gate control lines 936 and 942. We would refer back to this block 922 at a later time. Block 912 is a decision block where the presence of a data signal is detected. The YES output of the decision block 912 is connected to a decode demodulated data signal 914 where the demodulated data signal is decoded. One of the information that the DSP 824 extracts from the decoded data signal is whether the demodulated signal is an all data or a data/voice signal. This determination is represented by a decision block 916 where a decision is made as to whether the demodulated signal is an all data signal. The YES output of block 916 is explained later with reference to FIG. 9B. The NO output of block 916 is connected to a determine the start of voice block 918.

In a datavoice signals the pre-amble data signal preceding voice contains such timing information as the start of the voice signal, the duration of the voice signal, the duration of the pre-amble data, the presence of post-amble data, etc... These timing information assist the DSP 824 in synchronizing its gate control lines appropriately. The output of block 918 is connected to a block 920 where a command is issued via the gate control line 936 to a gate demodulated signal block 922 to close the demodulated signal gate simultaneously with the start of the voice signal with no delay. As stated before, the input to the gate demodulated signal block 922 is routed from the demodulate received signal block 908. The output of the gate demodulated signal block 922 is connected to an amplify signal block 928. Note that the signal at this point has been determined to be voice and has no data portions. The output of the amplify voice block 928 is connected to an output the audio block 932. The block 932 couples the demodulated voice to the speaker 820. The output of block 932 is connected to a condition block 934 where the end of audio is detected. The NO output of block 934 is looped back into block 934 so as to continue presenting the demodulated voice to the speaker 820. The YES output of the condition block 934 is connected to an open gate block 924 where a gate control line 942 commands block 922 to open. The output of the open gate block 924 is connected back to the input of the monitor channel activity block 904 starting the cycle over again. The output of the delay demodulated signal block 910 is connected to a block 926 where the delayed demodulated audio signal is gated. The gate control lines 938 and 940 command the gate of block 926 to close and open respectively. The gate control line 938 is the output of a close gate block 930. The input of block 930 is connected to the NO output of block 912. In the event that no data has been detected as indicated by the NO output of the decision block 912, the DSP 824 assumes that a signal with no data contents has been received. Such a voice only signal can not be applied to the speaker 820 in real time for a portion of it has already been lost while being detected by the detection block 912. For this reason the close gate block 930 commands the gate of block 926 to close applying the delayed demodulated signal to the speaker 820 via the blocks 928 and 932. This action avoids the loss of a segment of the voice signal and furthermore stops data bursts from getting to the speaker 820. The gate control line 940 controlling the gate of block 926 is controlled by the open gate block 924.

Referring to FIG. 9B now, a continuation from point (A) of the flow chart 900 is shown. The YES output (A) of block 916 is connected to an alert user of receipt of signal block 950. The alerting of the user may be in the form of a displayed signal on the display 830 or a tone on the speaker 820. Since at this point the received signal has been determined to be data the DSP 824 continues its operation by displaying the received data signal on the display 830. This is accomplished by a display received signal block 952. The output of block 952 is connected to a condition block 954 where a decision is made as to whether the end of data has been detected. The NO output of the decision block 954 is looped back into block 954. The YES output is connected to (B) which is the input to the monitor channel activity block 904. This provides the final loop back for situations that a data signal has been detected.

In summary, the circuits of the receiver 800 stop data signals in a data/voice system from being heard on the speaker 820 without sacrificing efficiency. A delay circuit delays the received signal while its contents are analyzed. With signals having a pre-amble data the voice portion of the received signal is coupled to the speaker 820 real time bypassing the delay circuit. With no pre-amble data the received signal is coupled to the speaker 820 after being delayed. The speaker 820 is muted for the duration of an all data signal. Such a mechanism provides for a higher efficiency and a higher system throughput.

Those skilled in the art will recognize that various modifications and changes could be made with respect to the above described invention, without departing from the spirit and scope of the invention as set forth. Therefore, it should be understood that the claims are not to be considered as limited to the particular embodiments set forth in the absence of specific limitations expressly incorporating such embodiments.

What is claimed is:

Claims

1. A receiver for receiving a carrier signal modulated with an information signal, said receiver having an audio output device and comprising: demodulator means for demodulating the carrier signal; delay means coupled to the demodulator means for delaying the demodulated signal; decoder means coupled to the demodulator means for decoding a data portion followed by a voice portion of the information signal for determining the start of the voice portion; coupler means responsive to the decoder means for coupling the demodulator means to the audio output device substantially simultaneously with the start of the voice portion.

2. The receiver of claim 1 , further comprising: detector means for detecting the presence of a voice portion of the information signal with no preceding data portions; and coupler means responsive to the detector means for coupling the delayed demodulated signal to the audio output device.

3. The receiver of claim 1 , wherein the decoder means includes means for determining the duration of the voice portion and the data portion from the pre-determined format of the data portion.

4. The receiver of claim 1 , wherein the decoder means includes means for decoding digitized voice.

5. The receiver of claim 1 , wherein said coupler comprises a switch.

6. A receiver for receiving a carrier signal modulated with an information signal having a data portion with a pre-determined format and a voice portion, said receiver having an output and comprising: demodulator means for demodulating the carrier signal; delay means for delaying the demodulated signal; control means for determining when the demodulated signal shoufd be coupled to the output of the receiver with no delay.

7. The receiver of claim 6, further including a decoder for decoding the pre-determined format of the data portion and determining the exact start time of the voice portion.

8. The receiver of claim 6, wherein the control means includes means for coupling the demodulated voice portion to the output of the receiver substantially simultaneously with the start of the voice portion.

9. In a receiver having an output and used for receiving a carrier signal modulated with a data signal having a pre¬ determined format followed by a voice signal, a method for unmuting the output comprising the steps of: demodulating the received carrier signal; delaying the demodulated signal for a time interval; decoding the demodulated signal for determining the start of the voice signal; coupling the demodulated signal to the output before it has been delayed and synchronously with the start of the voice signal.

10. The method of claim 9, further including the steps of: coupling the demodulated signal after it has been delayed when no data has been detected; and leaving the output of the receiver unmuted for the duration of the voice signal.