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WO1991007030A1 - Procede de synchronisation repartie pour systeme de radiocommunications rapides de paquets - Google Patents

Procede de synchronisation repartie pour systeme de radiocommunications rapides de paquets Download PDF

Info

Publication number
WO1991007030A1
WO1991007030A1 PCT/US1990/006011 US9006011W WO9107030A1 WO 1991007030 A1 WO1991007030 A1 WO 1991007030A1 US 9006011 W US9006011 W US 9006011W WO 9107030 A1 WO9107030 A1 WO 9107030A1
Authority
WO
WIPO (PCT)
Prior art keywords
packet
frame
sync
time
voice
Prior art date
Application number
PCT/US1990/006011
Other languages
English (en)
Inventor
Michael P. Nolan
Thomas A. Freeburg
Hungkun J. Chang
Farzad Farhangnia
Original Assignee
Motorola, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola, Inc. filed Critical Motorola, Inc.
Publication of WO1991007030A1 publication Critical patent/WO1991007030A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/64—Hybrid switching systems
    • H04L12/6418—Hybrid transport
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658—Clock or time synchronisation among packet nodes
    • H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
    • H04J3/0664—Clock or time synchronisation among packet nodes using timestamps unidirectional timestamps
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0676—Mutual
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W56/00—Synchronisation arrangements
    • H04W56/004—Synchronisation arrangements compensating for timing error of reception due to propagation delay
    • H04W56/0045—Synchronisation arrangements compensating for timing error of reception due to propagation delay compensating for timing error by altering transmission time
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/64—Hybrid switching systems
    • H04L12/6418—Hybrid transport
    • H04L2012/6421—Medium of transmission, e.g. fibre, cable, radio, satellite
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/64—Hybrid switching systems
    • H04L12/6418—Hybrid transport
    • H04L2012/6445—Admission control
    • H04L2012/6462—Movable boundaries in packets or frames

Definitions

  • This invention pertains to voice/data packet switches and, more particularly, to a distributed synchronization method for a wireless fast packet communication system.
  • Voice and data switches are known in the prior art. Packet switching is also known. In the past, however, synchronization for the control of the devices sending and receiving information packets in a voice/data packet switch has been a problem. This problem has been related to the problem of dynamically allocating the packet bandwidth between the various peripheral devices attached to the switch for voice information and data information. Another related factor has been the network interface architecture for the switch. The network interface architectures of past switches have used the same bus for both data and control. When coupled with the problem of dynamically allocating bandwidth on the bus, this network interface architecture has resulted in the switch having a low switching capacity and throughput. In PBX's, it is because all data is switched byte-by-byte, in data packet switches, it is a processor horsepower issue. These performance problems become even more significant in the context of modern fast packet protocols. It would be desirable, therefore, to provide a voice/data packet switch with an improved architecture.
  • the distributed synchronization method provides for the combination of both voice and data in a single switch using a common packet structure. It allows for the dynamic synchronization of packets. This includes not only bandwidth within the voice or data areas of the frame, but also between the voice and data portions.
  • Fig. 1 is a block diagram that shows a first embodiment of a wireless fast packet communication system, according to the invention.
  • Fig. 2 shows a frame for the first embodiment.
  • Fig. 3 shows the voice/fixed data area within the frame.
  • Fig. 4 shows the packetized data area within the frame.
  • Fig. 5 shows a typical network topology for the first embodiment.
  • Fig. 6 shows a first synchronization timing diagram for the first embodiment.
  • Fig. 7 shows a second synchronization timing diagram for the first embodiment.
  • Table A shows the code for accomplishing the synchronization method, according to the invention.
  • Fig. 1 is a block diagram that shows a first embodiment 100 of a wireless fast packet communication system, according to the invention. There is shown a node 103 and a user terminal (UT) 101. It will be appreciated by those skilled in the art that a multiplicity of UT's may be used. However, for simplicity only one is shown in Fig. 1.
  • the voice input from the PSTN 133 is compressed and filtered by the telephone interface 135, and forwarded to the A/D 137 for digitization. From there, it is placed into voice packets in the local memory 139 of the master processor 140 and forwarded by the master processor via the FIFO into the local memory 141 of the slave processor 143. There the slave processor gives the packet to the LAN co-processor 145 for serialization to the RF equipment 147, and the LAN co-processor converts it into a serial data stream 149.
  • the RF equipment 147 comprising a receiver/transmitter/antenna combiner, creates an RF signal and feeds it to the RF antenna 151.
  • the software contained within the LAN board and the software contained within the master processors in the computer systems perform all of the above and following functions.
  • the UT 101 includes an RF antenna 105 connected to a receiver/transmitter/antenna combiner 107. Power and control of the RF equipment is performed by wires 109.
  • the RF equipment 107 receives a serial data stream from the RF signal 111 , and feeds the serial data stream 113 to a LAN co-processor 115.
  • a LAN board (which contains the LAN co-processor 115, slave processor 117, and its associated local memory 119) receives the data stream and converts it into voice packets into the local memory 119 of the slave processor 117.
  • the slave processor then strips and forwards the voice packets using the FIFO 121 to the master processor's local memory 123 for reconstruction into voice using software contained within the computer system using the D/A converter 125 in the computer system.
  • the telephone interface 127 expands and filters the outgoing analog voice signal, and presents it to the telephone 129. Additionally, local ringing of the telephone 129 is accomplished by fast data packets being processed in common by the above system up to and including the master processor memory unit 123, and then the Master processor places the ring indication in the I/O port 131 , which is then fed to the telephone interface 127 and forwarded to the telephone 129.
  • This frame 200 is shown in Fig. 2.
  • A-H time slots allocated to fixed rate data and voice, and are assigned without collision by the node.
  • A-H time slots allocated to fixed rate data and voice, and are assigned without collision by the node.
  • A-H time slots allocated to fixed rate data and voice, and are assigned without collision by the node.
  • packetized data area each device is free to broadcast at any time, and is responsible for detecting collisions.
  • Each transmission within a frame may be encoded in order to improve the accuracy of the received data. If this code utilizes several copies of the original data, the arrival times of similar packets may be different. In this case, an algorithm in software compensates for the different arrival times.
  • This system allows for maximum spectral efficiency by allocating the required bandwidth to each of the users of the common communications path.
  • previous systems did not allocate the bandwidth on a need basis, but rather allocated the bandwidth at system start-up.
  • this system takes advantage of the fast packet switching technology that allows both circuit and non- circuit connections to be made in the same system.
  • Fig. 5 shows a typical network topology 500 for the first embodiment.
  • a multiplicity (n) of nodes, N-i through N n There is also shown a multiplicity (n) of terminals T-i through T n .
  • the nodes communicating with each other and with the terminals on a shared communications path via a fast-packet-switched mechanism, the fast- packet-switched mechanism being controlled by a bandwidth allocation scheme preventing collision between the various units that may be accessing the common communications path.
  • the receiver's action is actually quite simple -- it extracts the time- oMransmission described above, and compares it to the reception-time stamp provided by the NI, adjusting for propagation delays in the buffers and communications equipment. Assuming there is a significant error, it must then determine the proper direction to shift its NI to find sync in the shortest time; the required adjustment will always be between a negative 1/2 and a positive 1/2 frame.
  • This total computed error is then divided by a stability factor such as, for example, 16, to preserve stability in the situation where one device may be receiving several other unsynchronized devices. Further checks are then made to allow for the limit case and to limit the adjustment to whole words (even addresses only) as required by the current Network Interface design.
  • a stability factor such as, for example, 16, to preserve stability in the situation where one device may be receiving several other unsynchronized devices. Further checks are then made to allow for the limit case and to limit the adjustment to whole words (even addresses only) as required by the current Network Interface design.
  • the overall scheme also allows for determining the exact instant when synchronization is acquired, and a (fairly slow) determination of lost sync. This is accomplished by creating a global variable 'in_sync'. This variable is decremented by one (with a lower limit of zero) on every frame start interrupt, and is incremented by 16 (up to an upper limit that depends on the system size such as, for example, 400) every time a frame sync packet is processed that requires no adjustment to the frame time; that is, every time frame sync is determined to be perfect. When 'in_sync' is zero, the system is out of sync.
  • the receiver-enable command sequence is designed to abort the process of receiving a packet, if it occurs during the packet.
  • One way of achieving this is to require that every frame contain a "receiver enable" sequence consisting of the following commands:
  • Fig. 6 The problem that arises can be seen in Fig. 6.
  • the problem occurs when the first sync packet is decoded, if the receiving device's clock is slightly faster than the node's (this, of course, will be the case one-half of the time).
  • the computed adjustment would move the receiving frame to the left, and thus put the control sequence right on top of the next received sync packet. This packet will be missed, and normal drift will move succeeding receive frames to the right until the control sequence occurs after the sync packet.
  • another sync packet will be received, an adjustment to the left computed, and the sequence repeated.
  • the net effect is to line the control sequence up with the sync packet, rather than to align the frames.
  • each device in the system will continue to synchronize on the average of all the frame clocks it can see, including its own.
  • This concept results in the best overall timing performance, and therefore in the smallest required guard times between packets from different devices. For example, a chain of four nodes could exhibit a frame-time difference of 6 bytes from the first to the last; the average difference will depend on the relative free-running clock frequencies of the 4 NTs involved, and could well remain at the worst case stated above.
  • the averaging method on the other hand, will cause the average difference to stay at zero.
  • An additional consideration is fallback -- the appropriate action to take in the event of a failure.
  • each node includes both frame phase and absolute frame rate (the frame size can be varied over quite wide limits, and need not be fixed at the "system” rate until overall sync is obtained).
  • a properly-chosen random-number-based frame rate and phase will almost certainly provide an adequate initialization procedure, as long as the random number generators in the various nodes can be seeded with different numbers, to avoid identical actions from an identical starting point, such as might be provided by recovery from a major power failure.
  • This requirement may be met by the inclusion of an electronic serial number in each unit.
  • each node sends a frame-sync packet on each sector in every frame.
  • each node/sector radiates a frame-sync on every 4th frame. This would allow UIM/NIM's to re-evaluate their local antenna selection once every 24 frames (48 ms), and would allow a worst-case frame-sync timing update of once every 24 frames, well within the 27-frame worst-case limit calculated earlier.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

Procédé de synchronisation répartie pour système de radiocommunication rapide de paquets (100). Le procédé de synchronisation répartie, selon l'invention, prévoit la combinaison à la fois de la voix et de données dans un seul commutateur, à l'aide d'une structure de paquet commune. Il permet la synchronisation dynamique de paquets. Cela comprend non seulement la largeur de bande se trouvant dans les zones de voix ou de données du bloc, mais également entre les parties de voix et de données.
PCT/US1990/006011 1989-10-24 1990-10-19 Procede de synchronisation repartie pour systeme de radiocommunications rapides de paquets WO1991007030A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US42613489A 1989-10-24 1989-10-24
US426,134 1989-10-24

Publications (1)

Publication Number Publication Date
WO1991007030A1 true WO1991007030A1 (fr) 1991-05-16

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PCT/US1990/006011 WO1991007030A1 (fr) 1989-10-24 1990-10-19 Procede de synchronisation repartie pour systeme de radiocommunications rapides de paquets

Country Status (6)

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AU (1) AU7741291A (fr)
CS (1) CS520190A3 (fr)
HU (1) HUT58172A (fr)
IL (1) IL95920A0 (fr)
PL (1) PL287486A1 (fr)
WO (1) WO1991007030A1 (fr)

Cited By (38)

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US5184347A (en) * 1991-07-09 1993-02-02 At&T Bell Laboratories Adaptive synchronization arrangement
US5195091A (en) * 1991-07-09 1993-03-16 At&T Bell Laboratories Adaptive synchronization arrangement
US5195090A (en) * 1991-07-09 1993-03-16 At&T Bell Laboratories Wireless access telephone-to-telephone network interface architecture
US5278892A (en) * 1991-07-09 1994-01-11 At&T Bell Laboratories Mobile telephone system call processing arrangement
EP0615363A1 (fr) * 1993-03-06 1994-09-14 NCR International, Inc. Dispositif de réseau local sans fils
EP0621998A1 (fr) * 1992-01-16 1994-11-02 Qualcomm Inc Procede et appareil pour le formatage de donnees en vue de leur transmission.
WO1995002294A1 (fr) * 1993-07-09 1995-01-19 Apple Computer, Inc. Systeme et procede de synchronisation distribuee
US5504773A (en) * 1990-06-25 1996-04-02 Qualcomm Incorporated Method and apparatus for the formatting of data for transmission
US5568483A (en) * 1990-06-25 1996-10-22 Qualcomm Incorporated Method and apparatus for the formatting of data for transmission
WO1997032420A1 (fr) * 1996-02-27 1997-09-04 Ericsson Inc. Circuit et procede pour transmettre les signaux vocaux et les signaux de donnees par un canal de transmission sans fil
US5715236A (en) * 1990-06-25 1998-02-03 Qualcomm Incorporated System and method for generating signal waveforms in a CDMA cellular telephone system
US5777990A (en) * 1995-02-28 1998-07-07 Qualcomm Incorporated Method and apparatus for providing variable rate data in a communications system using non-orthogonal overflow channels
US5859840A (en) * 1996-05-31 1999-01-12 Qualcomm Incorporated Spread spectrum communication system which defines channel groups comprising selected channels that are additional to a primary channel and transmits group messages during call set up
US5893035A (en) * 1996-09-16 1999-04-06 Qualcomm Incorporated Centralized forward link power control
US5949814A (en) * 1997-01-15 1999-09-07 Qualcomm Incorporated High-data-rate supplemental channel for CDMA telecommunications system
US5991284A (en) * 1997-02-13 1999-11-23 Qualcomm Inc. Subchannel control loop
US6035209A (en) * 1995-03-31 2000-03-07 Qualcomm Incorporated Method and apparatus for performing fast power control in a mobile communication system
WO2000038353A1 (fr) * 1998-12-21 2000-06-29 Koninklijke Philips Electronics N.V. Procede de synchronisation protocole mac dans des reseaux sans fil du type amrt
US6097972A (en) * 1997-08-29 2000-08-01 Qualcomm Incorporated Method and apparatus for processing power control signals in CDMA mobile telephone system
WO2001059965A1 (fr) * 2000-02-09 2001-08-16 Koninklijke Philips Electronics N.V. Procede de synchronisation d'horloges entre des noeuds, dans un reseau de transmission par paquets
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US6335922B1 (en) 1997-02-11 2002-01-01 Qualcomm Incorporated Method and apparatus for forward link rate scheduling
US6389000B1 (en) 1997-09-16 2002-05-14 Qualcomm Incorporated Method and apparatus for transmitting and receiving high speed data in a CDMA communication system using multiple carriers
WO2002001735A3 (fr) * 2000-06-21 2002-10-17 Pulse Link Inc Systeme armt sans fil et procede permettant des communications de reseau
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US6728257B1 (en) 1998-08-28 2004-04-27 The Board Of Trustees Of The University Of Illinois Fluid flow fair scheduling emulation in wireless shared channel packet communication network
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US8213485B2 (en) 1996-05-28 2012-07-03 Qualcomm Incorporated High rate CDMA wireless communication system using variable sized channel codes
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Cited By (73)

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US6693951B1 (en) 1990-06-25 2004-02-17 Qualcomm Incorporated System and method for generating signal waveforms in a CDMA cellular telephone system
US5511073A (en) * 1990-06-25 1996-04-23 Qualcomm Incorporated Method and apparatus for the formatting of data for transmission
US5504773A (en) * 1990-06-25 1996-04-02 Qualcomm Incorporated Method and apparatus for the formatting of data for transmission
US5568483A (en) * 1990-06-25 1996-10-22 Qualcomm Incorporated Method and apparatus for the formatting of data for transmission
US5715236A (en) * 1990-06-25 1998-02-03 Qualcomm Incorporated System and method for generating signal waveforms in a CDMA cellular telephone system
US7003021B2 (en) 1990-06-25 2006-02-21 Qualcomm Incorporated System and method for generating signal waveforms in a CDMA cellular telephone system
US6618429B2 (en) 1990-06-25 2003-09-09 Oualcomm Incorporated System and method for generating signal waveforms in a CDMA cellular telephone system
EP0522775A3 (en) * 1991-07-09 1993-10-20 American Telephone & Telegraph Adaptive synchronization arrangement
US5305308A (en) * 1991-07-09 1994-04-19 At&T Bell Laboratories Wireless access telephone-to-telephone network interface architecture
US5278892A (en) * 1991-07-09 1994-01-11 At&T Bell Laboratories Mobile telephone system call processing arrangement
US5184347A (en) * 1991-07-09 1993-02-02 At&T Bell Laboratories Adaptive synchronization arrangement
EP0522774A3 (en) * 1991-07-09 1993-10-27 American Telephone & Telegraph Adaptive synchronization arrangement
US5195090A (en) * 1991-07-09 1993-03-16 At&T Bell Laboratories Wireless access telephone-to-telephone network interface architecture
US5195091A (en) * 1991-07-09 1993-03-16 At&T Bell Laboratories Adaptive synchronization arrangement
EP0621998A1 (fr) * 1992-01-16 1994-11-02 Qualcomm Inc Procede et appareil pour le formatage de donnees en vue de leur transmission.
EP0621998A4 (fr) * 1992-01-16 1995-01-18 Qualcomm Inc Procede et appareil pour le formatage de donnees en vue de leur transmission.
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US7751371B2 (en) 1995-02-28 2010-07-06 Qualcomm Incorporated Method and apparatus for providing variable rate data in a communications system using non-orthogonal overflow channels
US7167460B2 (en) 1995-02-28 2007-01-23 Qualcomm Incorporated Method and apparatus for providing variable rate data in a communications system using non-orthogonal overflow channels
US5777990A (en) * 1995-02-28 1998-07-07 Qualcomm Incorporated Method and apparatus for providing variable rate data in a communications system using non-orthogonal overflow channels
US6035209A (en) * 1995-03-31 2000-03-07 Qualcomm Incorporated Method and apparatus for performing fast power control in a mobile communication system
WO1997032420A1 (fr) * 1996-02-27 1997-09-04 Ericsson Inc. Circuit et procede pour transmettre les signaux vocaux et les signaux de donnees par un canal de transmission sans fil
US5825776A (en) * 1996-02-27 1998-10-20 Ericsson Inc. Circuitry and method for transmitting voice and data signals upon a wireless communication channel
US8213485B2 (en) 1996-05-28 2012-07-03 Qualcomm Incorporated High rate CDMA wireless communication system using variable sized channel codes
US8588277B2 (en) 1996-05-28 2013-11-19 Qualcomm Incorporated High data rate CDMA wireless communication system using variable sized channel codes
US5859840A (en) * 1996-05-31 1999-01-12 Qualcomm Incorporated Spread spectrum communication system which defines channel groups comprising selected channels that are additional to a primary channel and transmits group messages during call set up
US5893035A (en) * 1996-09-16 1999-04-06 Qualcomm Incorporated Centralized forward link power control
US8891663B2 (en) 1996-10-29 2014-11-18 Qualcomm Incorporated Method and apparatus for providing high speed data communications in a cellular environment
US6496543B1 (en) 1996-10-29 2002-12-17 Qualcomm Incorporated Method and apparatus for providing high speed data communications in a cellular environment
EP1755350A2 (fr) * 1996-12-26 2007-02-21 Ntt Mobile Communications Network Inc. Circuit de synchronisation de trame
EP1739861A3 (fr) * 1996-12-26 2007-07-11 Ntt Mobile Communications Network Inc. Procédé et circuit de synchronisation de trames
EP1755350A3 (fr) * 1996-12-26 2007-05-09 Ntt Mobile Communications Network Inc. Circuit de synchronisation de trame
US7362715B2 (en) 1996-12-26 2008-04-22 Ntt Mobile Comunications Network, Inc. Frame synchronization circuit
US7403489B2 (en) 1996-12-26 2008-07-22 Ntt Mobile Communications Network Inc. Frame synchronization circuit
US6298051B1 (en) 1997-01-15 2001-10-02 Qualcomm Incorporated High-data-rate supplemental channel for CDMA telecommunications system
US6501787B1 (en) 1997-01-15 2002-12-31 Qualcomm Incorporated High-data-rate supplemental channel for CDMA telecommunications system
US5949814A (en) * 1997-01-15 1999-09-07 Qualcomm Incorporated High-data-rate supplemental channel for CDMA telecommunications system
US6574210B2 (en) 1997-01-15 2003-06-03 Qualcomm Incorporated High-data-rate supplemental channel for CDMA telecommunications system
US6842477B2 (en) 1997-01-15 2005-01-11 Qualcomm Incorporated High-data-rate supplemental channel for CDMA telecommunications system
US6173007B1 (en) 1997-01-15 2001-01-09 Qualcomm Inc. High-data-rate supplemental channel for CDMA telecommunications system
US7054293B2 (en) 1997-02-11 2006-05-30 Qualcomm Incorporated Method and apparatus for forward link rate scheduling
US6335922B1 (en) 1997-02-11 2002-01-01 Qualcomm Incorporated Method and apparatus for forward link rate scheduling
US8396033B2 (en) 1997-02-11 2013-03-12 Qualcomm Incorporated Method and apparatus for forward link rate scheduling
US7843863B2 (en) 1997-02-13 2010-11-30 Qualcomm Incorporated Subchannel control loop
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HU906497D0 (en) 1991-04-29
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AU7741291A (en) 1991-05-31
IL95920A0 (en) 1991-07-18
PL287486A1 (en) 1991-07-29

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