US8262921B2 - Substrate processing method, substrate processing apparatus and recording medium - Google Patents
Substrate processing method, substrate processing apparatus and recording medium Download PDFInfo
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- US8262921B2 US8262921B2 US12/276,781 US27678108A US8262921B2 US 8262921 B2 US8262921 B2 US 8262921B2 US 27678108 A US27678108 A US 27678108A US 8262921 B2 US8262921 B2 US 8262921B2
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Images
Classifications
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/321—Radio frequency generated discharge the radio frequency energy being inductively coupled to the plasma
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- H01—ELECTRIC ELEMENTS
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- H01J37/32431—Constructional details of the reactor
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
- H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
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- H01L21/31138—Etching organic layers by chemical means by dry-etching
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
Definitions
- the present invention relates to a substrate processing method, a substrate processing apparatus and a recording medium, which may be adopted when continuously executing specific processes on a substrate such as a semiconductor wafer or an FPD glass substrate.
- a semiconductor device adopting a multilayer wiring structure needs to include trench wiring that connects various elements laid out along the horizontal direction and via-hole wiring that connects various elements layered along the vertical direction.
- a wiring structure constituted with a low-dielectric constant insulating film (hereafter may be referred to as a “low-k film”) and a copper wiring such as that described above, may be formed as described below through, for instance, the damascene method.
- an insulating film is formed on a semiconductor wafer (hereafter may be referred to as a “wafer”) which is the processing target substrate and a wiring layer is formed by burying a copper wiring in the insulating film.
- an etching stopper film, an interlayer insulating film constituted of a low-k material, a capping film and an anti-reflection coating are formed in this order over the wiring layer.
- a photoresist film with a specific pattern corresponding to the wiring pattern is formed over the anti-reflection coating by using a photolithography technology.
- the photoresist film is used as a mask while etching through the anti-reflection coating, the capping film, the low-k film and the etching stopper film.
- a groove (trench) or a hole (via) to be used as a wiring recess is formed at the low-k film, with the surface of the copper wiring exposed at the bottom of the wiring groove or the wiring hole.
- the wafer undergoes an ashing process to remove the photoresist film and the anti-reflection coating.
- a wiring metal e.g., copper
- CMP chemical-mechanical polishing
- the low-k film which has become an indispensable element in a multilayer wiring structure as described above, tends to be readily damaged during the etching process or the ashing process.
- An area of the low-k film subjected to such damage readily absorbs water and, as a result, the dielectric constant over the area increases, resulting in an increase in the parasitic capacity between the wirings, which, in turn, may lead to a signal delay and compromise the electrical characteristics such as the insulation resistance.
- a restoration process for restoring the film quality by repairing the damaged area of the low-k film or by rendering the low-k film hydrophobic is executed on the wafer having undergone the ashing process in the related art (see, for instance, patent reference literatures 1 and 2 listed below.
- a restoration process is executed on the ashed wafer by using a gas (hereafter referred to as a “silylating gas”) containing a silylating agent such as TMSDMA (dimethylaminotrimethyl silane) or DMSDMA (dimethylsilyldimethylamine) without transferring the wafer into another processing chamber.
- a silylating gas such as TMSDMA (dimethylaminotrimethyl silane) or DMSDMA (dimethylsilyldimethylamine)
- the silylating gas used in the restoration processing in the related art tends to ignite at a relatively low temperature.
- the ignition point (explosion limit temperature) of TMSDMA is approximately 220° C. This means that the silylating gas may ignite as the silylating gas to be use in the restoration process is delivered into the processing chamber if the temperature of the wafer having undergone the ashing process in the same processing chamber is high.
- the ashing process with oxygen radicals is executed with the wafer temperature set to a lower level (e.g., 100° C. ⁇ 150° C.) than the ignition point of the silylating gas (220° C. in the case of TMSDMA, for instance).
- a lower level e.g. 100° C. ⁇ 150° C.
- the silylating gas delivered into the same processing chamber following the ashing process so as to immediately execute the restoration process in the processing chamber is not likely to ignite.
- Hydrogen radical processing which is executed on the wafer sustaining a higher temperature (e.g., 250° C. ⁇ 400° C.) than the wafer temperature set for the oxygen radical processing, is more problematic in that a silylating gas with a low ignition point (e.g., 220° C.) delivered into the same processing chamber for the restoration process following the hydrogen radical processing is highly likely to ignite.
- a silylating gas with a low ignition point e.g., 220° C.
- the restoration process in the related art executed by using a silylating gas with a low ignition point, cannot be executed in the same processing chamber where the ashing process has been executed with hydrogen radicals. Since this requires allocation of separate processing chambers for the ashing process and the restoration process in, for instance, a cluster-type substrate processing apparatus equipped with a plurality of processing chambers, miniaturization of the substrate processing apparatus and effective utilization of space have been hindered. There is an added concern that if a failure occurs in either the ashing process chamber or the restoration process chamber, continuous wafer transfer will be disabled.
- an object of the present invention having been completed by addressing the issues discussed above, is to provide a substrate processing method and the like, which allow the restoration process to be executed immediately within the same processing chamber following an ashing process executed with hydrogen radicals.
- the inventor of the present invention et al. found it of significant interest that the ignition points of many gases containing a ⁇ -diketone compound often used when forming a metal film in the related art are higher, at 300° C. or more, than the ignition temperatures of the silylating gases used in the related art.
- Tests conducted by the inventor of the present invention et al. revealed that a gas containing a ⁇ -diketone compound can be used in a restoration process executed to restore an area damaged during the etching process or the like.
- a gas unlike the silylating gas used in the related art, normally does not contain ammonia radicals, ammonia salt, which would settle onto the processing target substrate as particles, is not readily formed on the processing target substrate.
- the damaged area is dehydrated more effectively with the gas containing a ⁇ -diketone compound than with the silylating gas in the related art.
- the inventor of the present invention conceived the present invention, which allows the ashing process executed with hydrogen radicals and the restoration process, requiring separate processing chambers in the related art, to be executed in a single processing chamber through the use of a gas containing a ⁇ -diketone compound with an ignition point of 300° C. or higher in the restoration process.
- the object described above is achieved in an aspect of the present invention by providing a substrate processing method adopted when executing a specific type of processing on a processing target substrate that includes a low dielectric constant insulating film, an etching mask formed on the low dielectric constant insulating film and a recessed portion formed by etching with the etching mask the low dielectric constant insulating film, comprising an ashing process step in which the etching mask is removed through ashing with hydrogen radicals delivered to the processing target substrate, heated to sustain a predetermined temperature and a restoration process step in which the low dielectric constant insulating film exposed at the recessed portion is rendered hydrophobic and the film quality of the low dielectric constant insulating film having been damaged in the etching process is restored with a gas containing a ⁇ -diketone compound with an ignition point thereof equal to or higher than 300° C., delivered to the processing target substrate having undergone the ashing process.
- the object described above is also achieved in another aspect of the present invention by providing a computer-readable recording medium having recorded therein a program that enables a computer to execute various steps of a substrate processing method adopted when executing a specific type of processing on a processing target substrate that includes a low dielectric constant insulating film, an etching mask formed on the low dielectric constant insulating film and a recessed portion formed by etching with the etching mask the low dielectric constant insulating film.
- the program enables the computer to execute an ashing process step in which the etching mask is removed through ashing with hydrogen radicals delivered to the processing target substrate, heated to sustain a predetermined temperature and a restoration process step in which the low dielectric constant insulating film exposed at the recessed portion is rendered hydrophobic and the film quality of the low dielectric constant insulating film having been damaged in the etching process is restored with a gas containing a ⁇ -diketone compound with an ignition point thereof equal to or higher than 300° C., delivered to the processing target substrate having undergone the ashing process.
- a gas containing a ⁇ -diketone compound with an ignition point of 300° C. or higher, i.e., higher than the ignition points of the gases used in the related art, is used in the restoration process.
- the restoration process can be successively executed within the same processing chamber.
- the restoration process can be executed by using the ⁇ -diketone compound-containing gas immediately afterwards.
- the temperature of the processing target substrate immediately after the ashing process may be higher than the ignition point.
- the restoration process can be executed with the ⁇ -diketone compound-containing gas after allowing the processing target substrate to cool down to a temperature lower than the ignition point.
- the ignition point of the gas used in the restoration process according to the present invention is 300° C. or higher, which is higher than the ignition points of the gases used in the related art. As a result, the throughput is not lowered significantly.
- the film quality of the damaged area of the low dielectric constant insulating film, having become damaged during the etching process, is restored to a desirable condition and the damaged area can be dehydrated more readily and effectively compared to the related art.
- ashing process and the restoration process be executed in a single processing chamber, so as to eliminate the need to allocate separate processing chambers for the ashing process and the restoration process. Through these measures, miniaturization and more efficient utilization of space are achieved for the substrate processing apparatus.
- the temperature of the processing target substrate may be measured following the ashing process step, the restoration process may be executed immediately afterwards as long as the measured temperature of the processing target substrate is lower than a predetermined temperature set within a range lower than the ignition point of the gas used in the restoration process, but the restoration process may be executed only after the processing target substrate is cooled to a temperature lower than the predetermined temperature if the measured temperature of the processing target substrate is equal to or higher than the predetermined temperature.
- the ⁇ -diketone compound may be, for instance, dipivaloylmethane (DPM) or acetylacetone.
- the ignition point of dipivaloylmethane is approximately 300° C.
- the ignition point of acetylacetone is approximately 350° C.
- gas with a much higher ignition point compared to the silylating gases used in the related art can be used in the restoration process according to the present invention to assume significant advantages.
- neither gas contains an ammonia group and thus neither gas readily forms ammonium salt, which would settle as particles on the processing target substrate.
- either gas is highly effective in restoring the damaged area and induces a desirable dehydrating reaction to dehydrate the damaged area more effectively than the silylating gases used in the related art.
- the object described above is further achieved in yet another aspect of the present invention by providing a substrate processing apparatus equipped with a processing chamber where a specific type of processing is executed on a processing target substrate that includes a low dielectric constant insulating film, an etching mask formed on the low dielectric constant insulating film and a recessed portion formed by etching with the etching mask the low dielectric constant insulating film.
- the processing chamber comprises a plasma generation chamber where hydrogen plasma is generated, a main processing chamber communicating with the plasma generation chamber, a stage disposed within the main processing chamber, upon which the processing target substrate is placed, a temperature adjustment unit that adjusts the temperature of the processing target substrate placed on the stage to a predetermined temperature, a hydrogen-containing gas supply unit that supplies a hydrogen-containing gas into the plasma generation chamber, an induction field forming unit that forms within the plasma generation chamber an induction field used to generate the hydrogen plasma, a ⁇ -diketone compound-containing gas supply unit that supplies a ⁇ -diketone compound-containing gas that contains a ⁇ -diketone compound with an ignition point equal to or higher than 300° C., toward the surface of the processing target substrate placed on the stage, and a exhaust device that evacuates the processing chamber.
- the ashing process executed with hydrogen radicals on the processing target substrate having undergone the etching process, and the restoration process can be executed immediately within the same processing chamber.
- the processing target substrate placed on the stage within the main processing chamber is heated to a specific temperature via the temperature adjustment unit.
- the hydrogen-containing gas is supplied from the hydrogen-containing gas supply unit into the plasma generation chamber, the processing chamber is evacuated and with the pressure inside the processing chamber thus sustained at a predetermined level, plasma is generated by forming an induction field via the induction field forming unit.
- the processing target substrate on the stage is ashed with hydrogen radicals generated from the plasma.
- the restoration process is executed to restore the film quality of the low dielectric constant insulating film having been damaged during the etching process or the like while, at the same time, rendering hydrophobic the low dielectric constant insulating film exposed at the recessed portion.
- the temperature adjustment unit may include a cooling unit that cools the processing target substrate placed on the stage and a heating unit that heats the processing target substrate placed on the stage.
- the present invention provides a substrate processing method and the like, which, through the use of a gas with an ignition point higher than those of the gases used in the related art for the restoration process, allow the restoration process to be executed immediately within the same processing chamber after an ashing process executed with hydrogen radicals at a relatively high temperature.
- FIG. 1 is a lateral sectional view presenting an example of a structure that may be adopted in the substrate processing apparatus achieved in an embodiment of the present invention
- FIG. 2 is a block diagram presenting an example of a structure that may be adopted in the control unit in FIG. 1 ;
- FIG. 3 is a longitudinal sectional view presenting an example of a structure that may be adopted in the post processing chambers in the substrate processing apparatus in the embodiment;
- FIG. 4 is a sectional view presenting a specific example of a film structure that may be assumed in a wafer in the pre-processing state, before undergoing processing in the substrate processing apparatus in the embodiment;
- FIG. 5 presents a flowchart of the wafer processing executed in the substrate processing apparatus in the embodiment
- FIG. 6 is a sectional view presenting a specific example of a film structure that may be assumed at the wafer following the etching process
- FIG. 7 is a sectional view presenting a specific example of a film structure that may be assumed at the wafer following the ashing process
- FIG. 8 is a sectional view presenting a specific example of a film structure that may be assumed at the wafer following the restoration process
- FIG. 9A illustrates part of the process through which particles are formed on the wafer having undergone the etching process
- FIG. 9B illustrates part of the process through which particles are formed on the wafer having undergone the etching process
- FIG. 9C illustrates part of the process through which particles are formed on the wafer having undergone the etching process
- FIG. 9D illustrates part of the process through which particles are formed on the wafer having undergone the etching process
- FIG. 10 is a graph presenting the results obtained by measuring the dielectric constant of the low-k film formed on test wafers having undergone the etching process, the ashing process and the restoration process;
- FIG. 11 is a graph presenting the results obtained by measuring the contact angle of a liquid dropped onto the low-k film formed on test wafers having undergone the etching process, the ashing process and the restoration process.
- FIG. 1 schematically illustrates the structure adopted in the substrate processing apparatus achieved in the embodiment of the present invention.
- the substrate processing apparatus 100 comprises a processing unit 200 equipped with a plurality of processing chambers where various types of processing such as an etching process, an ashing process and processing for restoring a film having been damaged during the etching process and the ashing process to a desirable condition (hereafter also referred to as a “restoration process”) are executed on substrates such as semiconductor wafers W in a low pressure environment, an atmospheric pressure-side transfer unit 300 via which a wafer W is carried into/out of the processing unit 200 and a control unit 120 that executes overall control for the operations executed in the substrate processing apparatus 100 .
- various types of processing such as an etching process, an ashing process and processing for restoring a film having been damaged during the etching process and the ashing process to a desirable condition (hereafter also referred to as a “restoration process”) are executed on substrates such as semiconductor wafers W in
- the transfer unit 300 includes an atmospheric pressure-side transfer chamber 310 via which the wafer W is transferred between a substrate storage container such as a cassette container 102 ( 102 A ⁇ 102 C) and the processing unit 200 .
- the transfer chamber 310 is formed in a box shape with a substantially polygonal section.
- a plurality of cassette stages 302 ( 302 A ⁇ 302 C) are set next to one another along one of the side surfaces of the transfer chamber 310 ranging along the longer side of its substantially polygonal section.
- the cassette containers 102 A ⁇ 102 C can be placed respectively upon the cassette stages 302 A ⁇ 302 C.
- each of the cassette containers 102 up to, for instance, 25 wafers W, with their ends held by a holding portion, are stacked over multiple levels with a uniform pitch for storage.
- the cassette containers have a sealed structure that allows the inner spaces to be filled with, for instance, nitrogen (N2) gas.
- N2 nitrogen
- transfer ports 314 are formed and wafers W can thus be transferred between the individual cassette containers 102 ( 102 A ⁇ 102 C) and the transfer chamber 310 via the transfer ports 314 ( 314 A ⁇ 314 C).
- the numbers of the cassette stages 302 and the cassette containers 102 in the substrate processing apparatus are not limited to the examples presented in FIG. 1 .
- an orienter (pre-alignment stage) 304 to function as a positioning device, which includes a rotary stage 306 and an optical sensor 308 for optically detecting the edge of a wafer W, both provided as built-in units, is located.
- the orienter 304 positions the wafer W by detecting, for instance, an orientation flat or a notch at the wafer W.
- a transfer unit-side transfer mechanism 320 which transfers the wafer W along the lengthwise direction (indicated by the arrow in FIG. 1 ) is disposed.
- a base 322 to which the transfer unit-side transfer mechanism 320 is fixed is slidably supported on a guide rail 324 laid along the lengthwise direction inside the transfer chamber 310 .
- a mover and a stator of a linear motor are respectively disposed at the base 322 and the guide rail 324 .
- a linear motor drive mechanism (not shown) via which the linear motor is driven is disposed. As the linear motor drive mechanism is controlled based upon a control signal sent by the control unit 120 , the transfer unit-side transfer mechanism 320 moves along the lengthwise direction on the guide rail 324 together with the base 322 .
- the transfer unit-side transfer mechanism 320 adopts a double arm structure, which includes two arm units.
- the arm units are articulated, which allows them to extend, retract, move up/down and swing freely to the sides.
- End effectors 326 A and 326 B used to hold wafers W are mounted at the front ends of the arms and thus, the transfer unit-side transfer mechanism 320 is able to handle two wafers W at once.
- wafers W can be carried into/out of, for instance, the cassette containers 102 , the orienter 304 , and first and second loadlock chambers 230 M and 230 N to be detailed later so as to replace a wafer W present in the chamber with a new wafer W.
- a sensor capable of detecting the presence of a wafer W held thereat is mounted at each of the end effectors 326 A and 326 B of the transfer unit-side transfer mechanism 320 .
- the number of arm units in the transfer unit-side transfer mechanism 320 is not limited to that described above and the transfer unit-side transfer mechanism 320 may adopt, for instance, a single arm structure that includes a single arm unit, instead.
- the processing unit 200 in the cluster tool-type processing apparatus 100 in the embodiment includes a common transfer chamber 210 formed to have a polygonal (e.g., a hexagonal) section, a plurality of processing chambers 220 (first through sixth processing chambers 220 A ⁇ 220 F) connected around the common transfer chamber while sustaining air tightness and the first and second loadlock chambers 230 M and 230 N as shown in FIG. 1 .
- a common transfer chamber 210 formed to have a polygonal (e.g., a hexagonal) section, a plurality of processing chambers 220 (first through sixth processing chambers 220 A ⁇ 220 F) connected around the common transfer chamber while sustaining air tightness and the first and second loadlock chambers 230 M and 230 N as shown in FIG. 1 .
- a specific single type of processing or specific different types of processing e.g., an ashing process and a restoration process to be detailed later as well as etching, are executed on wafers W based upon process recipes and the like stored in advance in a storage medium or the like in the control unit 120 .
- Stages 222 ( 222 A ⁇ 222 F) upon which wafers W are placed are respectively disposed inside the individual processing chambers 220 ( 220 A ⁇ 220 F).
- the structures adopted in the individual processing chambers 220 are to be detailed later. It is to be noted that the number of processing chambers 220 is not limited to that shown in FIG. 1 .
- the common transfer chamber 210 adopts a structure that allows its internal space to be controlled to maintain a specific degree of vacuum. Via the common transfer chamber, wafers W are carried to be transferred among the individual processing chambers 220 A ⁇ 220 F and also from the individual chambers 220 A ⁇ 220 F to the first and second loadlock chambers 230 M and 230 N.
- the common transfer chamber 210 is formed in a polygonal shape (e.g., a hexagonal shape), with the processing chambers 220 ( 220 A ⁇ 220 F) connected around the common transfer chamber via gate valves 240 ( 240 A ⁇ 240 F) respectively, with the front ends of the first and second loadlock chambers 230 M and 230 N also connected around the common transfer chamber via gate valves (low pressure-side gate valves) 240 M and 240 N respectively.
- the base ends of the first and second loadlock chambers 230 M and 230 N are connected to the other side surface of the transfer chamber 310 ranging along the longer side of the substantially polygonal section, respectively via gate valves (atmospheric pressure-side gate valves) 242 M and 242 N.
- the first and second loadlock chambers 230 M and 230 N have a function of temporarily holding wafers W and passing them on to the next process upon completing pressure adjustment. Inside the first and second loadlock chambers 230 M and 230 N, transfer stages 232 M and 232 N upon which wafers W can be placed are respectively disposed.
- a processing unit-side transfer mechanism 250 constituted with articulated arms capable of extending, retracting, moving up/down and swinging to the sides are disposed.
- the processing unit-side transfer mechanism 250 includes two end effectors 252 A and 252 B, which enable it to handle two wafers W at once.
- the processing unit-side transfer mechanism 250 is rotatably supported at a base 254 .
- the base 254 slides freely on a guide rail 256 laid out to range from the base end side toward the front end side inside the common transfer chamber 210 via, for instance, a slide-drive motor (not shown).
- a flexible arm 258 through which the wiring for, for instance, an arm swinging motor and the like passes is connected to the base 254 .
- the processing unit-side transfer mechanism 250 structured as described above is able to access the first and second loadlock chambers 230 M and 230 N and the individual processing chambers 220 A ⁇ 220 F by sliding along the guide rail 256 .
- the processing unit-side transfer mechanism 250 should be positioned toward the base end side in the common transfer chamber 210 along the guide rail 256 in order to access the first or second loadlock chamber 230 M or 230 N or either of the processing chambers 220 A and 220 F facing opposite each other.
- the processing unit-side transfer mechanism 250 In order to access any of the four processing chambers 220 B ⁇ 220 E, the processing unit-side transfer mechanism 250 should be positioned toward the front end side of the common transfer chamber 210 along the guide rail 256 .
- all the processing chambers 220 A ⁇ 220 F and both the first loadlock chamber 230 M and the second loadlock chamber 230 N, each connected to the common transfer chamber 210 can be accessed via a single processing unit-side transfer mechanism 250 .
- the processing unit-side transfer mechanism 250 may adopt a structure other than that described above and may include, for instance, two transfer mechanisms. Namely, a first transfer mechanism constituted with an articulated arm capable of extending, retracting, moving up/down and swinging to the sides may be disposed toward the base end side of the common transfer mechanism 210 and a second transfer mechanism constituted with an articulated arm capable of extending, retracting, moving up/down and swinging to the sides may be disposed toward the front end side of the common transfer chamber 210 .
- the number of end effectors in the processing unit-side transfer mechanism 250 does not need to be two and the processing unit-side transfer mechanism may instead include a single end effector.
- FIG. 2 is a block diagram showing the structure adopted in the control unit 120 .
- the control unit 120 controls the overall operations executed in the substrate processing apparatus 100 , such as wafer processing control under which wafers W are processed in the individual processing chambers 220 , displacement control for the transfer unit-side transfer mechanism 320 and the processing unit-side transfer mechanism 250 , open/close control for the various gate valves 240 and 242 and rotation control for the rotary stage 306 at the orienter 304 .
- the control unit 120 that executes such control includes a CPU (central processing unit) 120 constituting the main body of the control unit, a ROM (read-only memory) 124 in which data and the like used by the CPU 122 to control the individual units are stored, a RAM (random-access memory) 126 having a memory area used for various types of data processing executed by the CPU 122 and the like, a display unit 128 constituted with a liquid crystal display or the like, at which operation screens, selection screens and the like are brought up on display, an operation unit (input/output unit) 130 via which the operator is able to input/output various types of data, an alerting unit 132 constituted with an alarm device such as a buzzer, various controllers 134 functioning as module controllers that individually control specific module units such as the processing chambers 220 A ⁇ 220 F, the common transfer chamber 210 , the atmospheric pressure-side transfer chamber 310 and the orienter 304 in the substrate processing apparatus 100 , and a storage unit 140 for storing program data constituting various
- a transfer program 142 based upon which the operations of the transfer unit-side transfer mechanism 320 and the processing unit-side transfer mechanism 250 are controlled, and a processing program 144 executed when processing wafers W in the processing chambers 220 are stored.
- process recipe data 146 indicating processing conditions, e.g., the chamber internal pressures, the gas flow rates, the high frequency power levels and the like, under which the processing is to be executed in the individual processing chambers 220 are stored in the storage unit 140 .
- the data stored in the storage unit 140 which may be constituted with a recording medium such as a flash memory, a hard disk or a CD-ROM, are read out by the CPU 122 as necessary.
- the CPU 122 , the ROM 124 , the RAM 126 , the display unit 128 , the operation unit 130 , the alerting unit 132 , the various controllers 134 and the storage unit 140 constituting the control unit 120 are electrically connected with one another via a bus line 150 which may be a control bus, a system bus or a data bus.
- the substrate processing apparatus 100 may adopt a structure that allows an etching process through which a low-k film formed on the wafer W is selectively etched in a specific pattern and post processes, i.e., an ashing process for removing the etching mask having been used in the etching process and a restoration process for restoring the film quality of the low-k film, to be executed continuously.
- processing chambers 220 A, 220 B, 220 E and 220 F may be assigned to function as etching process chambers and the processing chambers 220 C and 220 D may be assigned to function as processing chambers (hereafter may also be referred to as “post processing chambers”) where the post processes, i.e., the ashing process and the restoration process are executed in succession on a wafer W having undergone the etching process.
- post processing chambers hereafter may also be referred to as “post processing chambers” where the post processes, i.e., the ashing process and the restoration process are executed in succession on a wafer W having undergone the etching process.
- the etching process chambers among the plurality of processing chambers in the substrate processing apparatus 100 assume a structure that enables selective etching of the low-k film formed on the wafer W in a specific pattern by raising to plasma a processing gas delivered into the chamber internal space sustaining a low pressure (e.g., 100 mTorr) and delivering ions and radicals generated as the processing gas is raised to plasma to the wafer W.
- the processing gas used in the etching process may be, for instance, CF 4 gas, CHF 3 gas, C 4 F 8 gas, O 2 gas, He gas, Ar gas, N 2 gas or a mixed gas containing such gases in combination.
- FIG. 3 schematically illustrates the structure adopted in a post processing chamber 400 in the embodiment.
- the post processing chamber 400 includes a substantially cylindrical main processing chamber 402 and a substantially cylindrical bell jar 404 to function as a plasma generation chamber, which is disposed above the main processing chamber in communication with the main processing chamber 402 .
- a transfer port 406 via which the wafer W is transferred out of/into the main processing chamber 402 , is present and the gate valve 240 described earlier is mounted at the transfer port 406 .
- the gate valve 240 As the gate valve 240 is opened, the wafer W can be carried between the post processing chamber 400 and a chamber adjacent to the post processing chamber, i.e., the common transfer chamber 210 in this example.
- the stage 408 includes a cylindrical base portion 410 formed at the bottom surface of the main processing chamber 402 and a faceplate 412 for supporting the wafer W, mounted levelly at the upper surface of the base portion 410 .
- the faceplate 412 is a disk slightly larger than the wafer W.
- the faceplate 412 is constituted of a material with superior thermal conductivity, such as silicon carbide (SiC) or aluminum nitride.
- a plurality of contact pins 414 to contact the lower surface of the wafer W, ranging upright, are disposed.
- the contact pins 414 are constituted of a material identical to that constituting the faceplate 412 , such as ceramic or resin.
- the wafer W, with its lower surface held at the upper ends of the plurality of contact pins 414 is thus supported in a level state.
- a lifter mechanism (not shown) used to place the wafer W transferred into the main processing chamber 402 onto the upper surface of the stage 408 and to lift the wafer off the upper surface of the stage 408 , is disposed to surround the wafer W.
- a temperature adjustment unit that adjusts the temperature of the wafer W placed on the upper surface of the faceplate 412 to a predetermined temperature is installed.
- the temperature adjustment unit is constituted with a cooling unit that lowers the temperature of the wafer W placed on the upper surface of the faceplate 412 and a heating unit that raises the temperature of the wafer W placed on the upper surface of the faceplate 412 .
- a heater 416 constituting the heating unit is mounted in close contact with the rear surface (lower surface) of the faceplate 412 .
- the heater 416 is constituted of a material having superior thermal conductivity, which generates heat as power is supplied thereto, such as SiC.
- a heater power source 418 is electrically connected to the heater 416 and the wafer W placed on the upper surface of the faceplate 412 can be heated to a specific temperature and is allowed to sustain the temperature at the specific level with the power supplied from the heater power source 418 to the heater 416 , which is adjusted to the optimal level.
- the heater 416 assumes the shape of a disk having a diameter substantially equal to that of the wafer W. Thus, the heat from the heater 416 can be distributed evenly to the entire wafer W via the faceplate 412 so as to uniformly heat the wafer W as a whole.
- a cooling block 420 constituting the cooling unit is disposed under the heater 416 .
- the cooling block 420 is allowed to move up/down via an elevator device 424 such as a cylinder supported at a bracket 422 fixed to the lower surface of the main processing chamber 402 . More specifically, the cooling block 420 alternately assumes a state in which it is in contact with the lower surface of the heater 416 (a state in which the cooling block 420 is in thermal communication with the faceplate 412 ) and a state in which it is set apart from the lower surface of the heater 416 (a state in which the cooling block 420 is thermally isolated from the faceplate 412 ). It is to be noted that the cooling block 420 assumes the shape of a circular column with a diameter substantially equal to the diameter of the wafer W and the entire upper surface of the cooling block in the elevated state contacts the rear surface of the heater 416 .
- a coolant passage 426 through which a coolant such as a fluorine group inert chemical (e.g., GALDEN) travels is formed.
- a coolant such as a fluorine group inert chemical (e.g., GALDEN) travels.
- GALDEN a fluorine group inert chemical
- the coolant supply piping 428 and the coolant discharge piping 430 are each constituted with a bellows, a flexible tube or the like, so as to ensure that the delivery/discharge of the coolant is not hindered by the coolant block 420 as it moves up/down via the elevator device 424 mentioned earlier.
- the wafer W placed on the upper surface of the faceplate 412 can be cooled quickly with the cooling block 420 raised via the elevator device 424 and set in contact with the lower surface of the heater 416 . Since the cooling block 420 assumes the shape of a disk with a diameter substantially equal to that of the wafer W, the heat originating from the entire wafer W can be transferred to the cooling block 420 via the faceplate 412 and the heater 416 , and thus, the whole wafer W can be cooled evenly.
- the overall thermal capacity representing that sum of the thermal capacities of the faceplate 412 and the heater 416 , is set lower than the thermal capacity of the cooling block 420 .
- the faceplate 412 and the heater 416 both assume shapes that will ensure that they have relatively small thermal capacities, e.g., a shape with a small thickness, and they are both constituted of a material with good thermal conductivity, such as SiC.
- the cooling block 420 assumes the shape of a circular column with a thickness greater than the sum of the thicknesses of the faceplate 412 and the heater 416 .
- the cooling block 420 When the cooling block 420 is raised and in contact with the lower surface of the heater 416 , heat is transferred from the heater 416 , the faceplate 412 and the wafer W placed on the upper surface of the faceplate 412 to the cooling block 420 . Since the thermal capacity of the cooling block 420 is considerably greater than the thermal capacities of the heater 416 , the faceplate 412 and the wafer W, the wafer W placed on the upper surface of the faceplate 412 can be quickly cooled.
- the faceplate 412 When the cooling block 420 is in the lowered state, away from the lower surface of the heater 416 , the faceplate 412 can be heated with by supplying power to the heater 412 . Since the thermal capacity of the faceplate 412 is relatively small, the faceplate 412 can be promptly heated to a specific temperature and as the faceplate 412 is thus heated, the wafer W placed on the upper surface of the faceplate 412 is also rapidly heated.
- thermocouple 432 A temperature sensor head such as a thermocouple 432 is installed at the faceplate 412 .
- An electrical signal (voltage) generated at the thermocouple 432 indirectly indicates the temperature of the wafer W placed on the upper surface of the faceplate 412 .
- the control unit 120 Based upon the electrical signal received from the thermocouple 432 , the control unit 120 is able to control the level of the power output from the heater power source 418 and move up/down the cooling block by controlling the operation of the elevator device 424 , so as to adjust the temperature of the wafer W to the specific level within a range of, for instance, 180° C. ⁇ 400° C.
- a discharge pipe 434 is connected to the bottom wall of the main processing chamber 402 and a exhaust device 436 equipped with a vacuum pump such as a turbo molecular pump is connected to the discharge pipe 434 .
- a vacuum pump such as a turbo molecular pump
- the bell jar 404 constituted of an electrically insulating material such as quartz or ceramic, includes an induction field forming unit that forms an induction field to be used to generate hydrogen plasma inside the bell jar.
- the induction field forming unit is constituted with a coil 440 wound around the bell jar 404 and a high-frequency power source 442 connected to the coil 440 and capable of supplying high-frequency power with the frequency set within a range of, for instance, 300 kHz ⁇ 60 MHz.
- plasma can be generated through the inductively coupled plasma (ICP) method. Since the plasma is generated in the space above and away from the wafer W, the post processing chamber may also be referred to as a “remote plasma-type (or a downflow plasma-type)” chamber. It is to be noted that while hydrogen plasma is formed through the inductively coupled plasma method in the post processing chamber 400 in the embodiment, the present invention is not limited to this example and it may be adopted in conjunction with, for instance, hydrogen plasma generated through the microwave excitation method. It may also be adopted in conjunction with hydrogen radicals (atomic hydrogen) H* generated by placing a hydrogen-containing gas in contact with a high temperature catalyser (e.g., a high temperature catalyst wire).
- a high temperature catalyser e.g., a high temperature catalyst wire
- a processing gas supply piping 444 is connected at the ceiling wall of the bell jar 404 .
- a hydrogen-containing gas supply unit and a ⁇ -diketone compound-containing gas supply unit are connected to the processing gas supply piping 444 .
- the hydrogen-containing gas supply unit comprises an ashing processing gas supply source 450 from which a hydrogen-containing gas to be used as an ashing processing gas is output, an ashing processing gas supply piping 452 connecting the ashing processing gas supply source 450 with the processing gas supply piping 444 and a mass flow controller 454 and a switching valve 456 disposed at the ashing processing gas supply piping 452 .
- the ⁇ -diketone compound-containing gas supply unit comprises a restoration processing gas supply source 460 from which a gas containing a ⁇ -diketone compound with an ignition point equal to or higher than 300° C., to be used as a restoration processing gas, is output, a restoration processing gas supply piping 462 connecting the restoration processing gas supply source 460 with the processing gas supply piping 444 and a mass flow controller 464 and a switching valve 466 disposed at the restoration processing gas supply piping 462 .
- control unit 120 The operations of the mass flow controllers 454 and 464 and the switching valves 456 and 466 are controlled by the control unit 120 .
- the control unit 120 is able to select a specific processing gas (the ashing processing gas or the restoration processing gas) to be delivered into the post processing chamber 400 and adjust the flow rates of the various processing gases based upon the processing condition (process recipe) data 146 stored in the storage unit 140 .
- a gas with which hydrogen radicals (atomic hydrogen) H* can be generated e.g., hydrogen gas or a mixed gas containing hydrogen gas and an inert gas (such as helium gas, argon gas or neon gas), is used as the ashing processing gas in the embodiment.
- a mixed gas used as the ashing processing gas should contain hydrogen gas mixed with its ratio adjusted to, for instance, 4%.
- the restoration processing gas used in the embodiment should contain a ⁇ -diketone compound with an ignition point equal to or higher than 300° C. More specifically, a gas containing dipivaloylmethane (DPM) (hereafter referred to as “DPM gas”) or a gas containing acetylacetone (hereafter referred to as “acetylacetone gas”) may be used.
- DPM dipivaloylmethane
- acetylacetone gas a gas containing acetylacetone
- the structural formulae (A) for DPM and the structural formulae (B) for acetylacetone are provided below.
- the wafer W undergoes the ashing process in the post processing chamber 400 structured as described above, with its temperature raised to the specific level (e.g., 250° C.) while the hydrogen-containing gas used as the ashing processing gas is supplied into the bell jar 404 and the high-frequency power is supplied from the high-frequency power source 442 to the coil 440 .
- the induction field formed inside the bell jar 404 as a result, plasma is generated from the hydrogen-containing gas inside the bell jar 404 and hydrogen radicals H* are thus generated.
- the hydrogen radicals are then delivered to the wafer W placed on the stage 408 and the wafer W is ashed with the hydrogen radicals. Through this process, the etching mask on the wafer W is removed.
- the wafer W undergoes the restoration process in the post processing chamber 400 with its temperature adjusted to the same level (e.g., 250° C.) as that set for the ashing process while the DPM gas or the acetylacetone gas to be used as the restoration processing gas is delivered into the post processing chamber 400 .
- the DPM gas or the acetylacetone gas delivered to the wafer W placed on the stage 408 the low-k film on the wafer W, having been damaged during the etching process or the ashing process, can be restored to good condition.
- the DPM gas or the acetylacetone gas with in ignition point of 300° C. or higher, higher than the ignition points of the processing gases used in the related art is delivered into the post processing chamber 400 to be used for the restoration process, in addition to the gas used for the hydrogen radical ashing process.
- the restoration process can be executed in succession in the same post processing chamber 400 following the ashing process.
- the ashing process and the restoration process executed in the post processing chamber 400 are to be described in detail later.
- a silylating gas such as TMSDMA or DMSDMA is normally used as the restoration processing gas when restoring the low-k film damaged during the etching process or the ashing process in the related art.
- silylating gases tend to ignite at relatively low temperatures.
- the ignition point of a gas containing TMSDMA (hereafter may be referred to as a “TMSDMA gas”) is approximately 220° C. This means that the silylating gas delivered into the processing chamber for the restoration process may ignite if the temperature of the wafer having undergone the ashing process in the same processing chamber is high.
- the ashing process with oxygen radicals is executed with the wafer temperature set to a lower level (e.g., 100° C. ⁇ 150° C.) than the ignition point of the silylating gas (220° C.).
- a lower level e.g., 100° C. ⁇ 150° C.
- the silylating gas delivered into the same processing chamber following the ashing process so as to immediately execute the restoration processing in the processing chamber is not likely to ignite.
- Hydrogen radical processing which is executed on the wafer sustaining a higher temperature (e.g., 250° C. ⁇ 400° C.) than the wafer temperature set for the oxygen radical processing, is more problematic in that a silylating gas with a low ignition point (e.g., 220° C.) delivered into the same processing chamber for the restoration process following the hydrogen radical processing is highly likely to ignite.
- the restoration process in the related art executed by using a silylating gas with a low ignition point, cannot be executed in the same processing chamber where the ashing
- the ignition point of DPM gas that contains a ⁇ -diketone compound is 300° C.
- the ignition point of an acetylacetone gas also containing a ⁇ -diketone compound is 350° C., both higher than the ignition point of a silylating gas (the ignition point of, for instance, a TMSDMA gas is 220° C.).
- Tests conducted by the inventor of the present invention et al. revealed that a gas containing a ⁇ -diketone compound can be used in a restoration process executed to restore an area damaged during the etching process or the like. It was further learned that significantly greater advantages are achieved by using a ⁇ -diketone compound-containing gas in the restoration process, as detailed later, than those achieved through the restoration process executed by using a silylating gas.
- the ashing process executed with hydrogen radicals and the restoration process are executed in a single post processing chamber 400 made possible through the use of a gas containing a ⁇ -diketone compound with an ignition point of 300° C. or higher (e.g., DPM gas or acetylacetone gas) in the restoration process.
- a gas containing a ⁇ -diketone compound with an ignition point of 300° C. or higher e.g., DPM gas or acetylacetone gas
- a gas containing a ⁇ -diketone compound with an ignition point of 300° C. or higher, i.e., higher than the ignition points of the gases used in the related art, is used in the restoration process.
- the restoration process can be executed continuously within the same post processing chamber 400 .
- the restoration process can be executed by using the ⁇ -diketone compound-containing gas immediately afterwards.
- the temperature of the wafer immediately after the ashing process may be higher than the ignition point.
- the restoration process can be executed with the ⁇ -diketone compound-containing gas after allowing the processing target substrate to cool down to a temperature lower than the ignition point. In this case, too, only a short wait time is required following the ashing process before the restoration process can be executed, since the ignition point of the gas used in the restoration process in the embodiment is 300° C. or higher, which is higher than the ignition points of the gases used in the related art. As a result, the throughput is not lowered significantly.
- the film quality of the damaged area of the low dielectric constant insulating film is restored to a desirable condition and the damaged area can be dehydrated more readily and effectively compared to the related art.
- the cooling block 420 which cools the wafer W on the stage 408 , is installed and thus, the ashed wafer can be quickly cooled. Specifically, after turning off the power supply from the heater power source 418 to the heater 416 , the cooling block 420 is raised by engaging the elevator device 424 in operation until the cooling block is placed in close contact with the lower surface of the heater 416 and the wafer W, placed on the upper surface of the faceplate 412 , can thus be cooled quickly. Through these measures, it is ensured that even when the temperature of the wafer following the ashing process is higher than the ignition point, the wafer is allowed to quickly cool down to a temperature sufficiently lower than the ignition point. Since the length of wait time to elapse before the restoration process is executed is minimized through the temperature monitoring, better throughput is achieved.
- a further improvement in throughput of the restoration process executed in succession to the ashing process can be achieved by selecting an optimal type of processing gas to be used in the restoration process in correspondence to the wafer temperature during the ashing process.
- a gas containing a ⁇ -diketone compound with a higher ignition point may be used when the temperature of the wafer having undergone the ashing process is higher, so as to ensure that the restoration process can be executed with a minimum wait time following the ashing process.
- the substrate processing apparatus 100 equipped with such a post processing chamber 400 can be provided as a more compact unit with the available space therein utilized more efficiently. Furthermore, the substrate processing apparatus is allowed to include a plurality of post process chambers 400 without significantly increasing its installation space. This, in turn, leads to a higher level of reliability of the substrate processing apparatus 100 . Namely, in the event of trouble occurring in a given post processing chamber 400 , the ashing process and the restoration process can still be executed in another post processing chamber 400 .
- the processing on a batch of wafers W can be continuously executed without having to stop the substrate processing apparatus 100 . Consequently, any reduction in the throughput of the substrate processing apparatus 100 can be minimized in the event of trouble. Moreover, since the ashing process and the restoration process can be executed in succession, concurrently in the plurality of post processing chambers 400 , a further improvement in the throughput of the substrate processing apparatus 100 can be achieved.
- FIG. 4 is a sectional view of a specific example of the film structure in an unprocessed wafer W yet to undergo the processing in the substrate processing apparatus 100 .
- the film structure at the wafer W shown in FIG. 4 includes a plurality of films formed over a Si substrate (silicon substrate) 510 .
- a Si substrate silicon substrate
- it includes a base insulating film 520 constituted of SiO 2 or the like, which is formed on top of the Si substrate 510 , a metal layer 522 formed by burying, for instance, Cu in the base insulating film 520 , an etching stopper film 530 constituted of SiC or the like, which is formed over the base insulating film 520 , a low-k film 540 formed over the etching stopper film, which is constituted of a material containing silicon and has a methyl-group (CH 3 group) skeleton, a capping film 550 formed over the low-k film and constituted of SiO 2 or the like, an anti-reflection coating (BARC) 560 formed over the capping film and a photoresist film 570 formed over the anti-reflection coating 570 .
- Such a film structure can be achieved at the wafer W by executing film formation processing and the like in a specific sequence on the Si substrate 510 at a substrate processing apparatus (not shown) different from the substrate processing apparatus 100 .
- the wafer W undergoes a photolithography process and thus, a specific wiring pattern is formed at the photoresist film 570 .
- FIG. 5 presents a flowchart of the processing executed in the substrate processing apparatus 100 in the embodiment.
- the processing sequence is executed on the wafer W at the substrate processing apparatus 100 as the control unit 120 controls the individual units based upon a specific program.
- the processing sequence to be explained in reference to the embodiment includes an etching process, an ashing process and a restoration process executed in this order on a wafer W assuming a film structure such as that shown in FIG. 4 , which is transferred in a low-pressure environment to the individual processing chambers.
- step S 100 the wafer W assuming the film structure shown in FIG. 4 having been taken out of a cassette container 102 , is transferred to one of the processing chambers 220 A, 220 B, 220 E and 220 F designated as etching process chambers in the substrate processing apparatus 100 . More specifically, a wafer W in a cassette container 102 is transferred to the orienter 304 via the transfer unit-side transfer mechanism 320 and the wafer W is then positioned at the orienter The wafer W having been positioned at the orienter 304 is taken back onto the transfer unit-side transfer mechanism 320 which then carries it into either the first loadlock chamber 230 M or the second loadlock chamber 230 N, e.g., the first loadlock chamber 230 M.
- the wafer W in the first loadlock chamber 230 M is carried on the processing unit-side transfer mechanism 250 into one of the processing chambers 220 A, 220 B, 220 E and 220 F designated as the etching process chamber, e.g., the etching process chamber 220 A
- etching process executed in the processing chamber (etching process chamber) 220 A is described in specific terms.
- a processing gas such as CF 4 gas is delivered into the processing chamber 220 A and high-frequency power is supplied between the electrodes disposed within the processing chamber 220 A so as to generate plasma from the processing gas over the wafer.
- the anti-reflection coating 560 , the capping film 550 , the low-k film 540 and the etching stopper film 530 become sequentially and selectively etched with the patterned photoresist film 570 used as a mask.
- a wiring groove (hereinafter, the term “wiring groove” may also refer to a wiring hole) 580 is formed as a recessed portion in the low-k film 540 as shown in FIG. 6 .
- the surface of the low-k film 540 becomes exposed at the side wall of the wiring groove 580 and the surface of the metal layer 522 becomes exposed at the bottom of the wiring groove 580 .
- the low-k film 540 is etched with the process gas such as CF 4 gas, a damaged area is formed near the surface of the low-k film 540 exposed at the wiring groove 580 as shown in FIG. 6 .
- the CH 3 group decreases through a reaction with the fluorine contained in the CF 4 gas and the hydroxyl group (OH group) increases markedly through a reaction with water, resulting in an increase in the dielectric constant of the low-k film 540 .
- the electrical characteristics of semiconductor devices produced as final products from the wafer W may be compromised.
- FIG. 6 schematically illustrates the damaged area 542
- the boundary of the damaged area 542 and an undamaged area is not necessarily as clear as that shown in FIG. 6 .
- a low-k film is normally constituted of a porous material having a high level of water absorption capacity.
- low-k film 540 will absorb water even more readily over the damaged area 542 formed during the etching process, as shown in FIG. 6 . This means that if the wafer W is taken out of the substrate processing apparatus 100 immediately after the etching process without first executing the restoration processing to be detailed later, the low-k film 540 in the damaged state will be exposed at the wiring groove 580 . Under such circumstances, water in the air will be absorbed readily through the damaged area 542 into the low-k film 540 .
- the presence of water 544 in the low-k film 540 degrades the quality of the low-k film 540 both with regard to its electrical characteristics and with regard to its mechanical characteristics.
- the dielectric constant of water is higher than that of air and thus, as the quantity of water 544 contained in the low-k film 540 increases, the overall dielectric constant of the low-k film 540 will increase, resulting in poorer electrical characteristics.
- the shape of the wiring groove 580 with an extremely small width having been formed through etching may lose its intended shape before the wiring metal is embedded therein.
- various types of films including another low-k film cannot be layered upon the low-k film 540 with lowered mechanical strength in a stable manner. In other words, the low-k film 540 may not have the mechanical strength required in a multilayer wiring structure.
- the low-k film 540 does not assure a sufficient level of strength, the low-k film 540 and the film (e.g., the etching stopper film 530 or the capping film 550 ) in contact with the surface of the low-k film may become separated from each other.
- the film e.g., the etching stopper film 530 or the capping film 550
- the low-k film 540 maintain its mechanical strength as well as its electrical characteristics. For this reason, it is essential that following the etching process, a process be executed so as to ensure that as much water as possible is released from the low-k film 540 and that any further absorption of water into the low-k film 540 is minimized.
- a restoration process is executed on the wafer W in the embodiments in order to restore the film quality of the low-k film damaged in the etching process to a desirable state before the wafer W is carried out of the substrate processing apparatus 100 and is exposed to the air.
- the etched wafer W is transferred into either the processing chamber 220 C or 220 D, both structured to function as post processing chambers 400 , in step S 120 in FIG. 5 .
- step S 130 a specific ashing process is executed on the wafer W by using hydrogen radicals.
- This ashing process is now described in specific detail in reference to FIG. 3 .
- the gate valve 240 is opened, the wafer W having undergone the etching process, such as that shown in FIG. 6 , is carried into the main processing chamber 402 and the wafer W is placed onto the stage 408 .
- An explanation is given on an example in which the ashing process is executed in the processing chamber 200 C.
- the gate valve 240 is closed and the main processing chamber 402 and the bell jar 404 are evacuated by the exhaust device 436 until the pressure therein is lowered to a predetermined level (e.g., 1.5 Torr).
- a predetermined level e.g. 1.5 Torr
- a specific ashing processing gas e.g., a mixed gas containing hydrogen gas and helium gas (with the hydrogen gas mixed at a ratio of, for instance, 4%) is delivered from the ashing processing gas supply source 450 via the ashing processing gas supply piping 452 and the processing gas supply piping 444 into the bell jar 404 .
- the flow rate of the ashing processing gas is adjusted via the mass flow controller 454 .
- high-frequency power (e.g., 4000 W) is supplied from the high-frequency power source 442 to the coil 440 .
- high-frequency power e.g., 4000 W
- high-frequency power source 442 is supplied from the high-frequency power source 442 to the coil 440 .
- plasma is formed inside the bell jar 404 under stable conditions and hydrogen radicals H* are generated.
- the hydrogen radicals H* are then supplied downward toward the wafer W placed on the stage 408 within the main processing chamber 402 located below.
- the wafer W is heated to a predetermined temperature (e.g., a processing temperature of 250° C.) optimal for the ashing process and the heated wafer sustains the specific temperature.
- a predetermined temperature e.g., a processing temperature of 250° C.
- FIG. 7 shows the film structure of the wafer W having undergone the ashing process.
- the photoresist film 570 and the anti-reflection coating 560 are removed from the wafer W through the ashing process.
- the switching valve 456 is closed to stop the delivery of the ashing processing gas from the ashing processing gas supply source 450 into the bell jar 404 and also the output of the high-frequency power from the high-frequency power source 442 to the coil 440 is turned off. In addition, the output of the power from the heater power source 418 to the heater 416 is lowered or stopped. The ashing process is thus completed.
- the wafer W is heated to a relatively high temperature of, for instance, 300° C. during the ashing process, water 544 present in the low-k film can be released as well as water present at the surface of the low-k film 540 , in addition to removing the photoresist film 570 and the anti-reflection coating 560 as described above.
- the temperature of the wafer W becomes excessively high, the low-k film 540 will be thermally degraded.
- the predetermined temperature to be achieved at the wafer W during the ashing process within a range of 250° C. ⁇ 400° C., over which water 544 can be efficiently released from the low-k film 540 without degrading the low-k film 540 .
- the metal e.g. copper
- the metal constituting the metal layer 522 exposed at the bottom of the wiring groove 580
- an undesirable metal compound film e.g., a CuF film
- the electrical resistance over the connecting area will increase and, as a result, desirable electrical characteristics cannot be assured in the multilayer wiring structure.
- the embodiment addresses this issue by executing a specific type of ashing process through which any metal compound film (e.g., a CuF film) present over the exposed surface of the metal layer 522 is reduced and removed with the hydrogen radicals. Since the exposed surface of the metal layer 522 is thus cleaned and is restored as a pure metal surface, the surface resistance is greatly lowered.
- any metal compound film e.g., a CuF film
- oxygen-containing plasma plasma raised from an oxygen-containing gas
- oxygen-containing plasma plasma raised from an oxygen-containing gas
- oxygen-containing plasma plasma raised from an oxygen-containing gas
- the low-k film 540 tends to be damaged by oxygen radicals.
- the oxygen radicals which are highly reactive, react with the CH 3 group in the low-k film 540 and through this reaction, an OH group is formed.
- Such damage is extremely difficult to repair. More specifically, a chemical reaction involving oxygen radicals occurs around the damaged area 542 of the low-k film 540 having become damaged during the etching process.
- the shrink layer formed over the damaged area 542 makes it difficult to fully recover from the damage in the damaged area 542 , since the shrink layer hinders full penetration of the processing gas during the subsequent restoration process.
- the hydrogen-containing gas with no oxygen atom content is utilized in the ashing process in the embodiment.
- the Si—H bond can be easily reverted to the initial Si—CH 3 state through the use of DPM gas or acetylacetone gas. Accordingly, by using DPM gas or acetylacetone gas as the processing gas in the restoration process executed after the ashing process, the film quality in the damaged area 542 of the low-k film 540 can be restored to a good condition.
- the water 544 present in the low-k film 540 can be removed and the exposed surface of the metal layer 522 can be cleaned, as well as removing the photoresist film 570 and the anti-reflection coating 560 from the wafer W, which is the main purpose of the process.
- the composition of the low-k film 540 over the damaged area 542 can be altered so that the damaged area 542 is more effectively restored through the restoration process.
- step S 140 a decision is made in step S 140 as to whether or not the temperature of the wafer W is equal to or higher than a predetermined level.
- the temperature of the wafer W is detected before delivering the restoration gas into the processing chamber 220 C, so as to ensure that no ignition of the restoration gas delivered into the processing chamber 220 C for the subsequent restoration process, does not occur. Accordingly, it is desirable to preselect a temperature setting within a range lower than the ignition point of the restoration processing gas, as the predetermined temperature.
- the predetermined temperature should be set by allowing a considerable margin in correspondence to the ignition point of the restoration processing gas.
- the predetermined temperature may be set to 250° C. in conjunction with the DPM gas with an ignition point of approximately 300° C. used as the restoration processing gas, thereby allowing a margin of 50° C. under the 300° C. ignition point.
- the predetermined temperature may be set to 260° C., thereby allowing a margin of 40° C.
- the predetermined temperature may be set to 300° C. in conjunction with the acetylacetone gas with an ignition point of approximately 350° C. used as the restoration processing gas, thereby allowing a margin of 50° C. under the 350° C.
- the predetermined temperature may be set to 3 10° C., thereby allowing a margin of 40° C.
- step S 140 If it is decided in step S 140 that the temperature of the wafer W is lower than the predetermined level, the temperature of the wafer is judged to be at a level at which the restoration processing gas delivered into the processing chamber will not ignite and accordingly, the restoration process is immediately started in step S 160 . If, on the other hand, it is decided in step S 140 that the temperature of the wafer W is equal to or higher than the predetermined level, the wafer W is cooled in step S 150 until its temperature becomes lower than the predetermined level prior to the restoration process.
- the restoration process is started immediately without cooling the wafer following the ashing process.
- the wafer W is allowed to cool down to a temperature sufficiently lower than the ignition point. Since the length of wait time to elapse before the restoration process is executed is minimized through the temperature monitoring, a significant improvement in throughput is achieved over the related art in which the ashing process and the restoration process are executed in separate processing chambers.
- control unit 120 in the embodiment indirectly measures the temperature of the wafer W via a temperature sensor head such as the thermocouple 432 installed at the faceplate 412
- a temperature sensor head such as the thermocouple 432 installed at the faceplate 412
- the present invention is not limited to this example.
- another temperature sensor head may be installed at an area inside the processing chamber 220 C where the temperature rises to a level higher than the temperature of the wafer W and, in conjunction with the additional temperature sensor head, the control unit may determine the optimal timing with which the restoration processing gas should be delivered by taking into consideration the measurement results provided by the additional temperature sensor head as well.
- step S 150 A specific example of the processing executed to cool the wafer W (step S 150 ) is now described.
- the output of the power from the heater power source 418 to the heater 416 is first lowered or stopped and the cooling block 420 is raised by engaging the elevator device 424 in operation until the cooling block comes into close contact with the lower surface of the heater 416 .
- the coolant supplied from the outside the temperature of which is pre-adjusted to, for instance, 25° C., circulates through the cooling block 420 .
- the wafer W can be cooled with the cooling block 420 via the faceplate 412 and the heater 416 simply by placing the cooling block 420 in close contact with the lower surface of the heater 416 .
- the overall wafer W can be easily and rapidly cooled to a temperature lower than the predetermined level (e.g., 260° C.).
- the predetermined level e.g., 260° C.
- a hydrogen radical processing such as the ashing process described above is executed by raising the temperature of the wafer to a high level (e.g., 250° C. ⁇ 400° C.).
- the wafer temperature may be raised even higher, to 400° C. ⁇ 600° C.
- the temperature of the wafer cooled with the cooling block 420 can be rapidly lowered to a level considerably lower than the ignition point of the restoration gas.
- the elevator device 424 is driven to move the cooling block 420 downward away from the lower surface of the heater 416 .
- the level of the power supplied from the heater power source 418 to the heater 416 is controlled so as to sustain the temperature of the wafer W at a predetermined level (e.g., a processing temperature of 250° C.), optimal for the subsequent restoration process.
- the ashed wafer W the temperature of which may still be fairly high, can be rapidly cooled, allowing the restoration process to start as soon as possible.
- the restoration process can be started immediately without cooling the wafer W. For instance, provided that the predetermined temperature is set at 260° C., as described earlier, the restoration process can be started without having to cool the wafer W if the temperature of the ashed wafer W is 250° C. Since the elevator device 424 does not have to be driven to raise the cooling block 420 , the length of wait time to elapse before the restoration process start can be further reduced in this situation.
- step S 160 a specific example of the restoration process is described in reference to drawings.
- the restoration process is executed in the same processing chamber 220 C functioning as the post processing chamber 400 where the wafer W has already undergone the ashing process, without transferring the wafer W to another processing chamber.
- the processing chamber 220 C When executing the restoration process in the processing chamber 220 C (post processing chamber 400 ), the processing chamber 220 C is evacuated by the exhaust device and the pressure therein is lowered to a predetermined level (e.g., 50 Torr). Then, the switching valve 466 is opened and a specific restoration processing gas, e.g., DPM gas or acetylacetone gas is delivered from the restoration processing gas supply source 460 via the restoration processing gas supply piping 462 and the processing gas supply piping 444 into the bell jar 404 . The flow rate of the restoration processing gas, is adjusted via the mass flow controller 464 .
- a specific restoration processing gas e.g., DPM gas or acetylacetone gas
- the temperature of the wafer W is sustained via the heater 416 at the optimal level (e.g., a processing temperature of 250° C.) for the restoration process.
- the optimal level e.g., a processing temperature of 250° C.
- a ⁇ -diketone compound-containing gas constituting the restoration processing gas such as acetylacetone gas
- FIG. 8 shows the film structure of the wafer W having undergone the restoration process.
- the restoration process is executed by using the restoration processing gas as described above, a chemical reaction occurs over the damaged area 542 of the low-k film 540 and through the chemical reaction, the film quality of the damaged area 542 is restored to a desirable condition, as shown in FIG. 8 . Furthermore, through the ashing process executed as described above by using hydrogen radicals immediately before the restoration process in the embodiment, the damaged area 542 of the low-k film 540 has been rendered into a state in which the damaged area readily assumes a CH 3 group composition, allowing the damaged area 542 to become fully repaired.
- the film quality in the damaged area 542 is restored to the initial desirable condition and, as a result, the damaged area 542 disappears.
- the terminal at the surface of the low-k film 540 exposed at the wiring groove 580 takes on a CH 3 group composition and, as a result, a water repellent layer 546 is formed. This water repellent layer 546 prevents absorption of any additional water into the exposed surface of the low-k film 540 and prevents the low-k film 540 from being penetrated by water.
- the acetylacetone contained in the acetylacetone gas delivered into the processing chamber 220 C releases protons through the keto-enol equilibrium, as expressed in chemical formula (1) below.
- the damaged area 542 of the low-k film 540 where a relatively large quantity of water is present, has an excessively dominant presence of silanol radicals (SiOH group).
- SiOH group silanol radicals
- the acetylacetonate formed as the protons are released from the acetylacetone configures a protective group for the dangling bond of silicone formed as water (H 2 O) departs the damaged area 542 , as indicated in chemical formula (3) below.
- the ⁇ hydrogen in the CH 3 group cannot be dissociated readily under normal circumstances.
- the a hydrogen reacts with the OH group contained in the silanol group and thus moves out of the CH 3 group as indicated in chemical formula (4).
- a hydrogen-containing gas is used as the ashing processing gas during the ashing process so as to ensure that no shrink layer is formed over the damaged area 542 .
- a ⁇ -diketone compound-containing gas such as DPM gas or acetylacetone gas
- the restoration processing gas can be delivered to penetrate the damaged area 542 over a wide range, so as to restore the film quality of the damaged area 542 even more reliably.
- a silylating gas often contains ammonia radicals (NH 3 group), giving rise to a concern that ammonia salt, which can settle as particles on the wafer, may be formed.
- the ⁇ -diketone compound-containing gas does not contain any ammonia group and is thus more desirable than a silylating gas, since there will be no formation of ammonia salt.
- FIGS. 9A ⁇ 9D illustrate the process through which particles settle on the wafer W having undergone the etching process.
- a gas constituent e.g., a halogen gas constituent containing, for instance, F, Br or Cl
- a gas constituent e.g., a halogen gas constituent containing, for instance, F, Br or Cl
- F, Br or Cl a gas constituent in the etching processing gas
- a gas constituent e.g., a halogen gas constituent containing, for instance, F, Br or Cl
- the presence of such a compound on the wafer W may result in the formation of particles (reaction products) on the wafer W, particularly if the atmosphere surrounding the etched wafer W contains ammonia.
- the gas constituent of the etching processing gas and the substance constituting the surface of the wafer W bond with each other, thereby forming a compound A, as shown in FIG. 9A .
- the etching processing gas contains a halogen gas constituent (e.g., F, Br or Cl)
- the halogen gas constituent may bond with, for instance, SiO 2 on the processed wafer W, thereby forming a compound A on the wafer W.
- the halogen compound in the compound A at the wafer W reacts with the amine content in the restoration processing gas and, as a result, salt B is formed on the surface of the wafer W, as shown in FIG. 9B .
- the amine content includes, for instance, ammonia, amine and the like.
- the amine may be, for instance, trimethyl amine, triethyl amine or an organic basic amine.
- the sequence of the process through which the salt B is formed at the surface of the wafer W is expressed in chemical formulae (6) ⁇ (8) below.
- the chemical formulae below represent a process through which the substance (SiO 2 ) present at the surface of the wafer W bonds with a gas constituent (HF) of the etching processing gas, thereby forming a compound (SiF 4 ), the compound (SiF 4 ) reacts with ammonia (NH 3 ) in the restoration processing gas and halogen ammonia salt (e.g., (NH 4 ) 2 SiF 6 ) is formed.
- HF gas constituent
- halogen ammonia salt e.g., (NH 4 ) 2 SiF 6
- the reaction expressed in chemical formula (7) may also occur. While the level of the reaction energy required to shift from the state on the left side to the state on the right side in chemical formula (6) is 1.0 eV, the level of reaction energy required to shift from the state on the left side to the state on the right side in chemical formula (7) is only 0.4 eV, far lower than that required in the reaction expressed in chemical formula (6).
- halogen ammonia salt e.g., (NH 4 ) 2 SiF 6
- the salt B such as halogen ammonia salt formed on the surface of the wafer W as described above gradually absorbs water (H 2 O) in the atmosphere surrounding the wafer W.
- particles C are formed as shown in FIG. 9C . Namely, very small particles C, approximately 0.001 ⁇ m in diameter, too small to be detected even through an electron microscope, are initially formed and their quantity gradually increases while their size also gradually increases. After approximately one hour, for instance, they will have grown in size to approximately 0.1 ⁇ m. In 24 hours, some particles C may have grown to as large as 0.5 ⁇ 0.7 ⁇ m.
- the salt B will have become deliquesced in the water (H 2 O) in the atmosphere and thus will have coagulated. If particles C contain, for instance, SiO 2 , a residue D of SiO 2 will remain on the wafer W after the particles C evaporate as shown in FIG. 9D . It is to be noted that the particles C with no SiO 2 content will evaporate and disappear without leaving any residue.
- the wiring groove 580 is formed as a recessed area in the low-k film 540 , as shown in FIG. 6 .
- the surface of the metal layer 522 becomes exposed at the bottom of the wiring groove 580 .
- a very small amount of fluorine (CF) in the CF 4 gas may remain at the exposed surface of the metal layer 522 .
- the fluorine and the ammonia may react with each other, resulting in the formation of NH 4 F (solid substance) at the exposed surface of the metal layer 522 . If a wiring metal such as copper is embedded in the wiring groove 580 in this state, the presence of NH 4 F at the connecting area where the wiring metal and the metal layer 520 connect with each other will increase the electrical resistance over the connecting area.
- the ⁇ -diketone compound-containing gas such as DPM gas or acetylacetone gas, used in the restoration process in the embodiment does not contain any ammonia, and thus, even if a very small amount of fluorine is present at the exposed surface of the wafer W, NH 4 F, (NH 2 ) 4 SiF 6 or the like is not formed. Consequently, the formation of particles is prevented and the electrical resistance over the area where the wiring metal and the metal layer 522 connect with each other is kept at a low level, thereby assuring desirable electrical characteristics in the multilayer wiring structure.
- DPM gas or acetylacetone gas used in the restoration process in the embodiment does not contain any ammonia, and thus, even if a very small amount of fluorine is present at the exposed surface of the wafer W, NH 4 F, (NH 2 ) 4 SiF 6 or the like is not formed. Consequently, the formation of particles is prevented and the electrical resistance over the area where the wiring metal and the metal layer 522 connect with each other is kept at a
- any residual water 544 in the low-k film 540 can be removed during the restoration process.
- the wafer W is carried out of the processing chamber 220 C via the processing unit-side transfer mechanism 250 installed in the common transfer chamber 210 and is carried into either the first loadlock chamber 230 M or the second loadlock chamber 230 N, e.g., the second loadlock chamber 230 N.
- the wafer W carried into the second loadlock chamber 230 N is then taken back into the initial cassette container 102 via the transfer unit-side transfer mechanism 320 .
- the sequence of wafer processing in the embodiment thus ends.
- the wafer W taken back into the cassette container 102 is subsequently transferred to another substrate processing apparatus (not shown) to undergo a specific process, e.g., a copper embedding process through which a wiring metal such as copper is embedded into the wiring groove 580 formed in the low-k film 540 .
- a specific process e.g., a copper embedding process through which a wiring metal such as copper is embedded into the wiring groove 580 formed in the low-k film 540 .
- the wafer processing in the embodiment is executed by using, as a restoration processing gas, a ⁇ -diketone compound-containing gas (e.g., DPM gas or acetylacetone gas) containing a ⁇ -diketone compound with an ignition point higher than those of silylating gases used in the related art.
- a ⁇ -diketone compound-containing gas e.g., DPM gas or acetylacetone gas
- both the ashing process and the restoration process can be executed in succession on the wafer W in the processing chamber 220 C structured to function as the post processing chamber 400 .
- the throughput of the substrate processing apparatus 100 is improved.
- the film quality of the low-k film 540 having been damaged during the etching process or the ashing process can be restored to a desirable condition and the damaged area can be rendered into a sufficiently hydrophobic state.
- test wafers were each carried into an etching process chamber and the low-k film on the wafer was etched in a specific pattern.
- the test wafer was then transferred from the etching process chamber to the post processing chamber 400 where it underwent an ashing process to remove the etching mask.
- the restoration process and the ashing process were executed in succession in the same post processing chamber 400 by using a DPM gas as the restoration processing gas.
- the restoration process was executed by adjusting the test wafer temperature to 150° C., 200° C. and 250° C.
- the results of the tests conducted to verify that the film quality of the low-k film 540 is restored through the restoration process in the embodiment, i.e., that the dielectric constant is recovered to a desirable level, are first described.
- the decision as to whether or not the film quality of the low-k film 540 has been restored may be made by, for instance, measuring the dielectric constant of the low-k film 540 both before and after the restoration process.
- FIG. 10 presents the results obtained by measuring the dielectric constant (k value) of the low-k film. It is to be noted that the dielectric constant of the low-k film used in the tests was 2.38 prior to the etching process.
- the dielectric constant of the low-k film on the test wafer W having undergone the etching process and the ashing process but not yet the restoration process increased to a level exceeding 3.0 from the pre-etching process value of 2.38, indicating that the film quality had degraded significantly.
- the film quality was restored with the dielectric constant lowered to a level below 2.8, regardless of the temperature of the wafer W undergoing the restoration process, 150° C., 200° C. or 250° C. In particular, the film quality was restored to a more significant extent through the restoration process with the dielectric constant lowered to 2.6, when the temperature of the wafer W was set at 250° C.
- FIG. 11 presents a graph indicating such measurement results.
- a liquid such as water was dropped onto the surface of the low-k film and the angle (contact angle) formed by the tangential line of the liquid droplet and the surface of the low-k film was measured. If the low-k film had a higher level of hydrophobicity, the droplet on the film would assume a more spherical shape due to its own surface tension and thus the contact angle would be larger.
- the level of hydrophobicity of the low-k film would be judged to be higher when the contact angle was closer to 90°, whereas the level of hydrophilicity of the low-k film would be judged to be higher (the level of its hydrophobicity judged to be lower) when the contact angle was closer to 0°.
- the contact angle of the low-k film on the test wafer W having undergone the etching process and the ashing process but not yet the restoration process was less than 10°.
- the hydrophobicity of the low-k film in this state would be very low and water would be readily absorbed into the low-k film.
- the contact angle was increased significantly to values above 60°, indicating an improvement in the hydrophobicity of the low-k film, regardless of the temperature of the wafer W undergoing the restoration process, 150° C., 200° C. or 250° C.
- the film quality of the low-k film having been damaged during the etching process can be restored to good condition through a restoration process executed by using a ⁇ -diketone compound-containing gas such as DPM gas or acetylacetone gas, so as to assure better electrical characteristics and mechanical characteristics over the related art.
- a ⁇ -diketone compound-containing gas such as DPM gas or acetylacetone gas
- the present invention is not limited to this example and the numbers of the two types of processing chambers are adjustable.
- the substrate processing apparatus 100 may include etching process chambers, and instead, the substrate processing apparatus 100 may include a post processing chamber 400 alone. In such a case, the etching process may be executed in a separate substrate processing apparatus.
- the wafer W undergoing the processing in the embodiment includes the anti-reflection coating 560 formed thereupon, such an anti-reflection coating 560 is not an essential requirement of the present invention.
- the embodiment of the present invention has been explained in reference to an example in which the processing target substrate is a semiconductor wafer, the present invention is not limited to this example and it may be adopted in conjunction with another type of substrate.
- the present invention may be achieved by providing a system or an apparatus with a medium such as a storage medium having stored therein a software program for realizing the functions of the embodiment described above and enabling a computer (a CPU or an MPU) in the system or the apparatus to read out and execute the program stored in the medium such as a storage medium.
- a computer a CPU or an MPU
- the functions of the embodiment described above are achieved in the program itself, read out from the medium such as a storage medium, whereas the present invention is embodied in the medium such as a storage medium having the program stored therein.
- the medium such as a storage medium in which the program is provided may be, for instance, a flexible disk, a hard disk, an optical disk, a magneto-optical disk, a CD-ROM, a CD-R, a CD-RW, a DVD-ROM, a DVD-RAM, a DVD-RW, a DVD+RW, magnetic tape, a nonvolatile memory card or a ROM, or the program may be download to a storage medium via a network.
- the scope of the present invention includes an application in which an OS or the like operating on a computer executes the actual processing in part or in whole in response to the instructions in the program read out by the computer and the functions of the embodiment are achieved through the processing thus executed, as well as an application in which the functions of the embodiments are achieved as the computer executes the program it has read out.
- the scope of the present invention further includes an application in which the program read out from the medium such as a storage medium is first written into a memory in a function expansion board loaded in a computer or a function expansion unit connected to the computer, a CPU or the like in the function expansion board or the function expansion unit executes the actual processing in part or in whole in response to the instructions in the program and the functions of the embodiment described above are achieved through the processing.
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Abstract
Description
- (Patent reference literature 1) Japanese Laid Open Patent Publication No. 2006-049798
- (Patent reference literature 2) Japanese Laid Open Patent Publication No. 2006-111740
- (Patent reference literature 3) Japanese Laid Open Patent Publication No. 2006-073722
- (Patent reference literature 4) Japanese Laid Open Patent Publication No. 2007-128981
- (Patent reference literature 5) Japanese Laid Open Patent Publication No. 2007-502543
SiO2+4HF→SiF4+2H2O (6)
SiO2+4HF+4NH3→SiF4+2H2O+4NH3 (7)
SiF4+2HF+2NH3→(NH4)2 SiF6 (8)
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US3451408P | 2008-03-07 | 2008-03-07 | |
US12/276,781 US8262921B2 (en) | 2008-01-11 | 2008-11-24 | Substrate processing method, substrate processing apparatus and recording medium |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100285667A1 (en) * | 2009-05-06 | 2010-11-11 | International Business Machines Corporation | Method to preserve the critical dimension (cd) of an interconnect structure |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
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WO2004030049A2 (en) * | 2002-09-27 | 2004-04-08 | Tokyo Electron Limited | A method and system for etching high-k dielectric materials |
JP4816545B2 (en) * | 2007-03-30 | 2011-11-16 | 東京エレクトロン株式会社 | Substrate processing apparatus, substrate processing method, and storage medium |
JP4924245B2 (en) * | 2007-07-02 | 2012-04-25 | 東京エレクトロン株式会社 | Semiconductor manufacturing apparatus, semiconductor device manufacturing method, and storage medium |
US7858532B2 (en) * | 2007-08-06 | 2010-12-28 | United Microelectronics Corp. | Dielectric layer structure and manufacturing method thereof |
JP5544893B2 (en) * | 2010-01-20 | 2014-07-09 | 東京エレクトロン株式会社 | Substrate processing method and storage medium |
KR101807247B1 (en) * | 2011-09-23 | 2017-12-11 | 삼성전자주식회사 | Method for manufacturing three dimensional semiconductor device |
US20150340611A1 (en) * | 2014-05-21 | 2015-11-26 | Sony Corporation | Method for a dry exhumation without oxidation of a cell and source line |
US10373850B2 (en) * | 2015-03-11 | 2019-08-06 | Asm Ip Holding B.V. | Pre-clean chamber and process with substrate tray for changing substrate temperature |
JP2019192892A (en) | 2018-04-18 | 2019-10-31 | 東京エレクトロン株式会社 | Processing system and processing method |
US11699596B2 (en) * | 2018-11-30 | 2023-07-11 | Taiwan Semiconductor Manufacturing Co., Ltd. | Metal etching with in situ plasma ashing |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6764552B1 (en) * | 2002-04-18 | 2004-07-20 | Novellus Systems, Inc. | Supercritical solutions for cleaning photoresist and post-etch residue from low-k materials |
WO2005017983A2 (en) | 2003-08-11 | 2005-02-24 | Axcelis Technologies Inc. | Plasma ashing process |
JP2006049798A (en) | 2004-07-02 | 2006-02-16 | Tokyo Electron Ltd | Manufacturing method of semiconductor device having groove wiring or connecting hole |
JP2006073722A (en) | 2004-09-01 | 2006-03-16 | Shibaura Mechatronics Corp | Ashing method and ashing apparatus |
JP2006111740A (en) | 2004-10-15 | 2006-04-27 | Jsr Corp | Composition for surface hydrophobizing, surface hydrophobizing method, semiconductor device and its manufacturing method |
US20070054496A1 (en) * | 2005-09-08 | 2007-03-08 | Cristian Paduraru | Gas mixture for removing photoresist and post etch residue from low-k dielectric material and method of use thereof |
JP2007128981A (en) | 2005-11-01 | 2007-05-24 | Matsushita Electric Ind Co Ltd | Plasma processing method and plasma processing apparatus |
-
2008
- 2008-01-11 JP JP2008004951A patent/JP2009170547A/en active Pending
- 2008-11-24 US US12/276,781 patent/US8262921B2/en not_active Expired - Fee Related
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6764552B1 (en) * | 2002-04-18 | 2004-07-20 | Novellus Systems, Inc. | Supercritical solutions for cleaning photoresist and post-etch residue from low-k materials |
WO2005017983A2 (en) | 2003-08-11 | 2005-02-24 | Axcelis Technologies Inc. | Plasma ashing process |
JP2007502543A (en) | 2003-08-11 | 2007-02-08 | アクセリス テクノロジーズ インコーポレーテッド | Plasma ashing method |
JP2006049798A (en) | 2004-07-02 | 2006-02-16 | Tokyo Electron Ltd | Manufacturing method of semiconductor device having groove wiring or connecting hole |
US20080057728A1 (en) | 2004-07-02 | 2008-03-06 | Tokyo Electron Limited | Process For Fabricating Semiconductor Device |
JP2006073722A (en) | 2004-09-01 | 2006-03-16 | Shibaura Mechatronics Corp | Ashing method and ashing apparatus |
US20080132078A1 (en) | 2004-09-01 | 2008-06-05 | Katsuhiro Yamazaki | Ashing Method And Ashing Apparatus |
JP2006111740A (en) | 2004-10-15 | 2006-04-27 | Jsr Corp | Composition for surface hydrophobizing, surface hydrophobizing method, semiconductor device and its manufacturing method |
US20070054496A1 (en) * | 2005-09-08 | 2007-03-08 | Cristian Paduraru | Gas mixture for removing photoresist and post etch residue from low-k dielectric material and method of use thereof |
JP2007128981A (en) | 2005-11-01 | 2007-05-24 | Matsushita Electric Ind Co Ltd | Plasma processing method and plasma processing apparatus |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100285667A1 (en) * | 2009-05-06 | 2010-11-11 | International Business Machines Corporation | Method to preserve the critical dimension (cd) of an interconnect structure |
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