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US7741648B2 - Penetrating hole type LED chip package structure using a ceramic material as a substrate and method for manufacturing the same - Google Patents

Penetrating hole type LED chip package structure using a ceramic material as a substrate and method for manufacturing the same Download PDF

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Publication number
US7741648B2
US7741648B2 US11/976,340 US97634007A US7741648B2 US 7741648 B2 US7741648 B2 US 7741648B2 US 97634007 A US97634007 A US 97634007A US 7741648 B2 US7741648 B2 US 7741648B2
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United States
Prior art keywords
led chip
electrode side
negative electrode
conductive layers
package structure
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US11/976,340
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US20090008656A1 (en
Inventor
Bily Wang
Jonnie Chuang
Chia-Hung Chen
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Harvatek Corp
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Harvatek Corp
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Assigned to HARVATEK CORPORATION reassignment HARVATEK CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CHEN, CHIA-HUNG, CHUANG, JONNIE, WANG, BILY
Priority to US12/314,168 priority Critical patent/US8003413B2/en
Publication of US20090008656A1 publication Critical patent/US20090008656A1/en
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • H10H20/8506Containers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • H10H20/857Interconnections, e.g. lead-frames, bond wires or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05571Disposition the external layer being disposed in a recess of the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05573Single external layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]

Definitions

  • the present invention relates to an LED chip package structure and a method for manufacturing the same, and particularly relates to a penetrating hole type LED chip package structure using a ceramic material as a substrate and a method for manufacturing the same.
  • FIG. 1 shows a cross-sectional, schematic view of a vertical LED chip package structure of the prior art.
  • the vertical LED chip package structure includes an insulative substrate 1 a , a lead frame 2 a , an LED chip 3 a , and a fluorescent colloid 4 a.
  • the lead frame 2 a has two conductive pins 20 a , 21 a respectively extended along two opposite lateral sides and bent twice, so that the bottom faces of the two conductive pins 20 a , 21 a are electrically connected with a PCB 5 a .
  • the conductive pin 20 a has a positive electrode area 200 a
  • the conductive pin 21 a has a negative electrode area 210 a.
  • the LED chip 3 a has a positive electrode side 300 a and a negative electrode side 310 a .
  • the LED chip 3 a is disposed on the conductive pin 20 a directly, so that the positive electrode side 300 a of the LED chip 3 a is electrically connected with the positive electrode area 200 a of the conductive pin 20 a directly.
  • the negative electrode side 310 a of the LED chip 3 a is electrically connected with the negative electrode area 210 a of the conductive pin 21 a via a leading wire 6 a.
  • the fluorescent colloid 4 a is covered on the LED chip 3 a for protecting the LED chip 3 a . Therefore, the vertical LED chip package structure should project light upwardly (such as the arrows in FIG. 1 ).
  • FIG. 2 shows a perspective, schematic view of a horizontal LED chip package structure of the prior art
  • FIG. 3 shows a cross-sectional view along line 3 - 3 of a horizontal LED chip package structure shown in FIG. 2
  • the horizontal LED chip package structure includes an insulative substrate 1 b , a lead frame 2 b , an LED chip 3 b , and a fluorescent colloid 4 b.
  • the lead frame 2 b has two conductive pins 20 b , 21 b respectively extended along one lateral side and bent twice, so that the bottom faces of the two conductive pins 20 b , 21 b are electrically connected with a PCB 5 b .
  • the conductive pin 20 b has a positive electrode area 200 b
  • the conductive pin 21 b has a negative electrode area 210 b.
  • the LED chip 3 b has a positive electrode side 300 b and a negative electrode side 310 b .
  • the LED chip 3 b is disposed on the conductive pin 20 b directly, so that the positive electrode side 300 b of the LED chip 3 b is electrically connected with the positive electrode area 200 b of the conductive pin 20 b directly.
  • the negative electrode side 310 b of the LED chip 3 b is electrically connected with the negative electrode area 210 b of the conductive pin 21 b via a leading wire 6 b.
  • the fluorescent colloid 4 b is covered on the LED chip 3 b for protecting the LED chip 3 b . Therefore, the horizontal LED chip package structure should project light sideward (such as the arrows in FIG. 3 ).
  • the conductive pins ( 20 a , 21 a , 20 b , 21 b ) want to electrically connect with the PCB ( 5 a , 5 b )
  • the conductive pins ( 20 a , 21 a , 20 b , 21 b ) need to be bent twice. Therefore, the complexity of the manufacturing process in the prior art should be increased.
  • One particular aspect of the present invention is to provide a penetrating hole type LED chip package structure using a ceramic material as a substrate and a method for manufacturing the same.
  • the advantage of the present invention is that a conductive layer is formed on a ceramic substrate via any forming method, and a hollow ceramic casing is fixed on a top face of the ceramic substrate via an LTCC (Low-Temperature Cofired Ceramics). Therefore, the LED chip package structure of the present invention can electrically connect with a PCB easily without bending the conductive pins as the prior art.
  • the present invention provides a penetrating hole type LED chip package structure using a ceramic material as a substrate, include s: a ceramic substrate, a conductive unit, a hollow ceramic casing, a plurality of LED chips, and a package colloid.
  • the ceramic substrate has a main body, a plurality of protrusions separated from each other and extended from a top face of the main body, a plurality of penetrating holes respectively penetrating through the protrusions, and a plurality of half through holes formed on a lateral side of the main body and respectively formed between each two protrusions.
  • the conductive unit has a plurality of first conductive layers respectively formed on the protrusions, a plurality of second conductive layers respectively formed on inner surfaces of the half through holes and a bottom face of the main body, and a plurality of third conductive layers respectively filled in the penetrating holes.
  • Each third conductive layer is electrically connected between the first conductive layer and the second conductive layer.
  • the hollow ceramic casing is fixed on the top face of the main body to form a receiving space for exposing top faces of the first conductive layer.
  • the LED chips is received in the receiving space, wherein each LED chip has a positive electrode side and a negative electrode side respectively and electrically connected with the two different first conductive layer.
  • the package colloid is filled in the receiving space for covering the LED chips.
  • the present invention provides a method for manufacturing a penetrating hole type LED chip package structure using a ceramic material as a substrate.
  • the method includes: providing a ceramic substrate that has a main body, a plurality of protrusions separated from each other and extended from a top face of the main body, a plurality of penetrating holes respectively penetrating through the protrusions, and a plurality of half through holes formed on a lateral side of the main body and respectively formed between each two protrusions, and then respectively forming a plurality of first conductive layers on the protrusions and respectively forming a plurality of second conductive layers on inner surfaces of the half through holes and a bottom face of the main body.
  • the method further includes: respectively filling a plurality of third conductive layers into the penetrating holes, and each third conductive layer being electrically connected between the first conductive layer and the second conductive layer; fixing a hollow ceramic casing on the top face of the main body to form a receiving space for exposing top faces of the first conductive layer; receiving a plurality of LED chips in the receiving space, and each LED chip having a positive electrode side and a negative electrode side respectively and electrically connected with the two different first conductive layer; and then filling a package colloid into the receiving space for covering the LED chips.
  • the LED chip package structure of the present invention can electrically connect with the PCB easily without bending the conductive pins as the prior art by matching the penetrating holes and the conductive layers (the first conductive layers, the second conductive layers, and the third conductive layers).
  • the third conductive layers are respectively filled in the penetrating holes to form a plurality of conductive bridges between the first conductive layers and the second conductive layers or between the LED chips and the PCB. Therefore, the present invention can reduce manufacturing process and cost.
  • FIG. 1 is a cross-sectional, schematic view of a vertical LED chip package structure of the prior art
  • FIG. 2 is a perspective, schematic view of a horizontal LED chip package structure of the prior art
  • FIG. 3 is a cross-sectional view along line 3 - 3 of a horizontal LED chip package structure shown in FIG. 2 ;
  • FIG. 4 is a flowchart of a method for manufacturing a penetrating hole type LED chip package structure that uses a ceramic material as a substrate according to the first embodiment of the present invention
  • FIGS. 5A to 5C are manufacturing flowcharts of a method for manufacturing a penetrating hole type LED chip package structure that uses a ceramic material as a substrate according to the first embodiment of the present invention, respectively;
  • FIG. 6 is a front, schematic view of a penetrating hole type LED chip package structure that uses a ceramic material as a substrate according to the first embodiment of the present invention
  • FIG. 7 is a lateral, schematic view of a first arrangement of a plurality of LED chips according to the present invention.
  • FIG. 8 is a lateral, schematic view of a second arrangement of a plurality of LED chips according to the present invention.
  • FIG. 9 is a lateral, schematic view of a third arrangement of a plurality of LED chips according to the present invention.
  • FIG. 10 is a lateral, schematic view of a fourth arrangement of a plurality of LED chips according to the present invention.
  • FIG. 4 shows a flowchart of a method for manufacturing a penetrating hole type LED chip package structure that uses a ceramic material as a substrate according to the first embodiment of the present invention
  • FIGS. 5A to 5C show manufacturing flowcharts of the first embodiment, respectively
  • FIG. 6 shows a front, schematic view of the first embodiment.
  • the first embodiment provides a method for manufacturing a penetrating hole type LED chip package structure using a ceramic material as a substrate.
  • the method of the first embodiment includes: referring to FIGS.
  • each penetrating hole 12 is obliquely extended from each corresponding protrusion 11 to each corresponding half through hole 13 .
  • each penetrating hole 12 is an oblique channel that is communicated between each corresponding protrusion 11 and each corresponding half through hole 13 .
  • the method further includes: respectively forming a plurality of first conductive layers 2 on the protrusions 11 and respectively forming a plurality of second conductive layers 3 on inner surfaces of the half through holes 13 and a bottom face of the main body 10 (S 102 ) for forming a plurality of lower pins 30 ; and then respectively filling a plurality of third conductive layers 4 into the penetrating holes 12 , and each third conductive layer 4 being electrically connected between the first conductive layer 2 and the second conductive layer 3 (S 104 ).
  • the first conductive layers 2 , the second conductive layers 3 , and the third conductive layers 4 are silver paste layers.
  • the method further includes: fixing a hollow ceramic casing 5 on the top face of the main body 10 to form a receiving space 50 for exposing top faces of the first conductive layer 2 (S 106 ).
  • the main body 10 and the hollow ceramic casing 5 are two cuboids that are mated with each other.
  • the hollow ceramic casing 5 is fixed on the top face of the main body 10 via an LTCC (Low-Temperature Cofired Ceramics) process.
  • LTCC Low-Temperature Cofired Ceramics
  • the method further includes: receiving a plurality of LED chips 6 in the receiving space 50 , and each LED chip having a positive electrode side and a negative electrode side respectively and electrically connected with the two different first conductive layer 2 (S 108 ); and then filling a package colloid 8 into the receiving space 50 for covering the LED chips 6 (S 110 ).
  • the positive electrode side and the negative electrode side of each LED chip are respectively and electrically connected with the two different first conductive layer 2 via two leading wires 7 .
  • the receiving space 50 faces top, so that bottom sides (the lower pins 30 ) of the second conductive layers 3 contact with a PCB (not shown).
  • the LED chip package structure of the present invention can project light upward by vertically placing the LED chip package structure.
  • FIG. 7 shows a lateral, schematic view of a first arrangement of a plurality of LED chips according to the present invention.
  • the first conductive layers 2 are divided into a plurality of positive electrode portions 20 and negative electrode portions 21 .
  • the positive electrode side 60 and the negative electrode side 61 of each LED chip 6 are arranged on an upper surface of each LED chip 6 . Therefore, the positive electrode side 60 and the negative electrode side 61 of each LED chip 6 are respectively and electrically connected with the adjacent positive and negative electrode portions 20 , 21 via two leading wires 21 by a wire-bounding method.
  • FIG. 8 shows a lateral, schematic view of a second arrangement of a plurality of LED chips according to the present invention.
  • the first conductive layers 2 ′ are divided into a plurality of positive electrode portions 20 ′ and negative electrode portions 21 ′.
  • the positive electrode side 60 ′ and the negative electrode side 61 ′ of each LED chip 6 ′ are respectively arranged on a lower surface and an upper surface of each LED chip 6 ′. Therefore, the positive electrode side 60 ′ of each LED chip 6 ′ is directly and electrically connected with the corresponding positive electrode portion 20 ′, and the negative electrode side 61 ′ of each LED chip 6 ′ is electrically connected with the corresponding negative electrode portion 21 ′ via a leading wire 7 ′ by a wire-bounding method.
  • FIG. 9 shows a lateral, schematic view of a third arrangement of a plurality of LED chips according to the present invention.
  • the first conductive layers 2 ′′ are divided into a plurality of positive electrode portions 20 ′′ and negative electrode portions 21 ′′.
  • the positive electrode side 60 ′′ and the negative electrode side 61 ′′ of each LED chip 6 ′′ are arranged on a lower surface of each LED chip 6 ′′. Therefore, the positive electrode side 60 ′′ and the negative electrode side 61 ′′ of each LED chip 6 ′′ are respectively and electrically connected with the adjacent positive and negative electrode portions 20 ′′, 21 ′′ via a plurality of corresponding solder balls 7 ′′ by a flip-chip method.
  • FIG. 10 shows a lateral, schematic view of a fourth arrangement of a plurality of LED chips according to the present invention.
  • the positive electrode side 90 and the negative electrode side 91 of each LED chip 9 are arranged on an upper surface of each LED chip 9 , and each LED chip 9 is disposed between each two protrusions 92 . Therefore, the positive electrode side 90 and the negative electrode side 91 of each LED chip 9 are respectively and electrically connected with the adjacent positive and negative electrode portions 94 , 95 via two leading wires 93 by a wire-bounding method.
  • the advantage of the present invention is that the conductive layers (the first conductive layers 2 , the second conductive layers 3 , and the third conductive layers 4 ) are formed on the ceramic substrate 1 via any forming method, and the hollow ceramic casing 5 is fixed on the top face of the ceramic substrate 1 via an LTCC (Low-Temperature Cofired Ceramics). Therefore, the LED chip package structure of the present invention can electrically connect with a PCB (not shown) easily without bending the conductive pins ( 20 a , 21 a , 20 b , 21 b ) as the prior art.
  • LTCC Low-Temperature Cofired Ceramics
  • the LED chip package structure of the present invention can electrically connect with the PCB (not shown) easily without bending the conductive pins ( 20 a , 21 a , 20 b , 21 b ) as the prior art by matching the penetrating holes 12 and the conductive layers (the first conductive layers 2 , the second conductive layers 3 , and the third conductive layers 4 ).
  • the third conductive layers 4 are respectively filled in the penetrating holes 12 to form a plurality of conductive bridges between the first conductive layers 2 and the second conductive layers 3 or between the LED chips 6 and the PCB. Therefore, the present invention can reduce manufacturing process and cost.

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Abstract

An LED chip package structure includes a ceramic substrate, a conductive unit, a hollow ceramic casing, many LED chips, and a package colloid. The ceramic substrate has a main body, many protrusions extended from the main body, many penetrating holes respectively penetrating through the protrusions, and many half through holes formed on a lateral side of the main body and respectively formed between each two protrusions. The conductive unit has many first conductive layers respectively formed on the protrusions, many second conductive layers respectively formed on inner surfaces of the half through holes and a bottom face of the main body, and many third conductive layers respectively filled in the penetrating holes. The hollow ceramic casing is fixed on the main body to form a receiving space. The LED chips is received in the receiving space. The package colloid is filled in the receiving space for covering the LED chips.

Description

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an LED chip package structure and a method for manufacturing the same, and particularly relates to a penetrating hole type LED chip package structure using a ceramic material as a substrate and a method for manufacturing the same.
2. Description of the Related Art
FIG. 1 shows a cross-sectional, schematic view of a vertical LED chip package structure of the prior art. The vertical LED chip package structure includes an insulative substrate 1 a, a lead frame 2 a, an LED chip 3 a, and a fluorescent colloid 4 a.
The lead frame 2 a has two conductive pins 20 a, 21 a respectively extended along two opposite lateral sides and bent twice, so that the bottom faces of the two conductive pins 20 a, 21 a are electrically connected with a PCB 5 a. In addition, the conductive pin 20 a has a positive electrode area 200 a, and the conductive pin 21 a has a negative electrode area 210 a.
Moreover, the LED chip 3 a has a positive electrode side 300 a and a negative electrode side 310 a. The LED chip 3 a is disposed on the conductive pin 20 a directly, so that the positive electrode side 300 a of the LED chip 3 a is electrically connected with the positive electrode area 200 a of the conductive pin 20 a directly. The negative electrode side 310 a of the LED chip 3 a is electrically connected with the negative electrode area 210 a of the conductive pin 21 a via a leading wire 6 a.
The fluorescent colloid 4 a is covered on the LED chip 3 a for protecting the LED chip 3 a. Therefore, the vertical LED chip package structure should project light upwardly (such as the arrows in FIG. 1).
FIG. 2 shows a perspective, schematic view of a horizontal LED chip package structure of the prior art, and FIG. 3 shows a cross-sectional view along line 3-3 of a horizontal LED chip package structure shown in FIG. 2. The horizontal LED chip package structure includes an insulative substrate 1 b, a lead frame 2 b, an LED chip 3 b, and a fluorescent colloid 4 b.
The lead frame 2 b has two conductive pins 20 b, 21 b respectively extended along one lateral side and bent twice, so that the bottom faces of the two conductive pins 20 b, 21 b are electrically connected with a PCB 5 b. In addition, the conductive pin 20 b has a positive electrode area 200 b, and the conductive pin 21 b has a negative electrode area 210 b.
Moreover, the LED chip 3 b has a positive electrode side 300 b and a negative electrode side 310 b. The LED chip 3 b is disposed on the conductive pin 20 b directly, so that the positive electrode side 300 b of the LED chip 3 b is electrically connected with the positive electrode area 200 b of the conductive pin 20 b directly. The negative electrode side 310 b of the LED chip 3 b is electrically connected with the negative electrode area 210 b of the conductive pin 21 b via a leading wire 6 b.
The fluorescent colloid 4 b is covered on the LED chip 3 b for protecting the LED chip 3 b. Therefore, the horizontal LED chip package structure should project light sideward (such as the arrows in FIG. 3).
However, if the conductive pins (20 a, 21 a, 20 b, 21 b) want to electrically connect with the PCB (5 a, 5 b), the conductive pins (20 a, 21 a, 20 b, 21 b) need to be bent twice. Therefore, the complexity of the manufacturing process in the prior art should be increased.
SUMMARY OF THE INVENTION
One particular aspect of the present invention is to provide a penetrating hole type LED chip package structure using a ceramic material as a substrate and a method for manufacturing the same. The advantage of the present invention is that a conductive layer is formed on a ceramic substrate via any forming method, and a hollow ceramic casing is fixed on a top face of the ceramic substrate via an LTCC (Low-Temperature Cofired Ceramics). Therefore, the LED chip package structure of the present invention can electrically connect with a PCB easily without bending the conductive pins as the prior art.
In order to achieve the above-mentioned aspects, the present invention provides a penetrating hole type LED chip package structure using a ceramic material as a substrate, include s: a ceramic substrate, a conductive unit, a hollow ceramic casing, a plurality of LED chips, and a package colloid. In addition, the ceramic substrate has a main body, a plurality of protrusions separated from each other and extended from a top face of the main body, a plurality of penetrating holes respectively penetrating through the protrusions, and a plurality of half through holes formed on a lateral side of the main body and respectively formed between each two protrusions.
Moreover, the conductive unit has a plurality of first conductive layers respectively formed on the protrusions, a plurality of second conductive layers respectively formed on inner surfaces of the half through holes and a bottom face of the main body, and a plurality of third conductive layers respectively filled in the penetrating holes. Each third conductive layer is electrically connected between the first conductive layer and the second conductive layer.
Furthermore, the hollow ceramic casing is fixed on the top face of the main body to form a receiving space for exposing top faces of the first conductive layer. The LED chips is received in the receiving space, wherein each LED chip has a positive electrode side and a negative electrode side respectively and electrically connected with the two different first conductive layer. The package colloid is filled in the receiving space for covering the LED chips.
In order to achieve the above-mentioned aspects, the present invention provides a method for manufacturing a penetrating hole type LED chip package structure using a ceramic material as a substrate. The method includes: providing a ceramic substrate that has a main body, a plurality of protrusions separated from each other and extended from a top face of the main body, a plurality of penetrating holes respectively penetrating through the protrusions, and a plurality of half through holes formed on a lateral side of the main body and respectively formed between each two protrusions, and then respectively forming a plurality of first conductive layers on the protrusions and respectively forming a plurality of second conductive layers on inner surfaces of the half through holes and a bottom face of the main body.
The method further includes: respectively filling a plurality of third conductive layers into the penetrating holes, and each third conductive layer being electrically connected between the first conductive layer and the second conductive layer; fixing a hollow ceramic casing on the top face of the main body to form a receiving space for exposing top faces of the first conductive layer; receiving a plurality of LED chips in the receiving space, and each LED chip having a positive electrode side and a negative electrode side respectively and electrically connected with the two different first conductive layer; and then filling a package colloid into the receiving space for covering the LED chips.
Hence, the LED chip package structure of the present invention can electrically connect with the PCB easily without bending the conductive pins as the prior art by matching the penetrating holes and the conductive layers (the first conductive layers, the second conductive layers, and the third conductive layers). In other words, the third conductive layers are respectively filled in the penetrating holes to form a plurality of conductive bridges between the first conductive layers and the second conductive layers or between the LED chips and the PCB. Therefore, the present invention can reduce manufacturing process and cost.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed. Other advantages and features of the invention will be apparent from the following description, drawings and claims.
BRIEF DESCRIPTION OF THE DRAWINGS
The various objects and advantages of the present invention will be more readily understood from the following detailed description when read in conjunction with the appended drawings, in which:
FIG. 1 is a cross-sectional, schematic view of a vertical LED chip package structure of the prior art;
FIG. 2 is a perspective, schematic view of a horizontal LED chip package structure of the prior art;
FIG. 3 is a cross-sectional view along line 3-3 of a horizontal LED chip package structure shown in FIG. 2;
FIG. 4 is a flowchart of a method for manufacturing a penetrating hole type LED chip package structure that uses a ceramic material as a substrate according to the first embodiment of the present invention;
FIGS. 5A to 5C are manufacturing flowcharts of a method for manufacturing a penetrating hole type LED chip package structure that uses a ceramic material as a substrate according to the first embodiment of the present invention, respectively;
FIG. 6 is a front, schematic view of a penetrating hole type LED chip package structure that uses a ceramic material as a substrate according to the first embodiment of the present invention;
FIG. 7 is a lateral, schematic view of a first arrangement of a plurality of LED chips according to the present invention;
FIG. 8 is a lateral, schematic view of a second arrangement of a plurality of LED chips according to the present invention;
FIG. 9 is a lateral, schematic view of a third arrangement of a plurality of LED chips according to the present invention; and
FIG. 10 is a lateral, schematic view of a fourth arrangement of a plurality of LED chips according to the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Referring to FIGS. 4 to 6, FIG. 4 shows a flowchart of a method for manufacturing a penetrating hole type LED chip package structure that uses a ceramic material as a substrate according to the first embodiment of the present invention; FIGS. 5A to 5C show manufacturing flowcharts of the first embodiment, respectively; FIG. 6 shows a front, schematic view of the first embodiment. The first embodiment provides a method for manufacturing a penetrating hole type LED chip package structure using a ceramic material as a substrate. The method of the first embodiment includes: referring to FIGS. 5A and 6, providing a ceramic substrate 1 that has a main body 10, a plurality of protrusions 11 separated from each other and extended from a top face of the main body 10, a plurality of penetrating holes 12 respectively penetrating through the protrusions 11, and a plurality of half through holes 13 formed on a lateral side of the main body 10 and respectively formed between each two protrusions 11 (S100). Each penetrating hole 12 is obliquely extended from each corresponding protrusion 11 to each corresponding half through hole 13. In other words, each penetrating hole 12 is an oblique channel that is communicated between each corresponding protrusion 11 and each corresponding half through hole 13.
The method further includes: respectively forming a plurality of first conductive layers 2 on the protrusions 11 and respectively forming a plurality of second conductive layers 3 on inner surfaces of the half through holes 13 and a bottom face of the main body 10 (S102) for forming a plurality of lower pins 30; and then respectively filling a plurality of third conductive layers 4 into the penetrating holes 12, and each third conductive layer 4 being electrically connected between the first conductive layer 2 and the second conductive layer 3 (S104). In addition, the first conductive layers 2, the second conductive layers 3, and the third conductive layers 4 are silver paste layers.
Referring to FIGS. 5B and 6, the method further includes: fixing a hollow ceramic casing 5 on the top face of the main body 10 to form a receiving space 50 for exposing top faces of the first conductive layer 2 (S106). The main body 10 and the hollow ceramic casing 5 are two cuboids that are mated with each other. The hollow ceramic casing 5 is fixed on the top face of the main body 10 via an LTCC (Low-Temperature Cofired Ceramics) process.
Referring to FIGS. 5C and 6, the method further includes: receiving a plurality of LED chips 6 in the receiving space 50, and each LED chip having a positive electrode side and a negative electrode side respectively and electrically connected with the two different first conductive layer 2 (S108); and then filling a package colloid 8 into the receiving space 50 for covering the LED chips 6 (S110). Moreover, the positive electrode side and the negative electrode side of each LED chip are respectively and electrically connected with the two different first conductive layer 2 via two leading wires 7. In addition, the receiving space 50 faces top, so that bottom sides (the lower pins 30) of the second conductive layers 3 contact with a PCB (not shown). Hence, the LED chip package structure of the present invention can project light upward by vertically placing the LED chip package structure.
FIG. 7 shows a lateral, schematic view of a first arrangement of a plurality of LED chips according to the present invention. The first conductive layers 2 are divided into a plurality of positive electrode portions 20 and negative electrode portions 21. The positive electrode side 60 and the negative electrode side 61 of each LED chip 6 are arranged on an upper surface of each LED chip 6. Therefore, the positive electrode side 60 and the negative electrode side 61 of each LED chip 6 are respectively and electrically connected with the adjacent positive and negative electrode portions 20, 21 via two leading wires 21 by a wire-bounding method.
FIG. 8 shows a lateral, schematic view of a second arrangement of a plurality of LED chips according to the present invention. The first conductive layers 2′ are divided into a plurality of positive electrode portions 20′ and negative electrode portions 21′. The positive electrode side 60′ and the negative electrode side 61′ of each LED chip 6′ are respectively arranged on a lower surface and an upper surface of each LED chip 6′. Therefore, the positive electrode side 60′ of each LED chip 6′ is directly and electrically connected with the corresponding positive electrode portion 20′, and the negative electrode side 61′ of each LED chip 6′ is electrically connected with the corresponding negative electrode portion 21′ via a leading wire 7′ by a wire-bounding method.
FIG. 9 shows a lateral, schematic view of a third arrangement of a plurality of LED chips according to the present invention. The first conductive layers 2″ are divided into a plurality of positive electrode portions 20″ and negative electrode portions 21″. The positive electrode side 60″ and the negative electrode side 61″ of each LED chip 6″ are arranged on a lower surface of each LED chip 6″. Therefore, the positive electrode side 60″ and the negative electrode side 61″ of each LED chip 6″ are respectively and electrically connected with the adjacent positive and negative electrode portions 20″, 21″ via a plurality of corresponding solder balls 7″ by a flip-chip method.
FIG. 10 shows a lateral, schematic view of a fourth arrangement of a plurality of LED chips according to the present invention. The positive electrode side 90 and the negative electrode side 91 of each LED chip 9 are arranged on an upper surface of each LED chip 9, and each LED chip 9 is disposed between each two protrusions 92. Therefore, the positive electrode side 90 and the negative electrode side 91 of each LED chip 9 are respectively and electrically connected with the adjacent positive and negative electrode portions 94, 95 via two leading wires 93 by a wire-bounding method.
In conclusion, the advantage of the present invention is that the conductive layers (the first conductive layers 2, the second conductive layers 3, and the third conductive layers 4) are formed on the ceramic substrate 1 via any forming method, and the hollow ceramic casing 5 is fixed on the top face of the ceramic substrate 1 via an LTCC (Low-Temperature Cofired Ceramics). Therefore, the LED chip package structure of the present invention can electrically connect with a PCB (not shown) easily without bending the conductive pins (20 a, 21 a, 20 b, 21 b) as the prior art.
Hence, the LED chip package structure of the present invention can electrically connect with the PCB (not shown) easily without bending the conductive pins (20 a, 21 a, 20 b, 21 b) as the prior art by matching the penetrating holes 12 and the conductive layers (the first conductive layers 2, the second conductive layers 3, and the third conductive layers 4). In other words, the third conductive layers 4 are respectively filled in the penetrating holes 12 to form a plurality of conductive bridges between the first conductive layers 2 and the second conductive layers 3 or between the LED chips 6 and the PCB. Therefore, the present invention can reduce manufacturing process and cost.
Although the present invention has been described with reference to the preferred best molds thereof, it will be understood that the invention is not limited to the details thereof. Various substitutions and modifications have been suggested in the foregoing description, and others will occur to those of ordinary skill in the art. Therefore, all such substitutions and modifications are intended to be embraced within the scope of the invention as defined in the appended claims.

Claims (9)

1. A penetrating hole type LED chip package structure using a ceramic material as a substrate, comprising:
a ceramic substrate having a main body and a plurality of protrusions separated from each other and extended from a top face of the main body, said ceramic substrate having a plurality of half through holes formed on a lateral side of the main body and each positioned between neighboring protrusions, each protrusion including a penetrating hole offset from said half through holes, a channel extending in an obliquely angled manner through each protrusion from one said penetrating hole to one of said half through holes;
a conductive unit having a plurality of first conductive layers, each formed on a respective one of said plurality of protrusions, a plurality of second conductive layers, each formed on an inner surface of a respective one of said plurality of half through holes and a bottom face of the main body, and a plurality of third conductive layers, each filling one said channel, wherein each said third conductive layer is electrically connected between a respective one of said plurality of first conductive layers formed on said plurality of protrusions and one of said plurality of the second conductive layers formed on said inner surface of one of said plurality of half through holes and the bottom face of the main body;
a hollow ceramic casing fixed on the top face of the main body to form a receiving space for exposing top faces of the first conductive layer;
a plurality of LED chips received in the receiving space, wherein each LED chip has a positive electrode side and a negative electrode side, respectively, said positive and negative electrode sides of said each LED chip being electrically connected with said first conductive layers formed on respective neighboring two of said plurality of protrusions; and
a package colloid filled in the receiving space for covering the LED chips.
2. The penetrating hole type LED chip package structure as claimed in claim 1, wherein the main body and the hollow ceramic casing are two cuboids that are mated with each other.
3. The penetrating hole type LED chip package structure as claimed in claim 1, wherein the first conductive layers, the second conductive layers, and the third conductive layers are silver paste layers.
4. The penetrating hole type LED chip package structure as claimed in claim 1, wherein the receiving space faces top, so that bottom sides of the second conductive layers contact with a printed circuit board.
5. The penetrating hole type LED chip package structure as claimed in claim 1, wherein the first conductive layers are divided into a plurality of positive electrode portions and negative electrode portions.
6. The penetrating hole type LED chip package structure as claimed in claim 5, wherein the positive electrode side and the negative electrode side of each LED chip are arranged on an upper surface of each LED chip, and wherein the positive electrode side and the negative electrode side of each LED chip are electrically connected with neighboring positive and negative electrode portions via two leading wires by a wire-bounding method.
7. The penetrating hole type LED chip package structure as claimed in claim 5, wherein the positive electrode side and the negative electrode side of each LED chip are respectively arranged on a lower surface and an upper surface of each LED chip; whereby, the positive electrode side of each LED chip is directly and electrically connected with a corresponding positive electrode portion, and the negative electrode side of each LED chip is electrically connected with a corresponding negative electrode portion via a leading wire by a wire-bounding method.
8. The penetrating hole type LED chip package structure as claimed in claim 5, wherein the positive electrode side and the negative electrode side of each LED chip are arranged on a lower surface of each LED chip; whereby, the positive electrode side and the negative electrode side of each LED chip are respectively and electrically connected with adjacent positive and negative electrode portions via a plurality of corresponding solder balls by a flip-chip method.
9. The penetrating hole type LED chip package structure as claimed in claim 5, wherein the positive electrode side and the negative electrode side of each LED chip are arranged on an upper surface of each LED chip, each LED chip being disposed between each two protrusions, and wherein the positive electrode side and the negative electrode side of said each LED chip are electrically connected with neighboring positive and negative electrode portions via two leading wires by a wire-bounding method.
US11/976,340 2007-07-06 2007-10-24 Penetrating hole type LED chip package structure using a ceramic material as a substrate and method for manufacturing the same Expired - Fee Related US7741648B2 (en)

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US8587014B2 (en) * 2009-03-02 2013-11-19 Kingbright Electronic Co., Ltd. LED packaging structure with blind hole welding device
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4890383A (en) * 1988-01-15 1990-01-02 Simens Corporate Research & Support, Inc. Method for producing displays and modular components
US6355946B1 (en) * 1998-12-16 2002-03-12 Rohm Co., Ltd. Semiconductor device with reflector
US6392294B1 (en) * 1998-12-22 2002-05-21 Rohm Co., Ltd. Semiconductor device with stable protection coating
US20020153835A1 (en) * 2000-02-09 2002-10-24 Tsubasa Fujiwara Light source
US20050035357A1 (en) * 1997-02-18 2005-02-17 Tessera, Inc. Semiconductor package having light sensitive chips
US20050116235A1 (en) * 2003-12-02 2005-06-02 Schultz John C. Illumination assembly

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6985712B2 (en) * 2001-08-27 2006-01-10 Matsushita Electric Industrial Co., Ltd. RF device and communication apparatus using the same

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4890383A (en) * 1988-01-15 1990-01-02 Simens Corporate Research & Support, Inc. Method for producing displays and modular components
US20050035357A1 (en) * 1997-02-18 2005-02-17 Tessera, Inc. Semiconductor package having light sensitive chips
US6355946B1 (en) * 1998-12-16 2002-03-12 Rohm Co., Ltd. Semiconductor device with reflector
US6392294B1 (en) * 1998-12-22 2002-05-21 Rohm Co., Ltd. Semiconductor device with stable protection coating
US20020153835A1 (en) * 2000-02-09 2002-10-24 Tsubasa Fujiwara Light source
US20050116235A1 (en) * 2003-12-02 2005-06-02 Schultz John C. Illumination assembly

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