RU2756003C1 - Method for manufacturing a semiconductor apparatus - Google Patents

Abstract

FIELD: semiconductors.SUBSTANCE: invention relates to the field of technology for manufacturing semiconductor apparatuses, in particular, to a technology for manufacturing a sealing layer with a reduced leak current value. A method for manufacturing a semiconductor device apparatus is proposed, including the processes of forming the active areas of the apparatus, an insulating layer characterised by the fact that the insulating layer is formed by growing an oxide layer on an IpR p-type substrate with an alloying level of 8*1017cm-3by means of reactive sputtering of an IpR n-type plate of 0.002 ohm*cm at a pressure of 3 to 10-5Pa and an inflow of oxygen O2at a pressure of 13 Pa, at a current density at the cathode of 0.5 mA/cm2, a magnetic flux density of 0.015 T, a substrate temperature of 70°C by deposition at a rate of 2.5 nm/min, followed by annealing at a substrate temperature of 250°C in an atmosphere of nitrogen N2for 35 min.EFFECT: reducing the leak current, ensuring manufacturability, improving the structural parameters, increasing the quality and raising the percentage of the product yield.1 cl, 1 tbl

Description

The invention relates to the field of technology for the production of semiconductor devices, in particular to the technology of manufacturing an insulating layer with a reduced value of the leakage current.

A known method of manufacturing a semiconductor device [Application 1241142 Japan, MKI H01L 21/76] by forming interelemental insulation, growing a thin and thick film of silicon nitride and creating a mask from the latter, which protects the areas of formation of the components of the device. Impurity ions are implanted through the thin film to create the first guard ring. Impurity ions are implanted through the thick film to create a second guard ring. In such devices, due to the formation of guard rings, the crystal area increases and the electrical parameters of the devices deteriorate.

There is a known method of manufacturing a semiconductor device [US Patent 4983537, MKI H01L 21/76] by forming the dielectric insulation of the IC elements with hidden SiO ₂ filling the etched into Si-substrate, which makes it possible to exclude the formation of a parasitic conductive channel at the side walls in Si, and to reduce the electric field and leakage currents. A groove with smooth rounded side walls is formed in the Si substrate by reactive ion etching or local oxidation. The inner surface of the groove is thermally oxidized, then the PFCO layer of SiO _{2 is} carried out, filling the volume of the groove, which acts as a protective insulating layer.

The disadvantages of this method are:

- increased values of leakage currents;

- high defectiveness;

- low manufacturability.

The problem solved by the invention: reducing leakage currents, ensuring manufacturability, improving the parameters of devices, improving quality and increasing the percentage of yield.

The problem is solved by the formation of an insulating layer by growing an oxide layer on a substrate I _p P p-type conductivity with a doping level of 8 * 10 ¹⁷ cm ^-3 by reactive sputtering of the plate I _p P p-type 0.002 Ohm * cm at a pressure of 3 * 10 ^-5 Pa and admission of oxygen O _{2 with a} pressure of 13 Pa, at a current density at the cathode of 0.5 mA / cm ² , a magnetic flux density of 0.015 T, a substrate temperature of 70 ° C, deposition at a rate of 2.5 nm / min, followed by annealing at a substrate temperature of 250 ° C under nitrogen N ₂ for 35 min.

The technology of the method is as follows: an insulating layer is formed by growing an oxide layer on a substrate I _p P p-type conductivity with a doping level of 8 * 10 ¹⁷ cm ^-3 by reactive sputtering of a plate I _p P n-type 0.002 Ohm * cm at a pressure of 3 * 10 ^-5 Pa and oxygen O ₂ admission with a pressure of 13 Pa, at a current density at the cathode of 0.5 mA / cm ² , a magnetic flux density of 0.015 T, a substrate temperature of 70 ° C, deposition at a rate of 2.5 nm / min, followed by annealing at a substrate temperature of 250 ° C in an atmosphere of nitrogen N ₂ for 35 min.

According to the proposed method, semiconductor devices were manufactured and investigated. The processing results are presented in the table.

Experimental studies have shown that the yield of suitable structures for batches of plates formed in the optimal mode increased by 14.8%.

EFFECT: reducing leakage currents, ensuring manufacturability, improving the parameters of devices, improving the quality and increasing the percentage of yield.

The stability of the parameters over the entire operating temperature range was normal and met the requirements.

Claims (1)

A method for manufacturing a semiconductor device, including the formation of active regions of the device, an insulating layer, characterized in that the insulating layer is formed by growing an oxide layer on a p-type InP substrate with a doping level of 8 * 10 ¹⁷ cm ^-3 by reactive sputtering of an n-type InP plate 0.002 Ohm * cm at a pressure of 3 * 10 ^-5 Pa and an admission of oxygen O _{2 with a} pressure of 13 Pa, at a current density at the cathode of 0.5 mA / cm ² , a magnetic flux density of 0.015 T, a substrate temperature of 70 ° C, deposition at a rate of 2 , 5 nm / min, followed by annealing at a substrate temperature of 250 ° C in an atmosphere of nitrogen N ₂ for 35 min.