KR19990039099A - Gas mixture and contact forming method of semiconductor device using same - Google Patents

Abstract

The present invention relates to a method of forming a contact that improves contact resistance and a gas mixture used therein. An insulating layer is formed on the entire surface of the wiring pattern made of a polysilicon layer having a silicide film formed thereon. The insulating layer is patterned to form holes for exposing a predetermined region of the wiring pattern. Only the silicide layer exposed by the hole is selectively etched using a gas mixture including H ₂ O ₂ gas. An upper conductive layer is formed in the hole.

Description

Gas mixture and contact forming method of semiconductor device using same

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a contact of a semiconductor device, and more particularly to a method for forming a contact between polyside layers and a gas mixture used therein.

As semiconductor devices become more integrated and faster, their wiring widths decrease and resistance increases. Therefore, a low resistance wiring material is required. In order to cope with this, in recent years, instead of polysilicon containing impurities, a high melting point metal such as tungsten (W), cobalt (Co) and titanium (Ti) and polysilicon laminated with silicide and polysilicon, which are heat treatment compounds of silicon, A side structure is widely used as the gate wiring.

On the other hand, in order to transmit information in the DRAM, a direct contact may be formed between the bit line of the cell array region and the gate electrode of the transistor of the peripheral driving circuit region. At this time, a high contact resistance is a direct cause of deterioration of the semiconductor device, so the resistance within the contact should be lowered whenever possible.

In particular, when the size of the contact decreases to 300 nm or less as the degree of integration of the semiconductor device increases, the material of the contacted portion must be the same in order to lower the direct contact resistance between the gate electrode and the bit line. To this end, the metal silicide in the contact of the metal silicide layer and the polysilicon layer forming the gate electrode is removed, and then the polysilicon of the bit line and the polysilicon of the gate electrode must be contacted.

Conventionally wet etching was optionally performed to remove only metal silicides in the contacts. However, in this case, since not only the silicide but also the insulating films on both sides are partially etched, the contact profile is deformed into a jar shape, which causes a problem of causing voids when the polysilicon layer is filled into the contact to form a bit line. .

An object of the present invention is to provide a gas mixture used in the process of selectively etching only the silicide of the lower polyside layer in order to lower the contact resistance between the polyside layer.

Another object of the present invention is to provide a method for forming a contact between polyside layers using the gas mixture.

1 to 4 are cross-sectional views illustrating a method for forming a contact according to the present invention.

In order to achieve the above technical problem, the present invention provides a gas mixture for selectively etching only the silicide film in a conductive layer pattern made of a polysilicon layer having a silicide film formed thereon.

The gas mixture according to the present invention is any one gas selected from the group consisting of Cl ₂ , SF ₆ , BCl ₃ , HBr, CF ₄ , O _2, N ₂ , Ar, He-O ₂ and He and H ₂ O ₂ Made of gas.

The present invention for achieving the above another technical problem, to form an insulating layer on the entire surface of the wiring pattern made of a polysilicon layer formed with a silicide film on the top. The insulating layer is patterned to form holes for exposing a predetermined region of the wiring pattern. Only the silicide layer of the wiring pattern exposed by the hole is selectively etched using the gas mixture including H ₂ O ₂ gas. An upper conductive layer is formed in the hole.

The selective etching is dry etching by reactive ion sputtering and is anisotropic etching so that the etching of both insulating layers is suppressed. In addition, by using a gas containing H ₂ O ₂ , only silicide is effectively etched.

The etching includes first loading the wiring pattern into an etching apparatus at a predetermined temperature, introducing a gas mixture including H ₂ O ₂ gas into the etching apparatus, and maintaining a constant pressure. Subsequently, reactive ions and radicals are formed in the etching apparatus to perform etching by physical collision and etching by chemical reaction.

At this time, the constant pressure in the apparatus in which the etching proceeds is about 10 ^-2 to 10 ^-1 torr (torr) is preferably performed at a lower pressure than the conventional plasma etching.

According to the present invention, by evaporating H ₂ O ₂ from a liquid state to a gaseous state and then performing reactive ion etching (hereinafter referred to as RIE), an anisotropic etch prevents both sides of the insulating layer from being damaged. Can form a vertical contact profile. In addition, only silicide may be selectively removed from the polycide structure through chemical etching by H ₂ O ₂ ions.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, embodiments of the present invention may be modified in other forms, and the scope of the present invention should not be construed as being limited to the embodiments described below. Embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. In the drawings, the thicknesses of layers or regions are exaggerated for accuracy of the specification. In the drawings like reference numerals refer to like elements. In addition, where a layer is described as being on the "top" of another layer or substrate, the layer may be present directly on top of the other layer or substrate, with a third layer interposed therebetween.

Example

1 to 4 are cross-sectional views for explaining a process of forming a contact between polyside structures in an embodiment to which the present invention is applied.

Referring to FIG. 1, first, a gate insulating layer 12 is deposited on a semiconductor substrate 10, and then a polysilicon layer 14 having conductivity is deposited. Subsequently, a silicide film, for example, a tungsten silicide (WSix) film 16 is deposited on the polysilicon layer 14. Thereafter, a mask layer 18 is formed on the WSix film 16 to form an etching mask for patterning a wiring such as a gate electrode. The mask layer 18 may be formed of a silicon oxide film or a silicon nitride film.

Referring to FIG. 2, the mask layer 18 is selectively removed using a photolithography process to form a mask pattern 18A. The WSix film 16 and the polysilicon layer 14 are sequentially dry-etched using the mask pattern 18A as an etch mask to form the WSix film pattern 16A and the polysilicon pattern 14A. Thereafter, the mask pattern 18A is removed to complete wiring formation.

Referring to FIG. 3, an insulating film, for example, an oxide film 20 is formed on the entire surface of the resultant product. Subsequently, a mask pattern (not shown) is formed and patterned on the insulating layer 20 to form a hole H exposing the silicide pattern 16A.

Referring to FIG. 4, the silicide pattern 16A is selectively etched, and a polysilicon layer 22 is formed thereon to form a contact. The selective etching is a dry etching by gas, by a reactive ion sputtering method. At this time, by etching the etching gas to the surface of the target in the state of ions and radicals, physical etching is performed by sputtering and etching atoms on the surface, and chemical etching through chemical reaction of colliding ions is performed at the same time.

As the etching gas _, a mixture of any one gas selected from the group consisting of O _2, N ₂ , Ar, He—O _2, and He and H ₂ O ₂ gas is used. The inclusion of H ₂ O ₂ in the etching gas utilizes a high selective etching rate for silicide in the H ₂ O ₂ polyside structure.

In the etching gas of the present invention, since the etch rate is high with respect to the silicide film, since the material to be contacted with the polysilicon layer formed thereafter is the same, the resistance of the direct contact is lowered, thereby improving the reliability of the semiconductor device. In addition, after the wiring patterning of the polyside structure, it is possible to prevent the residue of silicide film or the fitting phenomenon in the gate oxide film. In addition, according to reactive ion sputtering, the etching is performed by anisotropic etching by physical etching due to the collision of ions, so that the silicide layer pattern 16A is damaged without damaging the oxide layer 20 forming the sidewall of the contact hole H. Selective etching of is possible.

The dry etching process by the etching gas of the present invention will be described in more detail as follows. First, the wiring pattern obtained in FIG. 3 is loaded into an etching chamber at a constant temperature. At this time, the site to be loaded is a cathode, and the entire wall of the etching chamber is an anode. Subsequently, a gas mixture including H ₂ O ₂ gas is introduced into the etching apparatus and maintained at a constant pressure. Here, since H ₂ O ₂ exists as a liquid at room temperature, it is vaporized into a gas and injected into the etching chamber, and O _2, N ₂ , Ar, He-O _2, or He used as a general etching gas is also injected. The constant pressure in the chamber is about 10 ⁻² to 10 ⁻¹ Torr and is performed under low pressure as compared to plasma etching. Radio frequency power of about 13.56 MHz is applied to the etching chamber to form reactive ions in the etching chamber.

The present invention is not limited to the above-described embodiments, and it is apparent that many modifications are possible by those skilled in the art within the technical spirit to which the present invention belongs.

According to the present invention described above, by selectively removing the silicide of the polyside interconnection by reactive ion etching using a gas mixture containing H ₂ O ₂ to improve the resistance in the contact with the polysilicon formed subsequently, anisotropic etching By this there is an advantage that the profile of the contact is improved.

Claims (10)

In the etching gas for selectively etching only the silicide layer in the conductive layer pattern consisting of a polysilicon pattern having a silicide layer formed thereon, The gas mixture, characterized in that the etching gas comprises H ₂ O ₂ gas. The gas mixture of claim 1, wherein the gas mixture further comprises at least one gas selected from the group consisting of Cl ₂ , SF ₆ , BCl ₃ , HBr, CF ₄ , O _2, N ₂ , Ar, He-O _2, and He. Gas mixture, characterized in that. The gas mixture of claim 1, wherein the silicide film is a TiSix or WSix film. Forming an insulating layer on an entire surface of a wiring pattern formed of a polysilicon pattern having a silicide film formed thereon; Patterning the insulating layer to form a hole exposing a predetermined region of the wiring pattern; Selectively dry etching only the silicide layer of the wiring pattern exposed by the hole using a gas mixture including H ₂ O ₂ gas; And And forming an upper conductive layer in the hole. The gas mixture of claim 4, wherein the gas mixture comprises at least one gas selected from the group consisting of Cl ₂ , SF ₆ , BCl ₃ , HBr, CF ₄ , O _2, N ₂ , Ar, He-O _2, and He. A contact forming method of a semiconductor device, characterized in that. The method of claim 4, wherein the silicide layer is a TiSix or WSix layer. The method of claim 4, wherein the selective etching is etching by reactive ion sputtering. The method of claim 4, wherein the selective etching is anisotropic etching. The method of claim 4, wherein the etching step, Loading the wiring pattern into an etching apparatus at a predetermined temperature; Introducing a gas mixture including H ₂ O ₂ gas into the etching apparatus and maintaining a constant pressure; And And forming reactive ions in the etching apparatus. The method of claim 9, wherein the constant pressure is a low pressure of 10 ⁻³ to 10 ⁻¹ tor (torr).