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JPS6070782A - Manufacture of light-emitting diode - Google Patents

Manufacture of light-emitting diode

Info

Publication number
JPS6070782A
JPS6070782A JP58179856A JP17985683A JPS6070782A JP S6070782 A JPS6070782 A JP S6070782A JP 58179856 A JP58179856 A JP 58179856A JP 17985683 A JP17985683 A JP 17985683A JP S6070782 A JPS6070782 A JP S6070782A
Authority
JP
Japan
Prior art keywords
mask
diffusion
hole
substrate
lattice
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58179856A
Other languages
Japanese (ja)
Inventor
Hiromi Takasu
高須 広海
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Tottori Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Tottori Sanyo Electric Co Ltd, Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP58179856A priority Critical patent/JPS6070782A/en
Publication of JPS6070782A publication Critical patent/JPS6070782A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment

Landscapes

  • Weting (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE:To prevent the inequality or lowering of the quantity of light emission and the shortening of life by dividing a light-emitting section into a plurality of fine regions and preventing corrosion on etching by utilizing a mask. CONSTITUTION:A mask 2 for selective diffusion is formed on a substrate 1, and a lattice 4 is shaped to the through-hole 3 of the mask 2. The lattice 4 divides the through-hole 3 into a plurality of regions, and is formed by a striped or parallel cross-shaped diffusion mask material, and width W is made narrower than side diffusion length. Diffusion regions 5 are connected mutually and a continuous P-N junction 6 is obtained on diffusion from the through-hole 3. An electrode film 7 consisting of aluminum or an aluminum alloy is evaporated on the whole surface, an etching mask 8 is formed, and the whole surface is etched by a phosphoric acid group etchant. The quantity of the substrate by the etchant is extremely small because an exposed section in the surface of the substrate 1 is partitioned into small sections by the lattice 4.

Description

【発明の詳細な説明】 イ)産業上の利用分野 本発明は特にプリンタヘッド等に好適な発光面の均一な
発光ダイオードの製造方法に関す己。
DETAILED DESCRIPTION OF THE INVENTION A) Field of Industrial Application The present invention relates to a method of manufacturing a light emitting diode with a uniform light emitting surface, which is particularly suitable for printer heads and the like.

口)従来技術 一般に第1図に示すように選択拡散によりpn接合<1
6)を形成し、その拡散領域(15)で発光させる場合
、この拡散領域(15)に電極(17)付けを行ない給
電を行なう。この場合、電極(17)はウェハ全体にM
、極材料を蒸着し、所望部分を残し発光部が表面に現わ
れるようにフォトリングラフィ技術を用いる。そのエツ
チングにおいては、電極材料に対するエッチャントが化
合物半導体をも溶かず事が多く、例えば金糸電極に対す
るエラチャ〉1・(E ウ化力’))+:LGaAQA
s系の半導体を、またアルミニウム系電極に対するエラ
チャンl−(リン酸系)はGaAsP系の化合物半導体
をよく溶が4゜一方拡散による不純物濃度は拡散深さに
従って低濃度となり高抵抗であるから表面側の方が低抵
抗トナっている。従って電極(17)のエンチングに伴
って半導体表面も溶かされて凹部(11’)がでさると
、電流の流れ方が不均一(中央や電極他端部で電流が流
れにくい)となり、暗い表示となったり寿命が短かくな
る。これは直接目視する表万く器においては目立たない
が、カメラ等の表示やプリンタヘッドにおいては、その
発光状態によって対象物(フィルムや感光ドラム)が感
光するし、また特に光ブリンクにおいてはブリンクヘッ
ドが機器の心臓部なので寿命が短かいと不都合である。
(2) Prior art In general, as shown in Figure 1, pn junction <1 is formed by selective diffusion.
6) and when emitting light in its diffusion region (15), an electrode (17) is attached to this diffusion region (15) and power is supplied. In this case, the electrode (17) is M
Then, a polar material is deposited, and a photolithography technique is used to leave a desired portion and expose a light-emitting portion on the surface. In the etching process, the etchant for the electrode material often does not dissolve the compound semiconductor; for example, the etchant for the gold thread electrode is
Erachan l- (phosphoric acid) for aluminum-based electrodes dissolves GaAsP-based compound semiconductors well, but the impurity concentration due to diffusion decreases as the diffusion depth increases, resulting in high resistance. The side has lower resistance. Therefore, as the electrode (17) is etched, the semiconductor surface is also melted and a recess (11') appears, causing the current to flow unevenly (current is difficult to flow in the center or at the other end of the electrode), resulting in a dark display. or the lifespan will be shortened. This is not noticeable in a display device that is directly visible, but in displays such as cameras and printer heads, the object (film or photosensitive drum) is exposed to light depending on the state of the light emitted, and especially in optical blinking, the blinking head Since it is the heart of the equipment, it is inconvenient if its lifespan is short.

ハ)発明の目的 本発明は一ヒ述の点を改良するためになされたものであ
る。
C) Purpose of the Invention The present invention has been made to improve the above points.

二)発明の構成 本発明は拡散の時に生じるサイド拡散を利用することで
発光領域は従来通り広い領域を形成するが、その時のマ
スクを利用して少なくともエツチングする時に発光部を
Ff、数の微4’y領域に分割して侵蝕を防ぐもので、
以下本発明を実施例に基づいて詳細に説明する。
2) Structure of the Invention The present invention utilizes the side diffusion that occurs during diffusion to form a wide light-emitting region as before, but at least when etching the light-emitting region using a mask, the light-emitting region is It is divided into 4'y areas to prevent erosion.
The present invention will be described in detail below based on examples.

ホ)実施例 第2図(a)乃至(f)は本発明実施例の発光ダイオー
ドの製造方法を説明する工程図である。まず第2区<a
)に示すように化合物半導体の基板(1)を準備するが
、例きしてGaAs上に積層されたGaAspを用いプ
リンタ用ヘッド(発光部は一辺50μmの角形)の製造
をする場合として説明する。
E) Embodiment FIGS. 2(a) to 2(f) are process diagrams illustrating a method for manufacturing a light emitting diode according to an embodiment of the present invention. First, the second ward <a
) A compound semiconductor substrate (1) is prepared as shown in (1), and the explanation will be given assuming that a printer head (the light emitting part is a square with a side of 50 μm) is manufactured using GaAsp laminated on GaAs. .

この基板(1)上に選択拡散用のマスク(2〉を設(づ
るが、同図(b)に示すようにマスク(2)の透孔(3
)には格子(4)が設けである。この格子(4)は透孔
(3)を複数領域に分割するもので、ストライプ状又は
#指状をなした拡散マスク剤で形成しであるが、その巾
(W>はサイド拡散長より狭い巾となっている。ここに
サイド拡散とは、マスクの透孔の太き・さに対し、基板
表面側で拡散法がりを呈し、透孔より大きい面積で拡散
される現象かあり、その時マスクの下にある拡散領域を
筈う。
A mask (2) for selective diffusion is provided on this substrate (1).As shown in FIG.
) is provided with a grid (4). This lattice (4) divides the through hole (3) into a plurality of regions, and is formed using a diffusion masking agent in the form of stripes or fingers, and its width (W> is narrower than the side diffusion length). Here, side diffusion refers to a phenomenon in which the diffusion method appears on the surface side of the substrate relative to the thickness and size of the through-hole in the mask, and the diffusion occurs over an area larger than the through-hole. Place the diffusion area below.

従ってこの透孔(3)から拡散を行なった場合、同図(
C)に示すように拡散領域(5)は互いに連接しあい、
連続したpn接合(6)が得られる。例えは700°c
−cp型不純物を2時間拡散した場合1ザイド拡散が行
なわれるので、そのサイド拡散長(2ザイド拡散長)は
約5μmである。従っ〔上述の格子く4)の11]りW
)は5μm以下であれはJ:いが、歩留まりや発光量を
考慮すると80%舅、l”(4am以下)が好ましい。
Therefore, when diffusion is performed through this through hole (3), the same figure (
As shown in C), the diffusion regions (5) are connected to each other,
A continuous pn junction (6) is obtained. For example, 700°C
When the -cp type impurity is diffused for 2 hours, 1xide diffusion is performed, so the side diffusion length (2xide diffusion length) is about 5 μm. Therefore, [the above grid 4)-11] W
) is 5 .mu.m or less.However, in consideration of yield and luminescence amount, 80% 1" (4 .mu.m or less) is preferable.

統いて第2図(d)に示すように全面にアルミ−ラム又
はアルミ合金からなる電極膜(7)を蒸着し、同図(d
)に示ずようにエンーJ−ングマスク(8)を設けてリ
ン酸系エッチャントで電極膜(7)’s−エツチングす
る。(同図(f)参照)その後工/グ−ングマスク(8
)除去、オーミ・/り化処理等を行なうか、上述の工程
のうち電極膜(7)のエツチングでは拡散用のマスク(
2)の格子(4〉によって基板(1〉の表面は露出部分
が小きく区切られているので、エッチャントによる基板
の侵蝕量は極めて小きい。マスク(2〉の格子(4ンは
後工程で除去し一〇もよいし、発光波長に対し透明であ
れば表面保護用に残しておいてもよい。
Then, as shown in Figure 2(d), an electrode film (7) made of aluminum or aluminum alloy is deposited on the entire surface.
), the electrode film (7)'s-etched with a phosphoric acid-based etchant using an engineering mask (8). (See figure (f)) Post-processing/Goog mask (8
) removal, ohmic/etching treatment, etc., or use a diffusion mask (
Since the exposed portion of the surface of the substrate (1) is divided into small sections by the grid (4) of mask (2), the amount of erosion of the substrate by the etchant is extremely small. It may be removed for 10 minutes, or it may be left for surface protection as long as it is transparent to the emission wavelength.

へ)発明の効果 以上の如く本発明は化合物半導体の表面に透孔を有した
マスクを設け、そのマスクの透孔を通して選択拡散する
ことによりp +1接合を形成する発光ダイオードの製
造方法において、前記マスクの透孔はサイド拡散長より
狭い1〕の格子を崩しているものであるから、連続した
p n接合の広い発光領域を具備しなから、後工程で表
面を侵蝕され発光量が不拘−又は低下することなく、ま
た寿命が短かくなることもない。
f) Effects of the Invention As described above, the present invention provides a method for manufacturing a light emitting diode in which a mask having through holes is provided on the surface of a compound semiconductor, and a p+1 junction is formed by selectively diffusing through the through holes of the mask. Since the through holes in the mask break the lattice of 1] which is narrower than the side diffusion length, they do not have a wide light emitting region of continuous p-n junctions, so the surface is eroded in the subsequent process and the amount of light emitted is unrestricted. Or, there is no deterioration, and the lifespan is not shortened.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の製造方法による発光ダイオードの断面図
、第2図(a)乃至(f)は本発明実施例の発光ダイオ
ードの製造方法を説明する工程図である。 (1)・・(化合物半導体の)基板、(2)・ (拡散
用の)マスク、(3〉・・透孔、(4)・・格子、(5
) ・拡散領域、(6ン pn接合、(7)・・電極膜
、(13)エツチングマスク。
FIG. 1 is a sectional view of a light emitting diode produced by a conventional manufacturing method, and FIGS. 2(a) to 2(f) are process diagrams illustrating a method of manufacturing a light emitting diode according to an embodiment of the present invention. (1) Substrate (compound semiconductor), (2) Mask (for diffusion), (3> Through hole, (4) Lattice, (5
) ・Diffusion region, (6 pn junction, (7)...electrode film, (13) etching mask.

Claims (1)

【特許請求の範囲】[Claims] 1〉化合物半導体の表面に透孔を有したマスクを設け、
そのマスクの透孔を通して選択拡散することによりpn
接合を形成する発光ダイオードの製造方法において、前
記マスクの透孔はザイド拡散長より狭い巾の格子を有し
ている事を特徴とする発光ダイオードの製造方法。
1> Provide a mask with through holes on the surface of the compound semiconductor,
By selectively diffusing pn through the holes in the mask,
A method of manufacturing a light emitting diode forming a junction, wherein the through hole of the mask has a lattice whose width is narrower than the Zide diffusion length.
JP58179856A 1983-09-27 1983-09-27 Manufacture of light-emitting diode Pending JPS6070782A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58179856A JPS6070782A (en) 1983-09-27 1983-09-27 Manufacture of light-emitting diode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58179856A JPS6070782A (en) 1983-09-27 1983-09-27 Manufacture of light-emitting diode

Publications (1)

Publication Number Publication Date
JPS6070782A true JPS6070782A (en) 1985-04-22

Family

ID=16073107

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58179856A Pending JPS6070782A (en) 1983-09-27 1983-09-27 Manufacture of light-emitting diode

Country Status (1)

Country Link
JP (1) JPS6070782A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6161479A (en) * 1984-09-01 1986-03-29 Oki Electric Ind Co Ltd Manufacturing method of light emitting device
US4956684A (en) * 1987-09-24 1990-09-11 Fuji Xerox Co., Ltd. Printer head with light emitting element array

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4915367A (en) * 1972-05-17 1974-02-09
JPS5114239A (en) * 1974-06-25 1976-02-04 Ibm
JPS5856370A (en) * 1981-09-30 1983-04-04 Toshiba Corp Monolithic semiconductor light emitting device and its manufacturing method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4915367A (en) * 1972-05-17 1974-02-09
JPS5114239A (en) * 1974-06-25 1976-02-04 Ibm
JPS5856370A (en) * 1981-09-30 1983-04-04 Toshiba Corp Monolithic semiconductor light emitting device and its manufacturing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6161479A (en) * 1984-09-01 1986-03-29 Oki Electric Ind Co Ltd Manufacturing method of light emitting device
US4956684A (en) * 1987-09-24 1990-09-11 Fuji Xerox Co., Ltd. Printer head with light emitting element array

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