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JPS6412364A - System constitution control system - Google Patents

System constitution control system

Info

Publication number
JPS6412364A
JPS6412364A JP16843787A JP16843787A JPS6412364A JP S6412364 A JPS6412364 A JP S6412364A JP 16843787 A JP16843787 A JP 16843787A JP 16843787 A JP16843787 A JP 16843787A JP S6412364 A JPS6412364 A JP S6412364A
Authority
JP
Japan
Prior art keywords
constituted
processor
memories
processors
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16843787A
Other languages
Japanese (ja)
Inventor
Haruo Kohama
Takuya Hiramatsu
Seijiro Tajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP16843787A priority Critical patent/JPS6412364A/en
Publication of JPS6412364A publication Critical patent/JPS6412364A/en
Pending legal-status Critical Current

Links

Landscapes

  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)

Abstract

PURPOSE:To rapidly perform the change of system constitution, by attaching group identification information at every group after dividing all modules in a system into plural systems (groups), and permitting only communication between the modules that belong to the same group. CONSTITUTION:A bus B is constituted of an address line and a data line, and all processors P00-P20 and memories M00-M20 are connected commonly to the bus B. Out of them, the system A is constituted of the processor P00 and P01 and the memories M00 and M01, and similarly, the system B is constituted of the processors P10 and P11 and the memories M10, and the system C is constituted of the processor P20 and the memory M20. The processor and the memory that belong to each system are provided with proper system ID (00 for the system A, 01 for the system B, and 10 for the system C), and the communication is permitted only between the processors or between the processor and the memory holding the same system ID.
JP16843787A 1987-07-06 1987-07-06 System constitution control system Pending JPS6412364A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16843787A JPS6412364A (en) 1987-07-06 1987-07-06 System constitution control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16843787A JPS6412364A (en) 1987-07-06 1987-07-06 System constitution control system

Publications (1)

Publication Number Publication Date
JPS6412364A true JPS6412364A (en) 1989-01-17

Family

ID=15868100

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16843787A Pending JPS6412364A (en) 1987-07-06 1987-07-06 System constitution control system

Country Status (1)

Country Link
JP (1) JPS6412364A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002077826A1 (en) * 2001-03-22 2002-10-03 Sony Computer Entertainment Inc. Memory protection system and method for computer architecture for broadband networks
US6809734B2 (en) 2001-03-22 2004-10-26 Sony Computer Entertainment Inc. Resource dedication system and method for a computer architecture for broadband networks
US6826662B2 (en) 2001-03-22 2004-11-30 Sony Computer Entertainment Inc. System and method for data synchronization for a computer architecture for broadband networks
US6938078B1 (en) 1998-12-09 2005-08-30 Nec Corporation Data processing apparatus and data processing method
US7093104B2 (en) 2001-03-22 2006-08-15 Sony Computer Entertainment Inc. Processing modules for computer architecture for broadband networks
JP2007501477A (en) * 2003-05-29 2007-01-25 フリースケール セミコンダクター インコーポレイテッド Method and apparatus for determining access permissions
JP2009205687A (en) * 2001-06-11 2009-09-10 Microsoft Corp Multiple device management method and system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60130994A (en) * 1983-12-19 1985-07-12 Nippon Telegr & Teleph Corp <Ntt> Communication system between processors

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60130994A (en) * 1983-12-19 1985-07-12 Nippon Telegr & Teleph Corp <Ntt> Communication system between processors

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6938078B1 (en) 1998-12-09 2005-08-30 Nec Corporation Data processing apparatus and data processing method
WO2002077826A1 (en) * 2001-03-22 2002-10-03 Sony Computer Entertainment Inc. Memory protection system and method for computer architecture for broadband networks
US6526491B2 (en) 2001-03-22 2003-02-25 Sony Corporation Entertainment Inc. Memory protection system and method for computer architecture for broadband networks
US6809734B2 (en) 2001-03-22 2004-10-26 Sony Computer Entertainment Inc. Resource dedication system and method for a computer architecture for broadband networks
US6826662B2 (en) 2001-03-22 2004-11-30 Sony Computer Entertainment Inc. System and method for data synchronization for a computer architecture for broadband networks
US7093104B2 (en) 2001-03-22 2006-08-15 Sony Computer Entertainment Inc. Processing modules for computer architecture for broadband networks
US7139882B2 (en) 2001-03-22 2006-11-21 Sony Computer Entertainment Inc. Memory protection system and method for computer architecture for broadband networks
JP2009205687A (en) * 2001-06-11 2009-09-10 Microsoft Corp Multiple device management method and system
JP2007501477A (en) * 2003-05-29 2007-01-25 フリースケール セミコンダクター インコーポレイテッド Method and apparatus for determining access permissions

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