JPH0360097A - Manufacture of multilayer printed circuit board - Google Patents
Manufacture of multilayer printed circuit boardInfo
- Publication number
- JPH0360097A JPH0360097A JP19492989A JP19492989A JPH0360097A JP H0360097 A JPH0360097 A JP H0360097A JP 19492989 A JP19492989 A JP 19492989A JP 19492989 A JP19492989 A JP 19492989A JP H0360097 A JPH0360097 A JP H0360097A
- Authority
- JP
- Japan
- Prior art keywords
- boards
- adhesive resin
- printed wiring
- wiring board
- solder bumps
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は多層プリント配線基板の層間導体接続及び層間
接着に係る基板の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for manufacturing a multilayer printed wiring board relating to interlayer conductor connection and interlayer adhesion.
(従来の技術)
笛り円I!煤本ハ衆闇イII ’J k西ン*空妬の一
麟1←1゜て4層プリント配線基板の製造方法の断面図
を示す。(Conventional technology) Whistle circle I! 1←1° shows a cross-sectional view of a method for manufacturing a four-layer printed wiring board.
同図において、1は上部片面プリント配線基板、2は上
部片面プリント基板1上の銅箔層、3は下部片面プリン
ト配線基板、4は下部片面プリント基板3上の銅箔層、
5は内部両面プリント配線基板、6は内部両面プリント
配線基板5上のパターン化した銅箔層、7は内部両面プ
リント配線基板5上のパターン化した銅箔層、8は層間
接着シート、9は層間接着層、10はスルーホール下穴
、11は層間導通接続用スルーホールを示す。In the figure, 1 is an upper single-sided printed wiring board, 2 is a copper foil layer on the upper single-sided printed wiring board 1, 3 is a lower single-sided printed wiring board, 4 is a copper foil layer on the lower single-sided printed wiring board 3,
5 is an internal double-sided printed wiring board, 6 is a patterned copper foil layer on the internal double-sided printed wiring board 5, 7 is a patterned copper foil layer on the internal double-sided printed wiring board 5, 8 is an interlayer adhesive sheet, and 9 is a patterned copper foil layer on the internal double-sided printed wiring board 5. In the interlayer adhesive layer, 10 indicates a pilot hole for a through hole, and 11 indicates a through hole for interlayer conductive connection.
第2図(a)は接着前の構成を表わしている断面図で、
内部両面プリント配線基板5は銅箔層6゜7の厚さをス
ルーホール信頼性確保のため、一般に70μmを使い、
通常の両面プリント配線基板と同様に必要な両面パター
ンを形成したものである。この両面プリント配線基板5
の上下をプリプレグと呼ばれる層間接着シート8を挟ん
で片面プリント配線基板1.3を重ねる。この段階では
飼惰眉ン 4を士バ々−’/ tkシ引アいかい一 徊
笛層2.4の厚さは製造からの制約はなく一般に使われ
る18〜35μmの銅厚さで十分である。こうして重ね
られたものの上下を後の加圧・加熱に耐え得るステンレ
ス(図示せず)などの平板で挟み、例えば、エポキシ樹
脂系では170℃、30kgf /am2.90分間の
加圧・加熱により硬化させ層間接着を行う。この後、第
2図(b)に示すように層間導通接続のためにスルーホ
ール下穴10をあける。穴あけ後は、第2図(C)に示
すように通常の両面プリント配線基板と同様メツキによ
り銅を析出させ層間の導通を得て層間接着用スルーホー
ル11を完成させる。さらに上下銅箔層2.4はこの後
パターン化されて、プリント配線基板が出来る。Figure 2(a) is a cross-sectional view showing the configuration before bonding.
The internal double-sided printed wiring board 5 has a copper foil layer with a thickness of 6°7 to ensure through-hole reliability, generally using a thickness of 70 μm.
It has the necessary double-sided patterns formed in the same way as a normal double-sided printed wiring board. This double-sided printed wiring board 5
A single-sided printed wiring board 1.3 is stacked on top and bottom of the board with an interlayer adhesive sheet 8 called prepreg in between. At this stage, the thickness of the copper layer 2.4 is not limited by manufacturing, and the generally used copper thickness of 18 to 35 μm is sufficient. It is. The top and bottom of the stacked materials are sandwiched between flat plates made of stainless steel (not shown) that can withstand later pressure and heat. For example, in the case of epoxy resin, it is hardened by pressure and heat at 170°C and 30 kgf/am2.90 minutes. and perform interlayer adhesion. Thereafter, as shown in FIG. 2(b), a pilot hole 10 for a through hole is drilled for interlayer conductive connection. After drilling, as shown in FIG. 2(C), copper is deposited by plating to obtain conduction between the layers and complete the interlayer bonding through hole 11, as shown in FIG. 2(C). Further, the upper and lower copper foil layers 2.4 are then patterned to form a printed wiring board.
(発明が解決しようとする課題)
従来多層プリント配線基板において、層間の導体接続を
得る方法としてはスルーホールによる方法が用いられて
いる。従来方式では、多層化の層間接着を行った眉間の
導通接続を取るためのスルーホール形式を行うため、ス
ルーホール加工でのスメア不良、あるいはメツキやバタ
ーニング処理にともなうウェット処理のために、内層へ
メツキ液等の処理液がしみこみ、内層導体の劣化を早め
る悪影響がある。さらに眉間に空気層が残り後工程での
加熱時に空気層の膨張で眉間はがれが生じる等の欠点が
ある。本発明はこうした欠点を解決する方法を提供する
ものである。(Problems to be Solved by the Invention) Conventionally, in multilayer printed wiring boards, a method using through holes has been used as a method for obtaining conductor connections between layers. In the conventional method, a through-hole type is used to make a conductive connection between the eyebrows with inter-layer adhesion in multilayers, so there are problems with smearing defects in through-hole processing, or wet processing associated with plating and buttering processing, which prevents the inner layer from forming. Processing liquids such as denting liquid seep in, which has the adverse effect of accelerating deterioration of the inner layer conductor. Furthermore, there is a drawback that an air layer remains between the eyebrows and peeling occurs between the eyebrows due to expansion of the air layer during heating in a post-process. The present invention provides a method to overcome these drawbacks.
(発明の構成及び作用の説明)
第1図に本発明による4層プリント配線基板の一実施例
を断面図で示す。同図において、12は両面プリント配
線基板、13.14は両面プリント配線基板12上のパ
ターン化された銅箔層、15は両面プリント配線基板1
2上の両面パターンを導通接続するためのスルーホール
、16は両面プリント配線基板、17.18は両面プリ
ント配線基板16上のパターン化された銅箔層、19は
両面プリント配線基板16上の両面パターンを導通接続
するためのスルーホール、20は半田バンプ、21は半
田バンプ融合部、22は容器、23は接着層If??!
、 24は接着層、25はすき間はみ出し樹脂、26は
スルーホールはみ出し樹脂を示す。(Description of Structure and Effects of the Invention) FIG. 1 shows a cross-sectional view of an embodiment of a four-layer printed wiring board according to the present invention. In the figure, 12 is a double-sided printed wiring board, 13.14 is a patterned copper foil layer on the double-sided printed wiring board 12, and 15 is a double-sided printed wiring board 1.
16 is a double-sided printed wiring board, 17.18 is a patterned copper foil layer on the double-sided printed wiring board 16, and 19 is a double-sided printed wiring board 16. A through hole for electrically connecting the pattern, 20 a solder bump, 21 a solder bump fusion part, 22 a container, and 23 an adhesive layer If? ? !
, 24 indicates an adhesive layer, 25 indicates a resin protruding from a gap, and 26 indicates a resin protruding from a through hole.
第1図(a)において、両面プリント配線基板12.1
6はどちらも必要なスルーホール15゜19や両面パタ
ーンの銅箔層13.’14.17゜18を形成した通常
の両面プリント基板である。In FIG. 1(a), a double-sided printed wiring board 12.1
6 are both necessary through holes 15° 19 and double-sided patterned copper foil layer 13. It is a normal double-sided printed circuit board with 14.17°18.
両面パターンの銅箔層13,14,17.18は、通常
用いられている18〜35μmで十分である。The copper foil layers 13, 14, 17, and 18 of the double-sided pattern are sufficient to have a thickness of 18 to 35 μm, which is commonly used.
この両面プリント配線基板12.16の対向する面の鋼
箔層14.17上の導通接続箇所に半田バンプ20を、
例えば、クリーム半田の印刷、半田リフローにより形成
する。半田は一般的な共晶半田を用いる。Solder bumps 20 are placed at conductive connection points on the steel foil layer 14.17 on the opposite side of this double-sided printed wiring board 12.16.
For example, it is formed by cream solder printing or solder reflow. General eutectic solder is used for the solder.
こうして得られた基板を第1図(b)に示すように容器
22内の接着樹脂液23中に漫潰し、接着樹脂?夜23
中で半田バンプ20同士向い合わせて重ねて押し付け、
そのまま接着樹脂液23の外に取り出す。この時、半田
バンプ20同士が向かい合っている面の両面プリント配
線基板12.IAF−”!m−J−IFJ+十 個2r
fxlA 17)生mパ)lブ20の厚さに関係する
が数十〜100μm程度であるから、このすき間にある
接着樹脂′e23は充填されたままである。またスルー
ホール15,19内の接着樹脂液23も表面張力により
充填されたままである。なお大きな穴のある配線基板を
用いる場合は半田バンプと反対の面にテーピング等で、
目張りする方法がある。こうして取り出した重ね合わせ
基板の上下を平らなステンレス板などで挾み、加圧しな
がら加熱し向かい合わせた半田バンプ20同士を融合さ
せる。その後接着樹脂液の硬化条件の温度を与え層間接
着を終える。第1図(C)はこの様子を示すもので、加
工・加熱により対向する半田バンプ20が融合し半田バ
ンプ融合部21が形成される。また、接着樹脂液23は
硬化し接着層24が形成され、同時に対向半田バンプ2
0が融合するときに両路線基板間のすき間が小さくなる
ので、すき間はみ出し樹脂25、スルーホールはみ出し
樹脂26が形成される。それぞれのはみ出し樹脂は研磨
、切断等で取り除く。The substrate obtained in this way is crushed in the adhesive resin liquid 23 in the container 22 as shown in FIG. 1(b), and the adhesive resin is removed. night 23
Inside, stack the solder bumps 20 facing each other and press them together.
Take it out of the adhesive resin liquid 23 as it is. At this time, the double-sided printed wiring board 12. on the side where the solder bumps 20 are facing each other. IAF-”!m-J-IFJ+10 pieces 2r
fxlA 17) Although it is related to the thickness of the blank 20, it is about several tens to 100 μm, so the adhesive resin 'e23 in this gap remains filled. Furthermore, the adhesive resin liquid 23 in the through holes 15 and 19 remains filled due to surface tension. If you are using a wiring board with large holes, use tape, etc. on the side opposite to the solder bumps.
There is a way to highlight it. The top and bottom of the stacked substrates taken out in this way are sandwiched between flat stainless steel plates, etc., and heated while applying pressure to fuse the facing solder bumps 20 together. Thereafter, the temperature required for curing the adhesive resin liquid is applied to complete interlayer adhesion. FIG. 1(C) shows this situation, in which the opposing solder bumps 20 are fused by processing and heating to form a solder bump fused portion 21. Further, the adhesive resin liquid 23 is cured to form an adhesive layer 24, and at the same time, the opposing solder bump 2
Since the gap between the two line boards becomes smaller when the two line boards are fused, a gap-protruding resin 25 and a through-hole protruding resin 26 are formed. Each protruding resin is removed by polishing, cutting, etc.
加熱は一般には接着樹脂をエポキシ系で行うため、2段
階の加熱ステップが有利である。すなわち第一段階は半
田融点以上の温度、第二段階では樹脂硬化条件の温度及
びキープ時間を与えることが必要である。この場合、第
二段階の温度が第一段階よりも低温で半田バンプの融点
以下の場合は、加圧を取り除いて良い。また半田バンプ
間の融合時には超音波振動を併用すると半田融点以下の
温度でも融合させることが可能である。Since heating is generally performed using an epoxy adhesive resin, a two-stage heating step is advantageous. That is, it is necessary to provide a temperature higher than the solder melting point in the first stage, and a temperature and a holding time for resin curing conditions in the second stage. In this case, if the temperature of the second stage is lower than the first stage and below the melting point of the solder bump, the pressure may be removed. Further, when the solder bumps are fused together, it is possible to fuse them even at a temperature below the solder melting point by using ultrasonic vibration.
以上の例はプリント配線基板2枚を張り合わせた例であ
るが、3枚以上の張り合わせでも同様の事が可能である
。すなわち、対向する面の半田バンプの形成を全履行い
、半田バンプの融合、接着樹脂液の充填・硬化接着とを
全層−度に、あるいは一対向面毎に上記工程を繰り返す
ことで多層化が出来る。さらに内部に気泡が残る恐れが
ある場合は、接着樹脂液に基板が入っているところで脱
泡する事が有効である。Although the above example is an example in which two printed wiring boards are pasted together, the same thing is possible when three or more boards are pasted together. In other words, the formation of solder bumps on the opposing surfaces is completed, and the solder bumps are fused, and the adhesive resin liquid is filled and cured for each layer, or by repeating the above steps for each opposing surface to create a multilayer structure. I can do it. Furthermore, if there is a possibility that air bubbles may remain inside, it is effective to remove air bubbles when the substrate is in the adhesive resin liquid.
(発明の効果)
以上の工程により多層基板が得られるため、従来の多層
基板に見られる多層化後のスルーホール加工やバターニ
ングがないため、スルーホールで問題となるスメアやメ
ツキの為のウェット処理時の内層へのしみこみによる内
層導体の酸化などの悪影響等多層後のトラブルが解決さ
れる。また、多層PCC間接暗時空気を取り込む事が無
いため完成した多層基板の後工程での加熱による内部気
泡の膨張によるはがれ、あるいは未接着部の進行の恐れ
が無い構造が得られる。すなわち、信頼性の高い多層基
板が得られる。(Effects of the invention) Since a multilayer board can be obtained through the above process, there is no through-hole processing or buttering after multilayering, which is seen in conventional multilayer boards, and there is no need for wet smearing or plating, which is a problem with through-holes. This solves problems after multilayering, such as adverse effects such as oxidation of the inner layer conductor due to seepage into the inner layer during processing. Furthermore, since air is not taken in when the multilayer PCC is indirectly dark, a structure can be obtained in which there is no risk of peeling off due to the expansion of internal bubbles due to heating in the post-process of the completed multilayer board, or of the progress of unbonded parts. That is, a highly reliable multilayer board can be obtained.
第1図(a)〜(c)は本発明による多層プリント基板
の製造工程の一実施例を示す断面図、第2図(a)〜(
C)は従来技術による多層プリント基板の製造工程の一
実施例を示す断面図である。
1・・・上部片面プリント配線基板、2.4,6゜7・
・・銅箔層、3・・・下部片面プリント配線基板、5・
・内部両面プリント配線基板、8・・・層間接着シー
ト、9・・・層間接着層、10・・・スルーホール下穴
、11・・・層間導通接続用スルーホール、]、2.1
.6・・・両面プリント配線基板、13,14.17.
18・・・銅箔層、15.19・・・スルーホール、2
0・・・半田バンプ、21・・・半田バンプ融合部、2
2・ ・容器、23・ ・接着樹脂液、24・・・接着
層、25・・・すき間はみ出し樹脂、26・・・スルー
ホールはみ出しく封脂。FIGS. 1(a) to (c) are cross-sectional views showing one embodiment of the manufacturing process of a multilayer printed circuit board according to the present invention, and FIGS. 2(a) to (c)
C) is a sectional view showing an example of the manufacturing process of a multilayer printed circuit board according to the prior art. 1... Upper single-sided printed wiring board, 2.4, 6°7.
...Copper foil layer, 3...Lower single-sided printed wiring board, 5.
・Internal double-sided printed wiring board, 8... interlayer adhesive sheet, 9... interlayer adhesive layer, 10... through hole pilot hole, 11... through hole for interlayer conduction connection, ], 2.1
.. 6...Double-sided printed wiring board, 13,14.17.
18...Copper foil layer, 15.19...Through hole, 2
0...Solder bump, 21...Solder bump fusion part, 2
2. Container, 23. Adhesive resin liquid, 24 Adhesive layer, 25 Resin protruding from the gap, 26 Seal sealing protruding from the through hole.
Claims (1)
いて、対向する双方の該プリント配線基板の導体上の任
意の対向する箇所に半田バンプを形成し、該半田バンプ
を重ね合せ、接着樹脂液中において加圧しながら加熱あ
るいは加熱と超音波振動を加えて、前記半田バンプを融
合接続し、前記接着樹脂を硬化させることにより多層プ
リント配線基板を得ることを特徴とする多層プリント配
線基板の製造方法。In a multilayer board in which a plurality of printed wiring boards are stacked, solder bumps are formed at arbitrary opposing locations on the conductors of both opposing printed wiring boards, the solder bumps are stacked, and pressure is applied in an adhesive resin liquid. A method for manufacturing a multilayer printed wiring board, characterized in that a multilayer printed wiring board is obtained by applying heating or heating and ultrasonic vibration to fuse and connect the solder bumps and harden the adhesive resin.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19492989A JPH0360097A (en) | 1989-07-27 | 1989-07-27 | Manufacture of multilayer printed circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19492989A JPH0360097A (en) | 1989-07-27 | 1989-07-27 | Manufacture of multilayer printed circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0360097A true JPH0360097A (en) | 1991-03-15 |
Family
ID=16332692
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19492989A Pending JPH0360097A (en) | 1989-07-27 | 1989-07-27 | Manufacture of multilayer printed circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0360097A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07105144A (en) * | 1993-07-27 | 1995-04-21 | Internatl Business Mach Corp <Ibm> | Stacking of circuited polymer dielectric panel |
KR20010021431A (en) * | 1999-08-26 | 2001-03-15 | 구리다 히데유키 | So nicator, multilayer flexible circuit board and method for producing the same |
KR100744463B1 (en) * | 2006-02-15 | 2007-08-01 | 디케이 유아이엘 주식회사 | Manufacturing method of multilayer flexible circuit board |
KR100800282B1 (en) * | 2006-02-15 | 2008-02-11 | 디케이 유아이엘 주식회사 | Manufacturing method of multilayer flexible circuit board |
WO2015083249A1 (en) * | 2013-12-04 | 2015-06-11 | 株式会社日立製作所 | Multilayer wiring board and method for manufacturing same |
-
1989
- 1989-07-27 JP JP19492989A patent/JPH0360097A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07105144A (en) * | 1993-07-27 | 1995-04-21 | Internatl Business Mach Corp <Ibm> | Stacking of circuited polymer dielectric panel |
KR20010021431A (en) * | 1999-08-26 | 2001-03-15 | 구리다 히데유키 | So nicator, multilayer flexible circuit board and method for producing the same |
KR100744463B1 (en) * | 2006-02-15 | 2007-08-01 | 디케이 유아이엘 주식회사 | Manufacturing method of multilayer flexible circuit board |
KR100800282B1 (en) * | 2006-02-15 | 2008-02-11 | 디케이 유아이엘 주식회사 | Manufacturing method of multilayer flexible circuit board |
WO2015083249A1 (en) * | 2013-12-04 | 2015-06-11 | 株式会社日立製作所 | Multilayer wiring board and method for manufacturing same |
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