JPH0739142U - Local area network system - Google Patents

Abstract

(57) [Summary] [Structure] Each station from station 1 to station n has a CPU, a 2-port memory accessed by the CPU, and data write information (memory access information) for the 2-port memory of the CPU, communicated with other stations. The communication control unit comprises means for transmitting to the control unit, receiving memory access information from another station, and writing the same data to the corresponding address of the 2-port memory in the own station. [Effect] The two-port memory in each station becomes equivalent to the shared memory as the N-port memory in the entire local area network system, so that even if one of the stations is in an abnormal state, another station can act on its behalf. become.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a local area network system having a shared memory.

[0002]

[Prior art]

 In a conventional general local area network system, each station connected to the network is composed of a CPU, a memory, a communication control unit, and an interface with peripheral devices as necessary. It is used as a local memory that can be accessed only by the CPU provided in that station.

[0003]

[Problems to be solved by the device]

 In a local area network system, data communication can be easily performed between stations, so even if one station connected to the network goes down, the entire local area network system Depending on the configuration, other normal stations connected to the network can substitute the processing to be performed by the station in the abnormal state.

However, since the memory provided in each station is a local memory that is independent of other stations, the local memory in the station in an abnormal state cannot be directly accessed by the CPU of the acting station. Therefore, it is not possible to substitute for the processing that requires access to the local memory in the station in an abnormal state. Also, when transmitting a certain piece of data to multiple other stations connected to the network, communication control must be performed according to a predetermined communication procedure, and the CPU is burdened for that purpose. It will be.

On the other hand, in a multiprocessor system having a plurality of CPUs and forming one system, all the CPUs can access exactly the same memory (shared memory) as its own memory, and the local memory Since it does not require data transfer between CPUs, it has the characteristics that communication between CPUs can be performed at extremely high speed and that reliability can be improved by configuring a multi-system system or a fail-safe system. .

An object of the present invention is to introduce the concept of a multiprocessor system having a shared memory into a local area network system and reduce the load of the CPU in each station for data communication between the stations. Is to provide.

Another object of the present invention is to provide, when one or a plurality of stations connected to the network are in an abnormal state where they cannot execute the intended processing, other normal stations perform the processing. On behalf of them is to provide a local area network system with improved reliability as a whole.

[0008]

[Means for Solving the Problems]

 A local area network system according to claim 1 of the present invention is a local area network system in which a plurality of stations are connected via a local area network. A CPU for reading and writing, a memory access information detecting unit for detecting data and its address information written in the 2-port memory by the CPU, and sending the detected data and address information via a local area network. Memory access information sending means, memory access information receiving means for receiving data and address information sent by another station via the local area network, and address of the 2-port memory equal to the received address information To the received Each station is characterized by comprising a communication control unit including a memory write control unit for writing data equivalent to data information.

A local area network system according to a second aspect is the local area network system according to the first aspect, which receives abnormality notification data transmitted from another station via the local area network, or One or a plurality of abnormal state detecting means for detecting another station in an abnormal state from the contents of the writing area of the other station in the port memory, and processing proxy means for performing the processing of the other station in the abnormal state are provided. It is characterized by being installed in the station.

[0010]

[Action]

 FIG. 1 shows a configuration example of a local area network system according to claim 1 of the present invention. In FIG. 1, reference numeral 10 is a transmission path of the local area network, and in this example, the first station, the second station, the third station, ... The nth station are connected in a ring shape.

Each station is composed of a 2-port memory, a CPU and a communication control unit, and the CPU reads / writes data from / to the 2-port memory. The memory access information detecting means provided in the communication control section detects the data written in the 2-port memory by the CPU and the information of the address, and the memory access information transmitting means detects the detected data and The address information is transmitted via the local area network. Further, the memory access information receiving means receives the data and address information sent from another station via the local area network, and the memory write control means stores the data of the two-port memory equal to the received address information. Data equal to the information of the received data is written to the address. Therefore, if the CPU writes some data to the 2-port memory, the memory access information detection means detects the written data and address information, and the memory access information transmission means outputs the data and address information to the local area network. To send via. In the other station, the memory access information receiving means receives the data and address information via the local area network, and writes the information in the corresponding address of the two-port memory of the own station corresponding to the memory writing control means. Since all stations perform the same processing, after all, if the CPU of one station writes some data to its own 2-port memory, the same data will be written to the same address of all 2-port memories of other stations. Therefore, the two-port memory of each station keeps the same contents virtually all the time. As a result, as shown in the conceptual diagram of FIG. 2, the CPU of each station functions as a shared memory equivalently as a whole local area network system, although the memory in the station is a local memory. .

In the local area network system according to a second aspect of the present invention, in the above local area network system, the abnormal state detecting means provided in one or a plurality of stations transmits to another station via the local area network. The other station that is in an abnormal state is detected by receiving the abnormal report data that is generated or from the content of the writing area of the other station in the 2-port memory. The processing proxy means performs the processing to be performed by the other station in the abnormal state. Therefore, even if one or more of the plurality of stations connected to the local area network are in an abnormal state and the intended processing function is disabled, the abnormal state detection means and the processing proxy means are The other normal stations provided will substitute the processing that the station in the abnormal state should have originally performed, greatly improving the reliability of the entire local area network system.

[0013]

【Example】

 A configuration of a local area network system which is an embodiment of the present invention will be described below with reference to FIGS.

The overall configuration of the local area network system is as shown in FIG.

FIG. 3 is a block diagram showing the configuration of each station. In FIG. 3, 11 is a station and 12 is a peripheral device connected to this station. In the station 11, the CPU 13 executes a program written in the local memory 15 in advance to perform various processes described later. The watchdog timer 14 detects an abnormal state of the CPU 13 and interrupts the CPU 13. The interface 16 controls input / output of data and signals between the peripheral device 12 and the station 11. The CPU 13 controls the peripheral device 12 via this interface 16. The 2-port memory 17 is composed of, for example, a DRAM and a DRAM controller having an arbiter function, and is accessed by the CPU 13 or the communication control unit 18. The communication control unit 18 detects the writing of data to the 2-port memory 17 of the CPU 13, a memory access information sending unit for sending the memory access information to the transmission line, and another station via the transmission line. It is provided with a memory access information receiving means for receiving the data and the address information sent by the memory and a memory writing control means for writing the received data to the address of the corresponding 2-port memory.

Next, FIG. 4 is a block diagram showing a configuration of the communication control unit 18 shown in FIG. In FIG. 4, the CPU 20 executes a program previously written in the memory 22 to perform a communication control process described later. The bus interface 21 is an interface circuit between the local bus of the CPU 20 (hereinafter, referred to as “CPU of communication control unit”) and the system bus of the CPU 13 (hereinafter, referred to as “main body CPU”) illustrated in FIG. . The CPU 20 of the communication control unit detects, via the bus interface 21, the write address of data to the 2-port memory 17 of the main body CPU 13 shown in FIG. The transceiver 24 performs photoelectric conversion when the transmission line is an optical fiber serial transmission line. The controller 23 controls transmission / reception of data via the transceiver 24. The CPU 20 controls communication via the controller 23.

Next, FIG. 6 shows a processing procedure of the communication control unit as a flowchart. First, the CPU 20 of the communication control unit determines whether or not data is written in the 2-port memory 17 of the main body CPU 13 (n1). If any data is written, the written data and address information are detected and stored in a predetermined area of the memory 22 (n2). Next, the memory access information for sending out the memory access information consisting of this data and the address information to the transmission path is created and output to the controller 23 (n3 → n4). As a result, the controller 23 sends the memory access information to the transmission path. If there is a signal from another station, this is received as memory access information (n5 → n6). Then, the information of the data and the address is extracted, and the data is written to the corresponding address of the 2-port memory 17 (n7 → n8).

Prior to the description of the processing procedure of the main body CPU, the structure of the station status table in the 2-port memory is shown in FIG. In FIG. 5, “normal / abnormal” indicates a flag indicating whether the station is in a normal state or abnormal state, and “in-progress / in-progress” indicates whether or not the station is being delegated by another station. It is a flag. In this way, "normal / abnormal" and "acting / not acting" flags are provided as a table from the first station to the n-th station. In the example shown in the figure, the first station, the third station, the fifth station, the nth station, etc. are normal, and the second station is in an abnormal state. Is being acted on by another station, and the fourth station is in an abnormal state, but the other station has not yet acted on its behalf. This station status table is configured in a predetermined area in the 2-port memory, and each station can access the same contents. Since the station number of its own station and the station number of the other station which it is currently acting on its own are information unique to each station, each station stores it in the local memory 15 shown in FIG.

As shown in FIG. 7, the main body CPU first writes a normal state in its own area of the local state table shown in FIG. 5 in its main routine (n10). For example, if the own station is the first station, the "normal / abnormal" flag of the first station shown in FIG. 5 is set to 0 (reset state). Then, the watchdog timer 14 is reset and the interrupt from the watchdog timer 14 is accepted (n11 → n12). After performing the initial processing in this way, a predetermined processing is executed (n13). At that time, the watchdog timer 14 is periodically reset in a cycle in which the watchdog timer does not time up. Therefore, if the process shown in step n13 is performed normally, the watchdog timer 14 does not enter the time-up state. If the watchdog timer times out without normal processing being performed due to an abnormal condition for some reason, the watchdog timer 14 interrupts the main body CPU 13. FIG. 8 shows the processing of the main body CPU by the interruption, and the interruption processing writes an abnormal state in the own station area of the station state table (n14). That is, if the own station is the first station, the "normal / abnormal" flag of the first station shown in FIG. 5 is set to 1 (set state).

FIG. 9 shows a procedure of proxy processing control of the main body CPU. First, the station state table is read to determine whether or not there is a station in an abnormal state and not acting (n20 → n21).

For example, in the example shown in FIG. 5, the fourth station corresponds to this. If a station that is in an abnormal state and is not acting is detected, it is determined whether or not the station can act for that station (n22). This is determined by the load on the CPU of the main unit of the station itself and the processing amount per hour of the station to be substituted. If processing is to be performed on behalf of the station, the station state table is changed (n23). In the example shown in FIG. 5, when the processing of the fourth station is acted on behalf, the flag of “acting / not acting” of the fourth station is set to 1 (set state). Then, the parallel processing of the proxy processing is started (n24). Further, the station state table is read to determine whether or not the station acting on its behalf has returned to the normal state (n25). For example, in FIG. 5, when the own station is acting as a substitute for the second station, which is another station, if the “normal / abnormal” flag of the second station becomes 0, the “acting / not acting” of the second station is displayed. The flag "on behalf of" is set to 0 (reset state), and the agency process is finished (n26 → n27).

In the processing shown in FIG. 8, the own station monitors the abnormal state of its own station, but the abnormal state is so large that the own station cannot monitor the abnormal state of its own station. If the station status table cannot be written, another station will detect the abnormal status. FIG. 10 shows a procedure of abnormality monitoring of another station performed by the own station. First, when a certain period of time, which is a predetermined cycle that serves as a reference, has elapsed, the work area on the 2-port memory of each station is read from station 1 to station n, and the contents are the same as the previous contents. It is determined whether there is any (n30 → n31). If it is the same as the previous time, the counter Ci that counts the same number of times is incremented by 1 and it is determined whether or not the result is a predetermined maximum value or more (n32 → n33). If it exceeds the maximum value, it is considered that the i-th station is not performing the predetermined processing, and the "normal / abnormal" flag of the corresponding station is set (n34). The above steps n30 to n34 are performed for the first station to the nth station. In this way, the abnormal state of each station is monitored by detecting whether the contents of the work area of each station have changed for a certain period of time.

[0023]

[Effect of device]

 According to this invention, each station can use the two-port memory provided in the station as a shared memory with other stations connected to the network, and moreover, a plurality of stations connected to the network can be used. Even if one or more of the stations are in an abnormal state, other normal stations can substitute the processing originally performed by the abnormal station, greatly improving overall reliability. A local area network system can be provided.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a local area network system of the present invention.

FIG. 2 is a diagram showing the concept of an N-port memory constructed by the local area network system of the present invention.

FIG. 3 is a block diagram showing a configuration of each station in a local area network system which is an embodiment of the present invention.

4 is a block diagram showing a configuration of a communication control unit 18 shown in FIG.

FIG. 5 is a diagram showing a status table of each station configured in a 2-port memory.

FIG. 6 is a flowchart showing a processing procedure of a communication control unit.

FIG. 7 is a flowchart showing a main routine of a processing procedure of a main body CPU of each station.

FIG. 8 is a flowchart showing a processing procedure of abnormality monitoring of the main body CPU of its own station.

FIG. 9 is a flowchart showing a procedure of proxy processing control of a main body CPU.

FIG. 8 is a flowchart showing a processing procedure of abnormality monitoring of another station of the main body CPU.

[Explanation of symbols]

 10-Transmission line 11-Station 12-Peripheral device 18-Communication control unit

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[Procedure amendment]

[Submission date] July 14, 1993

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] Brief description of the drawing

[Correction method] Change

[Correction content]

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a local area network system of the present invention.

FIG. 2 is a diagram showing the concept of an N-port memory constructed by the local area network system of the present invention.

FIG. 3 is a block diagram showing a configuration of each station in a local area network system which is an embodiment of the present invention.

4 is a block diagram showing a configuration of a communication control unit 18 shown in FIG.

FIG. 5 is a diagram showing a status table of each station configured in a 2-port memory.

FIG. 6 is a flowchart showing a processing procedure of a communication control unit.

FIG. 7 is a flowchart showing a main routine of a processing procedure of a main body CPU of each station.

FIG. 8 is a flowchart showing a processing procedure of abnormality monitoring of the main body CPU of its own station.

FIG. 9 is a flowchart showing a procedure of proxy processing control of a main body CPU.

FIG. 10 is a flowchart showing a processing procedure of abnormality monitoring of another station of the main body CPU.

[Description of Reference Signs] 10-Transmission line 11-Station 12-Peripheral device 18-Communication control unit

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Claims (2)

[Scope of utility model registration request] 1. A local area network system in which a plurality of stations are connected via a local area network, and a 2-port memory and a C for reading / writing data from / to the 2-port memory.
PU, memory access information detecting means for detecting information on the data written by the CPU in the two-port memory and its address, and memory access information for transmitting the detected information on the data and address via a local area network. Sending means, memory access information receiving means for receiving data and address information sent by another station via the local area network, and an address of the 2-port memory equal to the received address information. A local area network system comprising: a communication control unit having a memory write control unit for writing data equivalent to the information of the data; 2. Detecting another station in an abnormal state by receiving the abnormality notification data sent from another station via the local area network or from the contents of the write area of the other station in the 2-port memory. 2. The local area network system according to claim 1, wherein one or a plurality of stations are provided with an abnormal state detecting means for performing the abnormal state detection processing and a processing substitution means for performing the processing of the other station in the abnormal state.