JP4978877B2 - Light emitting device manufacturing method and light emitting device - Google Patents

Description

  The present invention relates to a method for manufacturing a light-emitting element and a light-emitting element, and more particularly to a method for manufacturing a light-emitting element and a light-emitting element that improve light extraction efficiency to the outside and are inexpensive and excellent in mass productivity.

  As a semiconductor light emitting element using a semiconductor crystal, a light emitting diode (LED), a laser diode (LD), an electro-luminescence (EL) element, and the like are known. Among these semiconductor light-emitting elements, light-emitting diodes, particularly high-intensity LEDs, are used for information display boards for indoor and station buildings, information boards for road displays, automobile stop lamps, traffic lights, and the like. In addition, since it has a high luminance while having a low current, it is used as an energy-saving display light source or illumination light source. The following LED is used in such a field.

  First, there are GaAsP red LEDs having a peak wavelength of about 630 nm and GaAlAs red LEDs having a peak wavelength of about 660 nm as red light emitting elements, and GaAsP orange LEDs having a peak wavelength of about 610 nm as orange light emitting elements. Next, there is a GaAsAlP yellow LED having a peak wavelength of about 590 nm as a yellow light emitting element, and a GaP green LED having a peak wavelength of about 565 nm as a green light emitting element. Also, blue light emitting elements include SiC blue LEDs having a peak wavelength of about 480 nm and GaN blue LEDs having a peak wavelength of about 450 nm. Purple light emitting elements include ZnO purple LEDs and InAlGaN purple LEDs having a peak wavelength of about 390 nm. . In recent years, in particular, these blue, red, and yellow LEDs are used in combination for display display.

  By the way, when trying to increase the brightness of these semiconductor light emitting devices, it is extremely important how to efficiently extract the light emitted from the active layer of the semiconductor light emitting device to the outside of the device. For example, when light emitted from the active layer is extracted to the main surface side of the semiconductor light emitting device, a multilayer film is provided between the substrate and the light emitting layer as a means for efficiently extracting light from the active layer to one main surface of the semiconductor light emitting device. It is known to form a reflective layer and increase the luminance of a light-emitting element by using the refractive index of a laminated semiconductor multilayer film (see, for example, Patent Document 1). However, this configuration has a drawback that the spectral band of the wavelength with respect to reflection is narrowed when an attempt is made to increase the light reflectance. Further, since only light incident at a limited angle is reflected, there is a limit to efficient light extraction.

  On the other hand, in order to increase the brightness of a semiconductor light emitting device, it is known to increase the brightness by inserting an Au metal layer between the light emitting layer portion and the silicon substrate as a reflective layer (for example, non-patent) Reference 1). With this structure, a high reflectance independent of the incident angle can be obtained, and the light extraction efficiency can be greatly increased. However, in this configuration, in order to obtain sufficient ohmic contact, it is necessary to sufficiently perform an alloying heat treatment. However, if the heat treatment is performed, the morphology of the bonding interface is lowered and the reflectance is lowered.

  In order to solve the above problems, the AlGaInP double heterostructure light-emitting layer is provided, and the surface is mirror-finished through a contact alloy layer partially provided so as to be in ohmic contact with the light-emitting layer. It has been disclosed that a high conductivity reflective film is formed by joining a metal plate (see, for example, Patent Document 2).

JP-A-7-66455 JP 2003-243699 A Applied Physics Letters, 75, (1999) p3054

  However, the light-emitting element of Patent Document 2 is obtained by directly bonding a metal substrate and a high-conductivity reflective film to obtain a high reflectivity by preventing a decrease in the morphology of the bonding interface while maintaining sufficient ohmic contact. In particular, since the surface of the metal substrate needs to be mirror-finished, it is expensive.

  Therefore, the present invention has been made in view of the above problems, and an object of the present invention is to radiate from a light emitting layer by attaching a highly reflective metal layer between a light emitting layer portion and an element substrate. By introducing a layer that reflects the incident light without depending on the incident angle of light and with high efficiency, it is possible to make the light extracted from the main surface highly efficient and excellent in mass productivity. Another object of the present invention is to provide a low-cost and high-luminance light-emitting element manufacturing method and light-emitting element.

In order to achieve the above object, a method for manufacturing a light-emitting element according to the present invention is such that an element substrate is bonded to a compound semiconductor layer having a light-emitting layer portion via a metal layer, and the bonding surface of the metal layer to the compound semiconductor layer is A method of manufacturing a light emitting device for forming a reflective surface, wherein at least the surface of the device substrate is in a roughened state, and a bonding alloyed layer and a diffusion preventing layer are formed as metal layers on the roughened surface. In addition, the bonded metal layer is laminated in this order and bonded to the compound semiconductor layer so that the total thickness of the bonding alloying layer and the diffusion preventing layer is not less than 2 times and not more than 50 times the roughness of the surface of the element substrate by RMS display. is formed, the thickness of the alloyed layer is at 50nm or more 2000nm or less, the thickness of the diffusion preventing layer, characterized in der Rukoto than 5μm or less 50nm.

  According to the above method, when the compound semiconductor layer and the element substrate are bonded to each other, the diffusion of the diffusion preventing layer between the two allows the component substrate component to diffuse from the element substrate to the reflective metal layer. Blocking by the diffusion preventing layer, and consequently, alteration of the main metal layer due to diffusion of the element substrate component can be effectively suppressed. As a result, defects such as a decrease in reflectivity of the reflecting surface formed by the main metal layer and a decrease in adhesion strength between the main metal layer and the compound semiconductor layer are effectively suppressed, and the product yield of the light-emitting element due to these defects is reduced. Decline is unlikely to occur.

  In the present invention, even if the surface of the element substrate on which the metal layer is formed is somewhat rough, not only the bonding alloying layer but also the diffusion preventing layer is interposed between the bonded metal layer and the element substrate. The prevention layer (and the bonding alloying layer) serves to fill the unevenness on the substrate surface, and the diffusion prevention layer adopted for the purpose of deteriorating the reflectance of the reflecting surface also brings another effect that the unevenness on the element substrate surface is filled. . As a result, even if an element substrate with a cheaper rough surface is used, the bonding layer is formed by sequentially forming a bonding alloyed layer, a diffusion prevention layer, and a bonded metal layer on the surface as a metal layer. Since the surface of the metal layer, which is a surface, can be sufficiently flattened, bonding can be performed easily and with high strength even if a roughened element substrate is used instead of a mirror-polished element substrate. Since the reflecting surface is flat, light from the light emitting layer can be reflected with high efficiency. In other words, by using an element substrate whose surface is roughened, the step of mirror polishing the surface of the element substrate can be omitted, and a low-cost, high-luminance light-emitting element excellent in mass productivity is manufactured. Is possible.

  In this case, the rough surface processing is preferably performed by lapping or etching (especially chemical etching). A thin substrate cut out from a cylindrical ingot is used as the element substrate. However, the cut thin plate substrate has deep cut-out scratches and distortions and large irregularities, so that it cannot be used as it is. Wrapping is required to eliminate or reduce the above-mentioned cut-out scratches, distortions, and irregularities. In addition, it can be achieved by etching the lapped surface with chemicals to further improve the flatness of the surface, so that no mirror polishing process (for example, mechanochemical polishing) is required. Thus, a low-cost element substrate can be obtained. The “element substrate whose surface is in a rough surface state” means that the final step of mirror polishing is omitted from the series of steps to finish mirror polishing, and is cut off at the stage of rough surface processing used as its pre-processing. Can be seen as a thing.

  The bonding alloying layer is preferably made of an Au-based metal containing Au as a main component, an Ag-based metal containing Ag as a main component, or an Al-based metal containing Al as a main component. By using such Au-based metal, Ag-based metal, or Al-based metal, high ohmic contact with the element substrate is possible.

  Further, the diffusion prevention layer is preferably a metal layer made of Ti, Ni, Cr, or W. By forming such a diffusion prevention layer made of Ti, Ni, Cr, or W, the constituent elements of the element substrate do not appear on the bonding surface by diffusion and do not hinder the bonding.

  The reflective metal layer is preferably made of an Au-based metal containing Au as a main component, an Ag-based metal containing Ag as a main component, or an Al-based metal containing Al as a main component. By using such Au-based metal, Ag-based metal, or Al-based metal, a reflective metal layer having a high reflectance can be obtained.

The present invention also provides a light emitting device manufactured by the above method. Furthermore, the present invention provides a light emitting device in which an element substrate is bonded to a compound semiconductor layer having a light emitting layer portion via a metal layer, and at least the surface gloss of the element substrate is 20 to 80%. A bonding alloying layer, a diffusion preventing layer, and a bonding metal layer are laminated in this order as a metal layer and bonded to the compound semiconductor layer, and the total thickness of the bonding alloying layer and the diffusion preventing layer is the RMS of the surface of the element substrate. formed below 50 times 2 times roughness by the display, the thickness of the alloyed layer is at 50nm or more 2000nm or less, light emission thickness of the diffusion preventing layer, characterized in der Rukoto than 5μm or less 50nm An element is also provided.

  In this way, by using a device substrate having a glossiness of 20 to 80%, the step of mirror polishing the surface of the device substrate can be omitted, and mass production is excellent at low cost and high brightness. A light emitting element can be obtained. Moreover, the surface of the metal layer which is the bonding surface is flat by forming the bonding alloying layer, the diffusion preventing layer, and the bonding metal layer in this order on the surface where the glossiness of the element substrate surface is 20 to 80%. Thus, the coupling strength is high and light from the light emitting layer can be reflected with high efficiency. If the glossiness is less than 20%, the surface is too rough, and it is very difficult to flatten the reflection surface and the bonding surface. A glossiness exceeding 80% is difficult to achieve with normal roughening. If the glossiness is further increased, the merit in reducing the polishing cost is impaired.

  If the total thickness of the bonding alloyed layer and the diffusion prevention layer is smaller than the height of the local protrusions on the roughened element substrate surface as the base, this breaks through the diffusion prevention layer and bonds the bonded metal. Since the diffusion prevention effect may be impaired by reaching the layer (and hence the reflective metal layer), the total thickness is desirably set larger than the maximum height (Rmax) of the irregularities on the surface of the element substrate. In addition, from the viewpoint of sufficiently filling the unevenness and thus sufficiently flattening the reflection surface or the bonding surface, the above total thickness is the roughness expressed by RMS (Root Mean Square) display. It is desirable to form it twice or more (50 times or less considering economy). The surface roughness of the element substrate is preferably 0.2 μm or more and 25 μm or less at the maximum height (Rmax), and is preferably 0.02 μm or more and 6 μm or less in terms of the RMS display roughness.

  Next, the element substrate is preferably silicon. Since the element substrate is made of silicon in this way, it is manufactured as a semiconductor substrate for general use, and purity, resistivity, etc. are controlled with high accuracy.

The light emitting layer portion is preferably made of an AlGaAsP compound semiconductor, an InAlGaP compound semiconductor, a GaN compound semiconductor, or a ZnO compound semiconductor. As described above, by applying the AlGaAsP compound semiconductor, InAlGaP compound semiconductor, GaN compound semiconductor, or ZnO compound semiconductor as the light emitting layer portion, various colors such as red, orange, yellow, green, blue, purple, etc. A high-luminance light emitting element can be obtained.

  According to the present invention, a highly reflective metal layer is bonded between the light emitting layer portion and the element substrate, and the light emitted from the light emitting layer is reflected with high efficiency without depending on the incident angle of light. By providing a layer to be manufactured, it is possible to make light extracted from the main surface highly efficient, and to provide a low-cost high-luminance light-emitting element manufacturing method and a light-emitting element that are excellent in mass productivity. It becomes possible.

  Hereinafter, embodiments of the present invention will be described in detail, but the present invention is not limited thereto. FIG. 1 is an example of a conceptual diagram of a light emitting element to which the present invention is applied. The light emitting element 100 emits light via a Au-based metal layer 10 on a first main surface of a Si substrate 7 (in this embodiment, n-type but may be p-type) made of Si single crystal as an element substrate. It has a structure in which the compound semiconductor layer 50 having the layer portion 24 is bonded. The compound semiconductor layer 50 is formed by laminating the bonding side protective layer 26, the diffusion preventing layer 25, the light emitting layer 24, the current diffusion layer 20, and the light extraction surface side protective layer 27 in this order from the second main surface side. It is. In the present embodiment, the main surfaces of the layers and the substrate, as shown in FIG. 1, are defined as a state where the light extraction surface PF of the light emitting element 100 is on the upper side, and a surface appearing on the upper side of the drawing in the normal state is a first main surface. The surface, the surface appearing on the lower side, is uniformly described as the second main surface. Therefore, for convenience of description of the process, when the drawing is performed in a transposed state that is upside down with respect to the normal state, the vertical relationship between the first main surface and the second main surface in the drawing is also reversed.

The light emitting layer portion 24 is an active layer 5 made of a non-doped (Al _x Ga _1-x ) _y In _1-y P (where 0 ≦ x ≦ 0.55, 0.45 ≦ y ≦ 0.55) mixed crystal. a first-conductivity-type cladding layer, p-type in this embodiment _{(Al z Ga 1-z)} p -type cladding layer 6 made of _{y in 1-y} P (except x <z ≦ 1) (p-type dopant, for example Zn or Mg: the same) for the other p-type layer, the second-conductivity-type cladding layer different from the first conductivity type cladding layer, n-type in this embodiment _{(Al z Ga 1-z)} y in 1-y An active layer having a structure sandwiched between n-type clad layers 4 (wherein n <d ≦ 1 ≦ n) made of P (where n-type dopant is, for example, Si, S, Se or Te: the same applies to other n-type layers) Depending on the composition of 5, the emission wavelength is changed from green to red region (emission wavelength (peak Optical wavelength) can be adjusted at least 550 nm 670 nm or less).

  The thickness of the n-type cladding layer 4 and the p-type cladding layer 6 is, for example, 0.8 μm or more and 4 μm or less (preferably 0.8 μm or more and 2 μm or less), and the thickness of the active layer 5 is 0.4 μm or more and 2 μm, for example. Or less (desirably 0.4 μm or more and 1 μm or less). The total thickness of the light emitting layer portion 24 is, for example, 2 μm to 10 μm (desirably 2 μm to 5 μm). Furthermore, the thickness of the current spreading layer 20 is, for example, 5 μm or more and 28 μm or less (desirably 8 μm or more and 15 μm or less). Therefore, the thickness of the compound semiconductor layer 50 is, for example, 7 μm or more and 30 μm or less (preferably 5 μm or more and 15 μm or less), and is difficult to handle by itself.

  The Si substrate 7 is manufactured by slicing and polishing a Si single crystal ingot, and its thickness is, for example, 50 μm or more and 500 μm or less. FIG. 5 is a schematic view showing the manufacturing process. First, a silicon single crystal ingot is manufactured by a known method such as the FZ method or the CZ method. The single crystal ingot thus obtained is cut into blocks having a certain resistivity range, further subjected to outer diameter grinding, and sliced by a slicer such as an inner peripheral cutting as shown in step (a). As shown in step (b), the sliced silicon single crystal wafer is lapped on both sides using loose abrasive grains to form a lapping wafer. Next, as shown in step c, the wrapping wafer is immersed in an acidic etchant, whereby both surfaces are chemically etched. A silicon single crystal wafer for a normal device is mirror-polished by a mechanochemical polishing step as in step (d). In the present invention, a silicon single crystal wafer in which this mirror polishing is omitted is used as the Si substrate 7. To do. The surface of the Si substrate 7 in which such mirror polishing is omitted is 20% to 80% in terms of gloss, and the surface roughness is 0.2 μm to 25 μm at the maximum height (Rmax), RMS. The roughness by display is 0.02 μm or more and 6 μm or less. Note that the Si substrate 7 may employ the lapping wafer of step (b) in FIG. 5 or the chemically etched wafer of step (c). In this embodiment, a chemically etched wafer is used, and its glossiness is 40%.

  The Si substrate 7 is bonded to the light emitting layer portion 24 with the Au-based metal layer 10 that is a bonded metal layer interposed therebetween. The Au-based metal layer 10 is formed by laminating a first Au-based metal layer 10a in contact with the compound semiconductor layer 50 and a second Au-based metal layer 10b in contact with the Si substrate 7, and is apparently simple. One Au-based metal layer. The first Au-based metal layer 10a and the second Au-based metal layer 10b (and thus the Au-based metal layer 10) are made of pure Au or an Au alloy having an Au content of 95% by mass or more.

  In the present embodiment, the Au-based metal layer 10 also serves as a reflective layer (that is, it also constitutes a reflective metal layer). The light from the light emitting layer portion 24 is extracted in a form in which the light reflected directly from the Au-based metal layer 10 is superimposed on the light emitted directly to the light extraction surface side. The thickness of the Au-based metal layer 10 is desirably 80 nm or more in order to ensure a sufficient reflection effect. Moreover, although there is no restriction | limiting in particular in the upper limit of thickness, since a reflective effect is saturated, it determines suitably by balance with cost (for example, 10 micrometers or less).

  On the second main surface side of the compound semiconductor layer 50, the compound semiconductor layer 50 has translucency with respect to the luminous flux from the light emitting layer portion 24, and component diffusion from the bonded side bonded alloyed layer 31 to the light emitting layer portion 24. Is formed as an Al-containing compound semiconductor, and the second main surface of the diffusion prevention layer 25 is covered with a bonding-side protective layer 26 made of a GaAs layer.

The diffusion prevention layer 25 is lattice-matched to n-type AlGaAs, specifically, the n-type cladding layer 4 (with a lattice constant difference of 1% or less) and has a wider band gap than the active layer 5. It is made of AlGaAs in which the AlAs mixed crystal ratio a of Al _a Ga _1-a As is adjusted to 0.4 or more and 1 or less. The thickness of the diffusion preventing layer 25 is not less than 0.5 μm and not more than 3 μm. Further, the GaAs layer constituting the bonded side protective layer 26 has a thickness of 1 nm or more and 20 nm or less, and a higher dopant concentration than the diffusion prevention layer 25 (n-type dopant concentration: 5 × 10 ¹⁷ / cm ³ or more and less than 1 × 10 ¹⁹ / cm ³ ).

  A bonded-side bonded alloyed layer 31 is disposed between the compound semiconductor layer 50 and the Au-based metal layer 10 in order to reduce the contact resistance between the Au-based metal layer 10 and the compound semiconductor layer 60. In this embodiment, the bonding-side bonded alloyed layer is an AuGeNi bonded alloyed layer 31, and an AuGeNi bonded metal layer (for example, Ge: 15 mass%, Ni: 10 mass%) is alloyed with the compound semiconductor layer 50. It is. The AuGeNi bonding alloyed layer 31 is formed in a dispersed manner on the first main surface of the Au-based metal layer 10, and the formation area ratio (the ratio of the total area of the bonding alloyed layer 31 to the total area of the first main surface of the metal layer 10). Represents 1% or more and 50% or less.

  An AuSb bonding alloyed layer 32 (for example, Sb: 5% by mass) is interposed between the Si substrate 7 and the second Au-based metal layer 10b as a substrate-side bonding alloyed layer (thickness is 50 nm). Or more and 2,000 nm or less). In the present embodiment, the entire surface of the AuSb bonding metal layer 32 is a diffusion preventing layer (specifically, the Si component from the Si substrate 7 is prevented from diffusing into the Au-based metal layer 10 during the bonding heat treatment described later. Is a Ti layer). The thickness of the diffusion preventing layer 10c is not less than 50 nm and not more than 5 μm (200 nm in this embodiment). The diffusion prevention layer may be composed of a Ni layer, a Cr layer or a W layer instead of the Ti layer. Further, the Au-based metal layer 10 (second Au-based metal layer 10b) is disposed so as to be in contact with the entire surface of the diffusion preventing layer 10c.

  The bonding alloying layer 32 and the diffusion preventing layer 10c are the heights of local protrusions on the surface of the roughened Si substrate 7 serving as a base, that is, the maximum height of the irregularities on the surface of the Si substrate 7 (Rmax). ) Is set larger than. Further, the total thickness is formed to be twice or more (50 times or less in consideration of economy) the roughness of the surface of the Si substrate 7 by RMS (Root Mean Square) display.

  A current diffusion layer 20 made of AlGaAs is formed on the first main surface of the light emitting layer portion 24, and the first main surface is covered with a light extraction surface side protective layer 27 made of a GaAs layer. The thickness of the light extraction surface side protective layer 27 is 1 nm or more and 20 nm or less. A light extraction surface side electrode (for example, an Au electrode) 9 for applying a light emission driving voltage to the light emitting layer portion 24 is provided at the center of the first main surface of the light extraction surface side protective layer 27. It is formed so as to cover a part. On the light extraction surface side protective layer 27, a light extraction surface side bonded alloyed layer 9a formed using an AuBe alloy or the like is formed, and the light extraction surface side electrode 9 is disposed thereon. Further, a back electrode (for example, an Au electrode) 15 is formed on the back surface of the Si substrate 7 so as to cover the entire surface thereof. When the back electrode 15 is an Au electrode, an AuSb bonding alloyed layer 16 is interposed between the back electrode 15 and the Si substrate 7 as a substrate side bonding alloyed layer.

Hereinafter, a specific example of the method for manufacturing the light emitting device 100 will be described.
First, as shown in step 1 of FIG. 2, an n-type GaAs buffer layer 2 is 0.5 μm, for example, and a release layer 3 made of AlAs is 0.5 μm, for example, on the main surface of a GaAs single crystal substrate 1 that is a growth substrate. Then, epitaxial growth is performed in this order. Thereafter, the light extraction surface side protective layer 26 made of a GaAs layer with a thickness of, for example, 5 nm, the diffusion prevention layer 25 made of AlGaAs with a thickness of, for example, 2 μm, and the light-emitting layer portion 24 as an n-type AlGaInP cladding layer 4 (thickness). : AlGaInP active layer (non-doped) 5 (thickness: 0.6 μm, for example), and p-type AlGaInP cladding layer 6 (thickness: 1 μm, for example) are epitaxially grown in this order. The total thickness of the light emitting layer portion 24 is 2.6 μm. Thereafter, the current diffusion layer 20 made of p-type AlGaAs is epitaxially grown, for example, by 5 μm, and the light extraction surface side protective layer 27 (thickness, eg, 5 nm) made of GaAs is epitaxially grown. Epitaxial growth of each of these layers can be performed by a known MOVPE method.

  Thus, the compound semiconductor layer 50 including the light extraction surface side protective layer 26, the diffusion prevention layer 25, the light emitting layer portion 24, the current diffusion layer 20, and the light extraction surface side protection layer 27 is formed on the GaAs single crystal substrate 1. Is done. The thickness of the compound semiconductor layer 50 is about 9.6 μm, and when the GaAs single crystal substrate 1 is removed, it is practically impossible to handle it alone without being damaged. Note that the AuBe bonding metal layer 9a 'and the light extraction surface side electrode 9 covering the AuBe bonding metal layer 9a' are formed on the first main surface of the compound semiconductor layer 50 at this stage by patterning. The current diffusion layer 20 made of an Al-containing compound semiconductor may be exposed to the atmosphere for handling during vapor deposition formation of the AuBe bonded metal layer 9a ′ and the light extraction surface side electrode 9, but the light extraction surface side protection may occur. Since it is covered with the layer 27, the oxidation of the Al component of the current diffusion layer 20 can be prevented.

  Next, as shown in step 2, the polymer material bonding layer 111 is applied and formed on the first main surface of the compound semiconductor layer 50 so as to cover the light extraction surface side electrode 9, and as shown in step 3, In a state where the polymer material bonding layer 111 is heated and softened, a separately prepared temporary support substrate 110 is superposed and adhered, and then cooled to cure the polymer material bonding layer 111, whereby the compound semiconductor layer 50 and A temporary support bonded body 120 is prepared by bonding the temporary support substrate 110 to the polymer material bonding layer 111 (step 3). At this time, the GaAs single crystal substrate 1 as a growth substrate is attached to the second main surface side of the compound semiconductor layer 50. The material of the temporary support substrate 110 is, for example, a Si substrate, a ceramic plate (for example, an alumina plate), a metal plate, or the like. Alternatively, as the polymer material bonding layer 111, a hot-melt adhesive or wax can be used.

  The portion including the first main surface of the compound semiconductor layer 50 is an oxide conductor layer (for example, an ITO (Indium-Tin Oxide) layer) having excellent heat resistance, so that the polymer material bonding layer 111 is replaced. It is also possible to employ a bonding layer made of a metal brazing material. On the other hand, the current diffusion layer 20 is made thicker to 50 μm or more (preferably 100 μm or more) that can be handled independently by bonding a single crystal substrate made of GaP or the like or using an epitaxial growth layer by a hydride vapor phase growth method. If possible, the temporary support substrate 110 can be omitted.

  Next, as shown in step 4 of FIG. 3, the GaAs single crystal substrate 1 as a growth substrate attached to the temporary support bonded body 120 is removed. For this removal, for example, the temporary support bonded body 120 (see step 3) is immersed in an etching solution (for example, a 10% aqueous hydrofluoric acid solution) together with the GaAs single crystal substrate 1 and formed between the buffer layer 2 and the light emitting layer portion 24. The GaAs single crystal substrate 1 can be peeled from the temporary support bonded body 120 by selectively etching the AlAs release layer 3 thus formed. It should be noted that an etch stop layer made of AlInP is formed in place of the AlAs release layer 3, and a GaAs single crystal is used by using a first etching solution (for example, ammonia / hydrogen peroxide mixed solution) having selective etching properties with respect to GaAs. Etch and remove the substrate 1 together with the GaAs buffer layer 2 and then etch stop using a second etchant that has selective etching properties with respect to AlInP (for example, hydrochloric acid: hydrofluoric acid may be added to remove the Al oxide layer) A step of etching away the layer can also be employed. The light extraction surface side protective layer 26 plays a role of preventing a problem that the Al component of the diffusion prevention layer 25 is oxidized during the etching.

Next, as shown in Step 5, in the state of the temporary support bonded body 120, the second main surface of the compound semiconductor layer 50 exposed by the removal of the GaAs single crystal substrate 1 (covered by the light extraction surface side protective layer 26). In addition, an AuGeNi bonding metal layer is dispersedly formed, and a bonding-side alloying heat treatment is performed so that the AuGeNi bonding metal layer becomes the AuGeNi bonding alloyed layer 31. At this time, the AuBe bonding metal layer 9a ′ can be alloyed with the light extraction surface side electrode 9 at the same time (that is, also used for light extraction side alloying heat treatment). Here, since the light extraction surface side protective layer 26 on which the AuGeNi bonding metal layer is formed is formed of a GaAs layer with an increased dopant concentration, the effect of reducing the contact resistance is further enhanced. The alloying heat treatment is performed in an inert gas atmosphere at a temperature of 300 ° C. or higher and 450 ° C. or lower. Specifically, the alloying heat treatment can be performed in an inert gas atmosphere such as N _{2 at the} same level as atmospheric pressure. .

  On the other hand, an AuSb bonding alloyed layer 32 is prepared by separately preparing an Si substrate 7, forming AuSb bonding metal layers on both main surfaces thereof, and performing alloying heat treatment in a temperature range of 250 ° C. or higher and 360 ° C. or lower. , 16. Among these, on the AuSb bonding alloying layer 32, a diffusion preventing layer 10c for preventing the components of the Si substrate 7 from diffusing into the second Au-based metal layer 10b in the subsequent element substrate bonding step is formed. On the other hand, the back electrode 15 is formed on the AuSb bonding alloying layer 16. Then, as shown in Step 6 of FIG. 3, the first Au-based metal layer 10 a is formed on the second main surface of the compound semiconductor layer 50 in the state of the temporary support bonded body 120, while The second Au-based metal layer 10b is formed on one main surface side. Each Au-based metal layer can be formed in a vacuum atmosphere (by sputtering or vacuum vapor deposition). Thereafter, as shown in Step 7 of FIG. 4, the first Au-based metal layer 10a formed on the compound semiconductor layer 50 side is overlaid on the second Au-based metal layer 10b formed on the Si substrate 7 side and pressed. In this embodiment, bonding heat treatment is performed at 240 ° C. for 30 minutes and a pressure of 200 kPa for 180 ° C. or more and 360 ° C. or less (lower temperature than the above alloying heat treatment). As a result, the first Au-based metal layer 10 a and the second Au-based metal layer 10 b are bonded together with sufficient strength to form the Au-based metal layer 10. The compound semiconductor layer 50 and the Si substrate 7 are bonded together via the Au-based metal layer 10 to form a bonded bonded body 130.

  The first main surface side of the element substrate 7 is a roughened surface as described above, but the unevenness is filled by the formation of the bonding alloying layer 32 and the diffusion prevention layer 10c, so it is used for bonding. The surface of the second Au-based metal layer 10b can be sufficiently flattened and can be bonded to the second Au-based metal layer 10b without any problem. Moreover, the reflective surface formed by the second Au-based metal layer 10b can also be flattened to improve the reflectance. Furthermore, the bonding area between the bonding alloyed layer 32 and the Si substrate 7 is increased by roughening, and the bonding strength can be improved by the anchor effect.

  When the bonding heat treatment is completed, the polymer material bonding layer 111 is heated and softened, and the temporary support substrate 110 is separated and removed. The remaining polymer material bonding layer is dissolved and removed using an organic solvent such as toluene or methyl ethyl ketone (MEK). The bonded bonded body 130 is a bonded wafer in which a plurality of element chips are collectively formed in a matrix arrangement, which is diced by a normal method to form element chips, which are fixed to a support. After performing lead wire bonding or the like, the final light emitting element is obtained by resin sealing.

In order to confirm the bonding strength of the bonded wafer manufactured in accordance with the above-described steps (but not the alloying heat treatment of the bonded alloying layers 31 and 32), a heat treatment for increasing the bonding strength is performed at 300 ° C. 10 minutes at 350 ° C. and 2 / 10th of the conditions, dicing into chips of 1 mm × 1 mm square to 330 μm × 330 μm square, and confirming the bonding strength, bonding strength is 100 kg / cm ² or more It was confirmed that. As a result, it was found that good bond strength was obtained in all cases.

  The present invention is not limited to the above embodiment. The above embodiment is merely an example, and the present invention has the same configuration as that of the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical idea of the invention. For example, as shown in the light emitting element 400 of FIG. 6, the reflective surface is formed of a reflective metal layer 10r containing Al or Ag as a main component separately from the first Au-based metal layer 10a that forms the bonded metal layer. be able to. The main component metal of the bonding alloyed layer 131 is made of the same main component metal as that of the reflective metal layer 10r.

The schematic diagram which shows one Embodiment of the light emitting element of this invention by laminated structure. Process explanatory drawing which shows an example of the manufacturing method of the light emitting element of this invention. Process explanatory drawing following FIG. Process explanatory drawing following FIG. Explanatory drawing which shows the manufacturing process of Si substrate. The schematic diagram which shows the modification of the light emitting element of this invention by laminated structure.

Explanation of symbols

7 Si single crystal substrate (element substrate)
24 Light-Emitting Layer 50 Compound Semiconductor Layer 10 Metal Layer 10c Diffusion Prevention Layer 32 Bonding Alloying Layer 100,400 Light-Emitting Element

Claims (10)

An element substrate is bonded to a compound semiconductor layer having a light emitting layer portion via a metal layer, and a method of manufacturing a light emitting element, wherein a bonding surface of the metal layer with the compound semiconductor layer forms a reflective surface, wherein at least the element A compound semiconductor in which a surface of the substrate is roughened and a bonding alloying layer, a diffusion preventing layer, and a bonded metal layer are laminated in this order as the metal layer on the roughened surface. Laminating with layers,
The total thickness of the alloyed contact layer and the diffusion barrier layer is formed in the following 50 times 2 times the roughness by RMS display surface of the element substrate,
The bonding alloying layer has a thickness of 50 nm or more and 2000 nm or less,
Method of manufacturing a light-emitting element thickness of the diffusion preventing layer, characterized in der Rukoto than 5μm or less 50nm. The method for manufacturing a light-emitting element according to claim 1, wherein the bonded metal layer is an Au-based metal layer containing Au as a main component.   The method for manufacturing a light emitting element according to claim 1, wherein the rough surface processing is performed by lapping or etching.   The bonding alloying layer is made of an Au-based metal containing Au as a main component, an Ag-based metal containing Ag as a main component, or an Al-based metal containing Al as a main component. 4. The method for producing a light-emitting element according to any one of 3 above.   5. The method for manufacturing a light emitting element according to claim 1, wherein a metal layer made of Ti, Ni, Cr, or W is used as the diffusion preventing layer. 6.   2. The reflective metal layer forming the reflective surface is made of an Au-based metal containing Au as a main component, an Ag-based metal containing Ag as a main component, or an Al-based metal containing Al as a main component. The manufacturing method of the light emitting element of any one of thru | or 5. Emitting device characterized in that it is produced by the method according to any one of claims 1 to 6. A light-emitting element in which an element substrate is bonded to a compound semiconductor layer having a light-emitting layer part through a metal layer, and at least the surface gloss of the element substrate is 20 to 80%, and the metal layer is formed on the surface. Bonding alloying layer, diffusion prevention layer and bonded metal layer are laminated in this order and bonded to the compound semiconductor layer,
The total thickness of the alloyed contact layer and the diffusion barrier layer is formed in the following 50 times 2 times the roughness by RMS display surface of the element substrate,
The bonding alloying layer has a thickness of 50 nm or more and 2000 nm or less,
Emitting element the thickness of the diffusion preventing layer, characterized in der Rukoto than 5μm or less 50nm.   The light emitting device according to claim 7, wherein the device substrate is silicon. 10. The light emitting device according to claim 7, wherein the light emitting layer portion is made of an AlGaIn based compound semiconductor, a GaN based compound semiconductor, or a ZnO based compound semiconductor.

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