JP4659774B2 - Electrical equipment - Google Patents

Description

  The present invention relates to an electric device that changes the circuit configuration of a programmable logic such as an FPGA (Field Programmable Gate Array) or a CPLD (Complex Programmable Logic Device).

  Conventionally, in order to configure a plurality of FPGAs (circuit information is configured in the FPGA), the target FPGA of the configuration is selected from the plurality of FPGAs using input means such as a keyboard and an operation panel. An algorithm to be installed in the FPGA was selected from the ROM, and configuration was performed. As a result, a plurality of pieces of circuit information mounted on the ROM can be configured in an arbitrary FPGA, so that an algorithm composed of a plurality of algorithms can be realized by using a small number of FPGAs. The FPGA can be changed to a circuit constituting an arbitrary algorithm through the external interface in this way. (For example, see Patent Document 1)

  A technique for changing the circuit configuration of an FPGA without using an external interface is also known. When the FPGA detects data of a specific pattern from the data input to the FPGA, the circuit configuration data is written to the memory using that as a trigger, and the controller configured in the FPGA resets itself. By outputting the output signal (instruction for reconfiguration), the circuit configuration data written in the memory is written into the FPGA, so that the circuit configuration of the FPGA can be changed. (For example, see Patent Document 2)

JP 2000-278116 A (paragraphs 0013, 0015, 0018, FIG. 1) JP 2002-305438 A (paragraph 0015, FIG. 1)

  The FPGA configuration method as described above can change the circuit configuration of the FPGA by an operation from an input means from a keyboard, an operation panel, or the like, or a means for causing the FPGA controller to detect update data of a specific pattern. It is. However, in such a configuration method, it is necessary to perform some operation from a keyboard, an operation panel, etc. with human intervention, or to input update data of a specific pattern to the FPGA.

  The present invention has been made in order to solve the above-described problems, and the electrical device itself on which the FPGA is mounted automatically determines the circuit configuration necessary at the present time, and changes the circuit configuration of the FPGA. To do.

Electrical equipment according to the present invention, an external interface for inputting instruction information from the outside, and a nonvolatile memory for storing a plurality of circuit configuration data, the programmable logic to construct a circuit based on the circuit configuration data, the external interface, A control unit that controls the non-volatile memory and the programmable logic, and the control unit records and accumulates the processed content in the non-volatile memory every predetermined time, and based on the content accumulated in the non-volatile memory, the first When the process is executed, the second process to be processed next is always estimated, and after the first process is executed, the configuration of the programmable logic is changed based on the configuration data of the second process content. .

Also, an external interface for inputting command information from the outside, a non-volatile memory for storing a plurality of circuit configuration data, a programmable logic for constructing a circuit based on the circuit configuration data, and controlling the external interface, the non-volatile memory and the programmable logic A control unit that records the processed content in a non-volatile memory every predetermined time and stores the processed content at a predetermined time based on the content stored in the non-volatile memory And the configuration of the programmable logic is changed based on the configuration data of the estimated processing content before the time arrives .

Further, an external interface for inputting instruction information for external or al, a nonvolatile memory for storing a plurality of circuit configuration data, the programmable logic to construct a circuit based on the circuit configuration data, the external interface, nonvolatile memory and programmable logic And an external interface for inputting power consumption measured by a power consumption measurement circuit provided outside as command information from the outside, and the control unit being inputted from the outside by an external interface. The power consumption is statistically processed at regular time intervals, circuit configuration data is selected so that the power consumption is within a predetermined value, and the configuration of the programmable logic is changed based on the circuit configuration data .

According to the present invention, an external interface for inputting command information from the outside, a nonvolatile memory for storing a plurality of circuit configuration data, a programmable logic for constructing a circuit based on the circuit configuration data, an external interface, a nonvolatile memory, and A control unit that controls the programmable logic, and the control unit records and accumulates the processed content in a nonvolatile memory every predetermined time, and performs the first processing based on the content accumulated in the nonvolatile memory. Since the second process to be processed next is always estimated when executed and the first process is executed, the configuration of the programmable logic is changed based on the configuration data of the second process content. By executing the logic circuit built in the programmable logic according to the command from the control unit The processing, since the advance can the logic circuit, it is possible to process a continuous high-speed processing.
In addition, the control unit records and accumulates the processed content in a nonvolatile memory at predetermined time intervals, and estimates the content to be processed at a fixed time based on the content accumulated in the nonvolatile memory. Since the configuration of the programmable logic is changed based on the configuration data of the estimated processing content before it arrives, the logic circuit constructed in the programmable logic is executed by a command from the control unit at a predetermined time. Even if it is a frequency process, if it is the content processed at the fixed time, it is possible to process at high speed.
The external interface inputs the power consumption measured by the power consumption measurement circuit provided outside as command information from the outside, and the control unit converts the power consumption input from the outside by the external interface at a certain time interval. The circuit configuration data is selected so that the power consumption falls within a predetermined value, and the configuration of the programmable logic is changed based on the circuit configuration data, so that the power consumption can be suppressed.

Embodiment 1 FIG.
FIG. 1 shows a hardware configuration of an electric device 30 having a programmable logic according to the present invention. The electrical device 30 includes a microcomputer 4, a nonvolatile memory 2 such as a flash memory, a programmable logic 1 such as an FPGA, an external interface 3 for inputting data from the outside such as a switch, and an analog circuit 7 for communication. The microcomputer 4 includes a display 9 and performs processing according to the input from the external interface 3, and outputs the processing result of the microcomputer 4 to the external interface 3 and the display 9. The communication analog circuit 7 is connected to other devices via a communication line 8.
The microcomputer 4 constitutes a control unit.

  The nonvolatile memory 2 stores a program for operating the microcomputer 4 and a plurality of configuration data (hereinafter also referred to as circuit configuration data) 6 for configuring the circuit of the programmable logic 1.

Next, the operation of the first embodiment will be described with reference to FIG.
In the electrical device 30 configured as described above, when the microcomputer 4 is initialized, the microcomputer 4 selects and reads configuration data for communication processing from among a plurality of configuration data 6 stored in the nonvolatile memory 2. The circuit of the programmable logic 1 is configured as a communication processing circuit by transferring configuration data 6 for communication processing from the microcomputer 4 to the programmable logic 1. (Step S1 in Fig. 2)

  Next, the microcomputer 4 tries to communicate with another electrical device 30 via the programmable logic 1 and the communication line 8 (step S2 in FIG. 2). When there is a response to the transmitted data from the microcomputer 4 via the communication line 8 (NO in step S3 in FIG. 2), the microcomputer 4 performs normal processing (step S7 in FIG. 2). . On the other hand, when there is no response to data transmitted from the microcomputer 4 via the communication line 8 or when it is determined that there is no communication data on the communication line 8 for a certain period of time, it is considered that there is no communication partner. In the case of YES in step S3 of FIG. 2, the microcomputer 4 reads other configuration data from the nonvolatile memory 2 and switches the configuration data 6 configured in the programmable logic 1 to the other configuration data. The programmable logic 1 is reconfigured.

  That is, the microcomputer 4 reconfigures the programmable logic 1 by changing the configuration data 6 to another communication processing method (configuration A ′ (communication processing 2) in FIG. 1). (Step S4 in FIG. 2) Even in this case, when there is no response to the transmitted data from the microcomputer 4, or when it is determined that there is no communication data on the communication line 8 for a certain period, there is no communication partner. The configuration data 6 configured in the programmable logic 1 is further read out from the nonvolatile memory 2 and the configuration data 6 configured in the programmable logic 1 is switched to the other configuration data. Reconfigure logic 1. (Step S5 in FIG. 2)

  Note that the same processing is performed even when the communication analog circuit 7 is not mounted depending on the type of the electrical device 30, but in this case, the programmable logic 1 does not perform configuration for communication processing. The communication line 8 is drawn in a wired manner, but may be wireless communication.

  When the microcomputer 4 considers that there is no communication partner, the circuit performs display processing such as converting the encoded image into bitmap data for display on the display unit 9 as another configuration data 6 The configuration data is selected, read from the nonvolatile memory 2, and transferred to the programmable logic 1 to reconfigure the programmable logic 1 (step S6 in FIG. 2).

  According to the first embodiment, by configuring as described above, the configuration data 6 that is not necessary for the electrical device 30 is not used, and thus consumes resources of the programmable logic 1 for functions that are not used. The programmable logic 1 can be used effectively.

Embodiment 2. FIG.
The configuration of FIG. 1 is also used in this embodiment. FIG. 3 is a table for explaining the second embodiment of the present invention.
Next, the operation of the second embodiment will be described with reference to FIGS.
The microcomputer 4 operates in accordance with instructions from the external interface 3. The programmable logic 1 is configured to be able to communicate with other electrical devices 30 by executing configuration of communication processing, and the microcomputer 4 performs display processing or the like in the microcomputer in response to an instruction from the external interface 3. Perform arithmetic processing. At this time, the microcomputer 4 counts the number of display processing, arithmetic processing, encryption processing, and communication processing executed by the microcomputer 4 using a register (not shown) or the RAM 5 in accordance with an instruction from the external interface 3, and after a predetermined time has elapsed. The process with the largest number of processes is determined. FIG. 3 shows an example of the number of times of processing after a predetermined time has elapsed, the processing time required for each time, and the total processing time.

  In this example, the microcomputer 4 performs display processing, which is the processing content having the largest number of processing times, from a plurality of circuit configuration data for the programmable logic 1 configuration of the nonvolatile memory 2 from the graphs shown in FIGS. 3 and 4. The circuit of the programmable logic 1 is configured by selecting and reading, and transferring the selected circuit configuration data to the programmable logic 1. Thereafter, the microcomputer 4 performs processing using the circuit configured in the programmable logic 1 instead of software.

  In addition, even after configuring the circuit that executes the processing content having the highest number of processing times in the programmable logic 1, the microcomputer 4 accumulates the number of display processing, arithmetic processing, encryption processing, and communication processing, and after a certain period of time, The process with the highest number of processes is determined again. If the determined process is a function that is already configured in the programmable logic 1, the counter that counts the number of processes is reset and the count is restarted again. Otherwise, the normal operation is continued. If not, the programmable logic is reconfigured as logic for performing the corresponding processing, and then the counter for counting the number of times of each processing is reset to shift to the normal operation.

  This allows the programmable logic 1 to execute a function that is frequently used among the processes conventionally performed by the microcomputer 4, thereby reducing the processing load on the microcomputer 4 and not using the software. Since it can be processed by a logic circuit, it can be processed at high speed. In addition, since the programmable logic 1 does not simultaneously configure the functions of the display circuit, the arithmetic circuit, the cryptographic process, and the communication process as a circuit, only one of the functions can be mounted on the programmable logic 1. Become. Therefore, the circuit scale that can be mounted on the programmable logic 1 can be reduced, and the small and inexpensive programmable logic 1 can be mounted.

  Note that immediately after initialization, the microcomputer 4 executes all of display processing, arithmetic processing, encryption processing, and communication processing by software of the microcomputer 4, and after a certain period of time has passed, after determining a high frequency processing, the programmable logic 1 is configured, a default circuit configuration may be set immediately after initialization, and the default circuit may be configured in the programmable logic 1 immediately after initialization.

Embodiment 3 FIG.
In the second embodiment, the display process, the arithmetic process, the encryption process, and the communication process are determined based on the number of each process, but may be determined based on each process time.
The configuration of FIG. 1 and the table of FIG. 3 are also used in this embodiment.
Next, the operation of this embodiment will be described with reference to FIGS.
As shown in FIG. 3, for example, when the encryption processing time is 500 ms per time and the display processing time is 30 ms per time, the microcomputer 4 multiplies each processing time and the number of times at regular time intervals. Then, each processing time at a predetermined time interval is obtained, and the processing with the longer processing time is configured in the programmable logic 1. In this case, the cumulative processing time of the arithmetic processing calculated by the microcomputer 4 is 10 times × 1 ms = 10 ms, the cumulative processing time of the cryptographic processing is 5 times × 500 ms = 2500 ms, the cumulative processing time of the display processing is 80 times × 30 ms = 2400 ms, The accumulated processing time of communication processing is 60 times × 10 ms = 600 ms. That is, as shown in the accumulated processing time in FIG. The microcomputer 4 selects the cryptographic process having the longest cumulative processing time from the cumulative processing time shown in FIG. 3 and FIG. 5 which is a graph of the cumulative processing time, and selects the cryptographic processing for the cryptographic processing from the plurality of circuit configuration data in the nonvolatile memory 2. The circuit configuration data is read out and transferred to the programmable logic 1, and an encryption processing circuit is configured in the programmable logic 1.

  According to this embodiment, the above configuration produces the same effects as those of the first and second embodiments.

Embodiment 4 FIG.
In the second embodiment and the third embodiment, the circuit to be configured in the programmable logic 1 is determined at regular time intervals. However, the number of times of each process is simply counted, and any of the processes is equal to or more than a certain number of times. The processing circuit may be configured in the programmable logic 1 when reaching the above.
The configuration of FIG. 1 and the table of FIG. 3 are also used in this embodiment.
Next, the operation of this embodiment will be described with reference to FIGS.
As shown in FIG. 3, for example, the number of processing times of arithmetic processing is 10, the number of processing times of cryptographic processing is 5, the number of processing times of display processing is 80 times, and the number of processing times of communication processing is 60 times. The microcomputer 4 selects the display process with the largest number of processes from FIG. 4, which is a graph of the number of processes shown in FIG. 3, and selects circuit configuration data for display processing from among a plurality of circuit configuration data in the nonvolatile memory 2. The data is read and transferred to the programmable logic 1, and a display processing circuit is configured in the programmable logic 1.

  According to this embodiment, the above configuration produces the same effects as those of the first and second embodiments.

Embodiment 5. FIG.
In this embodiment, different image processing circuits may be configured in the programmable logic depending on the content of data acquired by communication with the external electrical device 30.
The configuration of FIG. 1 is also used in this embodiment. The external interface 3 is a communication interface that communicates with other electrical devices 30.
Next, the operation of this embodiment will be described with reference to FIG.
In this embodiment, the contents of data acquired by communication with an external electrical device 30 as circuit configuration data, “still image processing circuit configuration data”, “moving image data” are stored in advance in the nonvolatile memory 2. It is assumed that a plurality of circuit configuration data such as “image processing circuit configuration data” and “encrypted image processing circuit configuration data” are stored.
The microcomputer 4 performs communication processing with the external electrical device 30 via the external interface 3. At this time, the microcomputer 4 classifies the content of the data acquired by the communication processing into the data related to the still image, the data related to the moving image, the data related to the encryption processing, and the other data, and counts the number of times of each processing. After the elapse of time, the process with the largest number of processes is determined. Based on the determination result, the data for configuring the programmable logic 1 is switched to “still image processing circuit”, “moving image processing circuit”, or “encryption image processing circuit”. The method for configuring the programmable logic 1 is the same as in the first embodiment.

  According to this embodiment, by configuring as described above, in addition to the effects of the first embodiment and the second embodiment, the electric device itself automatically transmits frequently used data from the external device without intervention of a person. Since it is acquired and displayed in this manner, the user's load can be reduced.

Embodiment 6 FIG.
Different circuits may be configured in the programmable logic depending on the type of buttons or touch panels operated by the user. This embodiment will be described in this embodiment.
The configuration of FIG. 1 is also used in this embodiment. The external interface 3 is an interface operated by a user such as a button or a touch panel.
Next, the operation of this embodiment will be described with reference to FIG.
In this embodiment, in the nonvolatile memory 2 in advance, the contents of data acquired by communication with the external electric device 30 as circuit configuration data, “music output processing circuit configuration data”, “image display processing circuit” It is assumed that a plurality of circuit configuration data such as “configuration data” is stored.
The microcomputer 4 checks the frequency of the content specified by the user's operation through the external interface 3 such as a button or a touch panel, and selects the highest frequency from among “music output processing” and “image display processing”. In the same manner as in the first embodiment, a processing circuit corresponding to the programmable logic 1 is configured. As a result, the processing load can be reduced as compared with the software processing by the microcomputer 4, and high sound quality without occurrence of sound quality deterioration and image deterioration due to failure to follow by software processing by using a dedicated circuit configured in programmable logic. Music and high-definition image processing can be realized.

Embodiment 7 FIG.
You may make it control the power consumption of the electric equipment 30 whole. This embodiment will be described in this embodiment.
The configuration of FIG. 1 is also used in this embodiment. A power consumption measuring circuit (not shown) is provided outside and measures the power consumption of the entire electric device 30. The power consumption measuring circuit may be a wattmeter, or the power consumption is converted by assuming that the voltage of the power supply is constant by measuring the voltage at both ends thereof using a resistor or the like that measures the current of the commercial AC power supply. Alternatively, after rectifying the commercial AC power supply to direct current, the direct current flowing in the voltage dividing circuit may be measured using a current measuring element such as CT to convert the power consumption. .
The external interface 3 receives power consumption data measured by a power consumption measurement circuit provided outside as command information and transmits it to the microcomputer 4.
Next, the operation of this embodiment will be described with reference to FIG.
In this embodiment, it is assumed that circuit configuration data for processing with low processing speed and low power consumption is stored in advance in the nonvolatile memory 2.
The microcomputer 4 periodically inputs the power consumption of the electric device 30 through the external interface 3 at a constant cycle, observes the time transition of the power consumption of the electric device 30, and if the power consumption exceeds a certain power consumption, In order to keep the power low, the processing speed is low from the non-volatile memory 2 and the processing circuit configuration data for low power consumption is read out and transferred to the programmable logic 1 so that the programmable logic 1 can be transferred to a circuit with a low processing speed. Constitute.

  According to this embodiment, reconfiguration as described above makes it possible to reduce power consumption although the processing speed is reduced.

Embodiment 8 FIG.
The content processed at a regularly determined time may be configured to be automatically processed by the electric device itself. This embodiment will be described in this embodiment.
The configuration of FIG. 1 is also used in this embodiment.
Next, the operation of this embodiment will be described with reference to FIG.
The microcomputer 4 records the processed content in the RAM 5 together with the time when the processing is performed, for example, every day. The microcomputer 4 records the data in the RAM 5 for a certain period (for example, one week), and determines the content recorded in the RAM 5. When it is determined that a predetermined process is performed at substantially the same time, the microcomputer 4 transmits the configuration data of the logic circuit that performs the process to the programmable logic 1 before the process is executed. And construct a logic circuit. When the predetermined time comes, the logic circuit built in the programmable logic 1 is executed by a command from the microcomputer 4. Thereby, even if it is a low frequency process, if it is the content processed at the fixed time, it can process at high speed.

Embodiment 9 FIG.
When another process β is always executed when a certain process α is executed, the electric device itself may automatically process the process β when the process α is executed. This embodiment will be described in this embodiment.
The configuration of FIG. 1 is also used in this embodiment.
Next, the operation of this embodiment will be described with reference to FIG.
The microcomputer 4 records the processed content in the RAM 5 together with the time when the processing is performed, for example, every day. The microcomputer 4 records the data in the RAM 5 for a certain period (for example, one week), and determines the content recorded in the RAM 5. Then, if it is found that there is a fixed processing procedure such that the cryptographic process B is always executed after the cryptographic process A is executed, the microcomputer 4 executes the cryptographic process B after the cryptographic process A is executed. The configuration data of the logic circuit to be executed is transferred to the programmable logic 1 to construct the logic circuit. Then, when it is time to execute the encryption process A, the logic circuit constructed in the programmable logic 1 is executed by a command from the microcomputer 4. Thereby, since a logic circuit can be configured in advance for continuous processing, it is possible to perform continuous processing at high speed.

Embodiment 10 FIG.
Here, the form at the time of using two types of programmable logic from which operation speed differs is demonstrated.
FIG. 6 is a configuration diagram of an electrical apparatus showing the embodiment of the present invention.
Next, the operation of this embodiment will be described with reference to FIG.
As shown in FIG. 6, it consists of two programmable logics, one is programmable logic that can operate with a relatively faster clock (eg, 800 MHz clock) and the other is a relatively slower clock (eg, 80 MHz). It is programmable logic that operates in As described in the second embodiment, a microcomputer performs statistical processing, determines a processing whose frequency is higher than a predetermined value, and performs this processing with a clock faster than the predetermined value in the same procedure as in the first embodiment. The programmable logic is configured to operate, and the processing having a frequency lower than a predetermined value is configured to be a programmable logic that operates with a clock slower than the predetermined value in the same procedure as in the first embodiment.
As a result, relatively frequent processing is performed at a higher speed, so that the processing speed of the entire system can be made higher than when the above processing is not performed.

Embodiment 11 FIG.
Here, the form at the time of using two types of programmable logic from which operation speed differs is demonstrated.
FIG. 7 is a configuration diagram of an electric device showing the embodiment of the present invention.
As shown in FIG. 7, the electric device 30 includes an external interface 3, a nonvolatile memory 2, a programmable logic 1, and a microcomputer 4, and a plurality of codes for executing processing by the microcomputer 4 are stored in the nonvolatile memory 2. Has been.
Here, the code means a series of program source codes having one processing function. For example, a code for performing communication processing is a communication processing code, a code for performing display processing is a display processing code, and an arithmetic processing. The code that performs is called an operation processing code.
Next, the operation of this embodiment will be described with reference to FIG.
When the microcomputer 4 receives command information from an external electrical device through communication in the same manner as in the first embodiment, or receives command information via the external interface 3 such as a button or a switch by a user operation, the external interface Processing (display processing, calculation processing, etc.) according to the command from 3 is performed. At this time, the microcomputer 4 counts the number of display processing, arithmetic processing, encryption processing, and communication processing executed by the microcomputer 4 using a register (not shown) or the RAM 5 in accordance with an instruction from the external interface 3, and after a predetermined time has elapsed. The process with the largest number of processes is determined. Next, the microcomputer 4 selects, from among a plurality of circuit configuration data for the programmable logic 1 configuration of the non-volatile memory 2, the processing content having the highest number of processings, for example, the display processing code that is the program source code for the display processing. Then, the code is compiled (placed and routed), converted into an object code for configuring the programmable logic 1 circuit, and the data is stored in the RAM 5. Next, the microcomputer 4 configures a logic circuit that performs processing corresponding to the command information in the programmable logic 1 by transferring the object code stored in the RAM 5 to the programmable logic 1.

Next, the above operation will be described in more detail.
FIG. 8 is a configuration diagram showing a detailed configuration of an electric apparatus according to Embodiment 11 of the present invention.
As shown in FIG. 8, when the application of the microcomputer 4 receives a command from the outside via the external interface 3, it performs processing in the application based on this command, and then classifies according to the processing content, The number of executions and processing time are accumulated for each processing content. Then, after a certain time elapses, the application of the microcomputer 4 performs statistical processing based on the cumulative number of executions and the cumulative processing time for each processing content. As a result, for example, “calculation processing 2” is the processing with the highest processing count. Is identified. Next, the microcomputer 4 executes a program (for example, a program source code written in reverse Polish notation) stored in the nonvolatile memory 2 and translated by the interpreter. For example, when the microcomputer 4 is executing the “arithmetic process 1” and the external interface 3 designates the “arithmetic process 2” to be executed by the programmable logic 1, the application of the microcomputer 4 uses the application interface. The program source code of “arithmetic processing 2” is selected from a plurality of codes in the nonvolatile memory 2 and the program source code of “arithmetic processing 2” is compiled using the application program. Process 2 ”(object code) is stored in the RAM 5.

When compiling with the microcomputer 4, the microcomputer 4 combines the memory access function code for accessing the programmable logic 1 and adds restrictions at the time of compilation (pin assignment, pin input / output, etc.). And compile.
The microcomputer 4 stores the compiled “arithmetic processing 2” in the RAM 5, and then transfers it to the programmable logic 1 to configure the logic circuit of the arithmetic processing 2 in the programmable logic 1.

  When executing the arithmetic processing 2, the microcomputer 4 accesses the programmable logic 1 in which the logic circuit of the arithmetic processing 2 is constructed via a logic access driver that is a program in the microcomputer 4. The logic access driver is a driver that can be used in common for “arithmetic processing 1” to “arithmetic processing 3”, and exchanges data to be arithmetically processed via the dual port memory configured in the programmable logic 1.

  By doing in this way, there is an effect that it is not necessary to hold two kinds of code for executing by the microcomputer and data for configuring the FPGA. Also, depending on the compile option of the microcomputer 4, "increase the internal circuit of the programmable logic and operate the circuit at high speed" and conversely, reduce the internal circuit of the programmable logic and operate the circuit at low speed. There is an effect that a compile option such as “suppressing power consumption” can be freely changed by an instruction from the external interface 3.

Embodiment 12 FIG.
In the eleventh embodiment, the processing executed by the microcomputer 4 is counted, the code with the highest processing frequency is selected, compiled, and transferred to the programmable logic 1, so that the code with the highest processing frequency is transferred to the programmable logic 1. The processing executed by the microcomputer 4 is counted by the input from the external interface 3, the code having the longest processing time is selected, compiled, and transferred to the programmable logic 1, so that the processing time can be reduced. The longest code may be executed by the programmable logic 1.
Also in this case, the same effect as in the eleventh embodiment is obtained.

Embodiment 13 FIG.
In the eleventh embodiment, one of the plurality of codes stored in the non-volatile memory 2 is selected, and this code is compiled (placed and routed) by the microcomputer 4, but the plurality of codes are selected simultaneously. Obviously, it may be compiled.
As a result, the electrical device 30 can select an arbitrary code from a plurality of compiled codes, build a logic circuit into programmable logic, and execute it, and can flexibly respond to commands from the external interface. is there.

Embodiment 14 FIG.
When the microcomputer 4 periodically executes a program for diagnosing a code and finds that any of the plurality of codes stored in the non-volatile memory 2 is defective (data corruption, data corruption, etc.) When compiling a plurality of codes, the code of the function having a defect is removed and then converted into an object code to change the configuration of the programmable logic 1.
Thereby, the electric device 30 can realize a high-speed operation without any trouble while maintaining a certain function.

BRIEF DESCRIPTION OF THE DRAWINGS It is a block diagram of the electric equipment of this invention, and Embodiments 1-9 are shown. It is a flowchart of Embodiment 1 of this invention. It is a table | surface for demonstrating Embodiment 2-4 of this invention. It is a graph for demonstrating Embodiment 2-4 of this invention. It is a graph for demonstrating Embodiment 2-4 of this invention. It is a block diagram of the electric equipment which shows Embodiment 10 of this invention. It is a block diagram of the electric equipment which shows Embodiment 11-14 of this invention. It is detail drawing of the electric equipment which shows Embodiment 11-14 of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 Programmable logic, 2 Non-volatile memory, 3 External interface, 4 Microcomputer, 5 RAM, 6 Configuration data, 7 Communication analog circuit, 8 Communication line, 9 Display, 10 High-speed programmable logic, 11 Low-speed programmable logic, 30 Electrical equipment .

Claims (3)

External interface for inputting command information from the outside, nonvolatile memory for storing a plurality of circuit configuration data, programmable logic for constructing a circuit based on the circuit configuration data, the external interface, the nonvolatile memory, and the programmable logic In an electrical device comprising a control unit for controlling
The control unit records and accumulates the processed content in the nonvolatile memory every predetermined time, and is always processed next when the first process is executed based on the content stored in the nonvolatile memory. An electrical apparatus characterized by changing a configuration of the programmable logic based on configuration data of the second processing content after estimating the second processing and executing the first processing. External interface for inputting command information from the outside, nonvolatile memory for storing a plurality of circuit configuration data, programmable logic for constructing a circuit based on the circuit configuration data, the external interface, the nonvolatile memory, and the programmable logic In an electrical device comprising a control unit for controlling
The control unit records and accumulates the processed content in the nonvolatile memory every predetermined time, and estimates the content to be processed at a predetermined time based on the content stored in the nonvolatile memory, Before the time arrives, the configuration of the programmable logic is changed based on the configuration data of the estimated processing content. External interface for inputting command information from the outside, nonvolatile memory for storing a plurality of circuit configuration data, programmable logic for constructing a circuit based on the circuit configuration data, the external interface, the nonvolatile memory, and the programmable logic In an electrical device comprising a control unit for controlling
The external interface inputs power consumption measured by a power consumption measurement circuit provided outside as command information from the outside,
The control unit statistically processes the power consumption input from the outside by the external interface at a predetermined time interval, selects circuit configuration data such that the power consumption is within a predetermined value, and selects the circuit configuration data as the circuit configuration data. An electric device characterized in that the configuration of the programmable logic is changed on the basis thereof.

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