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AU2001290508A1 - Accelerated montgomery exponentiation using plural multipliers - Google Patents

Accelerated montgomery exponentiation using plural multipliers

Info

Publication number
AU2001290508A1
AU2001290508A1 AU2001290508A AU9050801A AU2001290508A1 AU 2001290508 A1 AU2001290508 A1 AU 2001290508A1 AU 2001290508 A AU2001290508 A AU 2001290508A AU 9050801 A AU9050801 A AU 9050801A AU 2001290508 A1 AU2001290508 A1 AU 2001290508A1
Authority
AU
Australia
Prior art keywords
accelerated
plural multipliers
montgomery exponentiation
exponentiation
montgomery
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001290508A
Inventor
David Blaker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NetOctave Inc
Original Assignee
NetOctave Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NetOctave Inc filed Critical NetOctave Inc
Publication of AU2001290508A1 publication Critical patent/AU2001290508A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/10—Protecting distributed programs or content, e.g. vending or licensing of copyrighted material ; Digital rights management [DRM]
    • G06F21/12—Protecting executable software
    • G06F21/121—Restricting unauthorised execution of programs
    • G06F21/123—Restricting unauthorised execution of programs by using dedicated hardware, e.g. dongles, smart cards, cryptographic processors, global positioning systems [GPS] devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/72—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/728—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic using Montgomery reduction
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0861—Generation of secret information including derivation or calculation of cryptographic keys or passwords
    • H04L9/0877—Generation of secret information including derivation or calculation of cryptographic keys or passwords using additional device, e.g. trusted platform module [TPM], smartcard, USB or hardware security module [HSM]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12—Details relating to cryptographic hardware or logic circuitry
    • H04L2209/125—Parallelization or pipelining, e.g. for accelerating processing of cryptographic operations

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Physics (AREA)
  • Mathematical Optimization (AREA)
  • Computational Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Technology Law (AREA)
  • Computing Systems (AREA)
  • Multimedia (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Complex Calculations (AREA)
  • Advance Control (AREA)
  • Image Generation (AREA)
AU2001290508A 2000-05-11 2001-05-07 Accelerated montgomery exponentiation using plural multipliers Abandoned AU2001290508A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US20340900P 2000-05-11 2000-05-11
US60203409 2000-05-11
PCT/US2001/014561 WO2001093012A2 (en) 2000-05-11 2001-05-07 Accelerated montgomery exponentiation using plural multipliers

Publications (1)

Publication Number Publication Date
AU2001290508A1 true AU2001290508A1 (en) 2001-12-11

Family

ID=22753864

Family Applications (2)

Application Number Title Priority Date Filing Date
AU2001286382A Abandoned AU2001286382A1 (en) 2000-05-11 2001-05-07 Accelerated montgomery multiplication using plural multipliers
AU2001290508A Abandoned AU2001290508A1 (en) 2000-05-11 2001-05-07 Accelerated montgomery exponentiation using plural multipliers

Family Applications Before (1)

Application Number Title Priority Date Filing Date
AU2001286382A Abandoned AU2001286382A1 (en) 2000-05-11 2001-05-07 Accelerated montgomery multiplication using plural multipliers

Country Status (4)

Country Link
US (4) US6691143B2 (en)
EP (1) EP1405170A2 (en)
AU (2) AU2001286382A1 (en)
WO (2) WO2001088692A2 (en)

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Also Published As

Publication number Publication date
WO2001088692A3 (en) 2002-04-18
WO2001088692A2 (en) 2001-11-22
US20020013799A1 (en) 2002-01-31
US20020010730A1 (en) 2002-01-24
AU2001286382A1 (en) 2001-11-26
WO2001093012A2 (en) 2001-12-06
US6820105B2 (en) 2004-11-16
WO2001093012A3 (en) 2002-04-25
US20020004904A1 (en) 2002-01-10
US6691143B2 (en) 2004-02-10
US20010042210A1 (en) 2001-11-15
EP1405170A2 (en) 2004-04-07

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