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Asgharzadeh et al., 2024 - Google Patents

Hardware cache locking for all memory updates

Asgharzadeh et al., 2024

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Document ID
3495486412660393512
Author
Asgharzadeh A
Gómez-Hernández E
Cebrian J
Kaxiras S
Ros A
Publication year
Publication venue
2024 IEEE 42nd International Conference on Computer Design (ICCD)

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Snippet

Many applications need to perform operations that involve reading a value from memory, modifying it, and then writing it back. Multiple architectures provide hardware support for these operations via read-modify-write (RMW) instructions. The primary benefit is that the …
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Classifications

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    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
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