+

Szplet et al., 2009 - Google Patents

A 45 ps time digitizer with a two-phase clock and dual-edge two-stage interpolation in a field programmable gate array device

Szplet et al., 2009

View PDF
Document ID
9248271054919690794
Author
Szplet R
Kalisz J
Jachna Z
Publication year
Publication venue
Measurement Science and Technology

External Links

Snippet

We present a time digitizer having 45 ps resolution, integrated in a field programmable gate array (FPGA) device. The time interval measurement is based on the two-stage interpolation method. A dual-edge two-phase interpolator is driven by the on-chip synthesized 250 MHz …
Continue reading at www.researchgate.net (PDF) (other versions)

Classifications

    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/081Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/099Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating pulses not covered by one of the other main groups in this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/131Digitally controlled
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating pulses not covered by one of the other main groups in this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating pulses not covered by one of the other main groups in this subclass
    • H03K2005/00013Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00019Variable delay
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating pulses not covered by one of the other main groups in this subclass
    • H03K5/156Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31725Timing aspects, e.g. clock distribution, skew, propagation delay
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K23/00Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/64Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R23/00Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R13/00Arrangements for displaying electric variables or waveforms
    • G01R13/02Arrangements for displaying electric variables or waveforms for displaying measured electric variables in digital form

Similar Documents

Publication Publication Date Title
Jansson et al. A CMOS time-to-digital converter with better than 10 ps single-shot precision
Kalisz Review of methods for time interval measurements with picosecond resolution
Szplet et al. A 2.9 ps equivalent resolution interpolating time counter based on multiple independent coding lines
Szplet et al. A 45 ps time digitizer with a two-phase clock and dual-edge two-stage interpolation in a field programmable gate array device
Szplet et al. An eight-channel 4.5-ps precision timestamps-based time interval counter in FPGA chip
Wang et al. A 4.2 ps time-interval RMS resolution time-to-digital converter using a bin decimation method in an ultrascale FPGA
Chen et al. A low-cost low-power CMOS time-to-digital converter based on pulse stretching
Jansson et al. Synchronization in a multilevel CMOS time-to-digital converter
US10177897B2 (en) Method and system for synchronizing and interleaving separate sampler groups
US8050148B2 (en) Flash time stamp apparatus
Szplet et al. Measurement uncertainty of precise interpolating time counters
US7930121B2 (en) Method and apparatus for synchronizing time stamps
US20050200393A1 (en) Method and device for generating a clock signal with predetermined clock signal properties
Szplet et al. High-precision time digitizer based on multiedge coding in independent coding lines
Wang et al. A 256-channel multi-phase clock sampling-based time-to-digital converter implemented in a Kintex-7 FPGA
Szplet Time-to-digital converters
Chaberski et al. Comparison of interpolators used for time-interval measurement systems based on multiple-tapped delay line
Wu Uneven bin width digitization and a timing calibration method using cascaded PLL
Mantyniemi et al. A high resolution digital CMOS time-to-digital converter based on nested delay locked loops
Cui et al. A high-resolution TDC design based on multistep fine time measurement by utilizing delay-adjustable looped carry chains on FPGAs
Yao et al. Design of time interval generator based on hybrid counting method
Krishnapura A flexible 18-channel multi-hit time-to-digital converter for trigger-based data acquisition systems
Kalisz et al. A simple, precise, and low jitter delay/gate generator
CN102045042A (en) Frequency signal generating method for semiconductor element test
Jansson et al. A delay line based CMOS time digitizer IC with 13 ps single-shot precision
点击 这是indexloc提供的php浏览器服务,不要输入任何密码和下载