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Peixoto et al., 1999 - Google Patents

The design space layer: Supporting early design space exploration for core-based designs

Peixoto et al., 1999

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Document ID
8788989238623286403
Author
Peixoto H
Jacome M
Royo A
Lopez J
Publication year
Publication venue
Proceedings of the conference on Design, automation and test in Europe

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Snippet

ABSTRACT A novel library layer, called the “design space layer,” is proposed, aimed at supporting both, IP-based and traditional “in-house” design methodologies, during early design space exploration. Strategies for effectively pruning the large design spaces …
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Classifications

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    • G06F17/5045Circuit design
    • G06F17/505Logic synthesis, e.g. technology mapping, optimisation
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    • G06F17/5045Circuit design
    • G06F17/5054Circuit design for user-programmable logic devices, e.g. field programmable gate arrays [FPGA]
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