Ubal et al., 2007 - Google Patents
Multi2sim: A simulation framework to evaluate multicore-multithreaded processorsUbal et al., 2007
View PDF- Document ID
- 7905456487829908758
- Author
- Ubal R
- Sahuquillo J
- Petit S
- Lopez P
- Publication year
- Publication venue
- 19th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'07)
External Links
Snippet
Current microprocessors are based in complex designs, integrating different components on a single chip, such as hardware threads, processor cores, memory hierarchy or interconnection networks. The permanent need of evaluating new designs on each of these …
- 238000004088 simulation 0 title abstract description 39
Classifications
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- G06F9/30—Arrangements for executing machine-instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
- G06F9/3889—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
- G06F9/3891—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute organised in groups of units sharing resources, e.g. clusters
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