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1. SynapseCache SynapseCache Public

   Design, implement, and verify a direct-mapped and set-associative cache subsystem for an existing RISC-V pipeline—boosting performance through reduced memory-access latency.

   Python 2

2. learn-git-hub learn-git-hub Public

   learning how to use git and github

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3. SynapseArty SynapseArty Public

   Synapse32 is a 5 stage pipelined RISC-V CPU

   Verilog

4. synapse32 synapse32 Public

   Forked from SRA-VJTI/synapse32

   An inhouse RISC-V 32-bits CPU

   Python