What's Changed

• [ESI][Cosim][Verilator] Switch to FST and dump time by @teqdruid in #9031
• Add a diagnostic for unsupported system calls with more than 1 argument by @likeamahoney in #9014
• [circt-verilog-lsp] Add support for -C command files for Slang, project-wide defintion lookup by @Scheremo in #9003
• [comb-to-synth] Implement Sklanskey Tree and Architecture Selection based on Attribute by @cowardsa in #9021
• fix: prevent canonicalize looping for extremely long time by @tianrui-wei in #9030
• [ESI][Cosim] Always use posix paths for questa by @mortbopet in #9035
• [ESI][Cosim] Add windows-equivalent for os.setsid by @mortbopet in #9034
• [ci] Set individual integration test timeout to 2m by @seldridge in #9039
• [ESI] Install CosimBackend.dll dependencies on windows by @mortbopet in #9037
• [FIRRTL] Update more symbol-sensitive ops after dedup by @fabianschuiki in #9016
• [ESI][Cosim] Switch to GUI mode via environment variable by @teqdruid in #9041
• [ESI][Cosim] Enable SAVE_WAVE functionality in SV driver by @teqdruid in #9042
• fix: guard eaglerinliner with detecting a valid circuit by @tianrui-wei in #9025
• [Datapath] Add initial delay optimisation pass by @cowardsa in #9038
• [SV] Support expressions as case patterns by @chiahsuantw in #9018
• [FIRRTL] Gate class deduplication behind an option by @fabianschuiki in #9040
• [CombToSynth] Use parallel-prefix tree for unsigned comparisons by @uenoku in #9048
• [Comb][circt-synth] Implement BalanceMux pass for optimizing mux chains by @uenoku in #9044

New Contributors

• @tianrui-wei made their first contribution in #9030

Full Changelog: firtool-1.132.0...firtool-1.133.0