Pinned Loading

1. RISC-V-CPU RISC-V-CPU Public

   A RISC-V 5-stage pipelined CPU that supports vector instructions. Tape-out with U18 technology.

   Verilog 131 28

2. A-Single-Path-Delay-32-Point-FFT-Processor A-Single-Path-Delay-32-Point-FFT-Processor Public

   A 32-point pipelined Fast Fourier transform processor, using single path delay architecture, and based on radix2-DIF(decimation-in-frequency) algorithm. The average SNR = 58.76.

   Verilog 49 13

3. Systolic-Array-for-Smith-Waterman Systolic-Array-for-Smith-Waterman Public

   This work implements a dynamic programming algorithm for performing local sequence alignment. Through parallelism, it can run 136X times faster than a software running the same algorithm.

   Verilog 26 8

4. GCN-Inference-Acceleration-HLS GCN-Inference-Acceleration-HLS Public

   An end-to-end GCN inference accelerator written in HLS

   C++ 19 4

5. microsoft/apex_plus microsoft/apex_plus Public

   APEX+ is an LLM Serving Simulator

   Python 14 3