+
Skip to content
View fengche1101's full-sized avatar

Block or report fengche1101

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. UniPlug-FPGA UniPlug-FPGA Public

    Forked from WangXuan95/UniPlug-FPGA

    一个FPGA核心板设计,体积小、低成本、易用、扩展性强。

    Verilog

  2. TinyPNG-kmeans TinyPNG-kmeans Public

    Forked from WangXuan95/TinyPNG-kmeans

    一个针对 PNG 图像文件的有损压缩器,使用 Kmeans 把色彩空间量化压缩到256以下,从而利用 PNG 格式的调色板模式 (Palette) 来缩小文件大小。效果好于 https://tinypng.com

    Python

  3. Xilinx-FPGA-PCIe-XDMA-Tutorial Xilinx-FPGA-PCIe-XDMA-Tutorial Public

    Forked from WangXuan95/Xilinx-FPGA-PCIe-XDMA-Tutorial

    Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核

    Batchfile

  4. FPGA-SATA-HBA FPGA-SATA-HBA Public

    Forked from WangXuan95/FPGA-SATA-HBA

    A SATA host (HBA) core based on Xilinx FPGA with GTH to read/write hard disk. 一个基于Xilinx FPGA中的GTH的SATA host控制器,用来读写硬盘。

    SystemVerilog

  5. USTC-RVSoC USTC-RVSoC Public

    Forked from WangXuan95/USTC-RVSoC

    An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V SoC,包含一个RV32I CPU、一个简单可扩展的总线、一些外设。

    SystemVerilog

  6. FPGA-RMII-SMII FPGA-RMII-SMII Public

    Forked from WangXuan95/FPGA-RMII-SMII

    An FPGA-based MII to RMII & SMII converter to connect 100M ethernet PHY chip such as LAN8720 or KSZ8041TLI-S. 基于FPGA的MII转RMII和MII转SMII,用来连接LAN8720、KSZ8041TLI-S等百兆以太网PHY芯片。

    Verilog

点击 这是indexloc提供的php浏览器服务,不要输入任何密码和下载