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    • Architectural cache side channel fuzzer from the research paper "ExfilState: Automated Discovery of Timer-Free Cache Side Channels on ARM CPUs".
      C
      0200Updated Oct 14, 2025Oct 14, 2025
    • RISCover

      Public
      Differential CPU fuzzing framework from the paper "RISCover: Automatic Discovery of User-exploitable Architectural Security Vulnerabilities in Closed-Source RISC-V CPUs".
      Python
      0400Updated Oct 12, 2025Oct 12, 2025
    • Artifact for the paper "RISCover: Automatic Discovery of User-exploitable Architectural Security Vulnerabilities in Closed-Source RISC-V CPUs".
      Verilog
      0100Updated Oct 12, 2025Oct 12, 2025
    • Artifact for the paper "ExfilState: Automated Discovery of Timer-Free Cache Side Channels on ARM CPUs".
      C
      0000Updated Oct 12, 2025Oct 12, 2025
    • StyleMail

      Public
      CSS
      0100Updated Sep 26, 2025Sep 26, 2025
    • Code for our 2025 ACM CCS Paper "Head(er)s Up! Detecting Security Header Inconsistencies in Browsers"
      Python
      0200Updated Sep 16, 2025Sep 16, 2025
    • Proof-of-concept implementation for the paper "Hammulator: Simulate Now - Exploit Later" (DRAMSec 2023)
      C
      21700Updated Sep 15, 2025Sep 15, 2025
    • scase

      Public
      Automated Framework for recovering Secrets from Side-Channel Traces. (USENIX Security '25)
      C
      11100Updated Aug 12, 2025Aug 12, 2025
    • C
      0000Updated Aug 7, 2025Aug 7, 2025
    • C
      0400Updated Jul 4, 2025Jul 4, 2025
    • IaC for Proxmox VE clusters.
      Python
      175100Updated Jun 5, 2025Jun 5, 2025
    • osiris

      Public
      Proof-of-concept implementation for the paper "Osiris: Automated Discovery of Microarchitectural Side Channels" (USENIX Security'21)
      C++
      156000Updated Jun 4, 2025Jun 4, 2025
    • cva6

      Public
      The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
      Assembly
      838000Updated May 19, 2025May 19, 2025
    • C
      21200Updated May 15, 2025May 15, 2025
    • MAPAlloc

      Public
      C
      1200Updated Apr 22, 2025Apr 22, 2025
    • C
      11000Updated Apr 1, 2025Apr 1, 2025
    • WebREC

      Public
      This repository provides the code is used in the Usenix paper "Web Execution Bundles: Reproducible, Accurate, and Archivable Web Measurements".
      Jupyter Notebook
      0100Updated Mar 26, 2025Mar 26, 2025
    • Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)
      C
      107310Updated Mar 18, 2025Mar 18, 2025
    • PortPrint

      Public
      Assembly
      0100Updated Feb 20, 2025Feb 20, 2025
    • HTML
      1200Updated Feb 17, 2025Feb 17, 2025
    • 0000Updated Feb 17, 2025Feb 17, 2025
    • Lixom

      Public
      C
      2400Updated Feb 13, 2025Feb 13, 2025
    • Code for our 2023 IEEE S&P Paper "The Leaky Web: Automated Discovery of Cross-Site Information Leaks in Browsers and the Web"
      Jupyter Notebook
      21400Updated Dec 12, 2024Dec 12, 2024
    • IRQGuard

      Public
      Framework to effectively immediately stop ongoing microarchitectural Attacks with low-overhead. (ACSAC '24)
      C
      21100Updated Dec 6, 2024Dec 6, 2024
    • Code for our 2024 IEEE S&P Paper "To Auth or Not To Auth? A Comparative Analysis of the Pre- and Post-Login Security Landscape"
      TypeScript
      41061Updated Sep 26, 2024Sep 26, 2024
    • Code for our 2024 ACM AsiaCCS Paper "Who's Breaking the Rules? Studying Conformance to the HTTP Specifications and its Security Impact"
      Python
      21630Updated Sep 26, 2024Sep 26, 2024
    • This repository contains the artifact for our paper "Cascading Spy Sheets: Exploiting the Complexity of Modern CSS for Email and Browser Fingerprinting" published at NDSS 2025.
      HTML
      22100Updated Sep 6, 2024Sep 6, 2024
    • CacheWarp

      Public
      Proof-of-concept implementation for the paper "CacheWarp: Software-based Fault Injection using Selective State Reset" (USENIX Security 2024)
      C
      36300Updated Aug 12, 2024Aug 12, 2024
    • Proof-of-concept for the GhostWrite CPU bug.
      C
      1711500Updated Aug 9, 2024Aug 9, 2024
    • Vivado 2023.2 project built around the CVA6 RISC-V CPU and a software stack including u-boot and embedded linux.
      Tcl
      0500Updated Jul 29, 2024Jul 29, 2024
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