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This research project aims to build an analytical model of on-chip memory accesses and on-chip data lifetimes when an AI workload is run onto a spatial, domain-specific accelerator.
UpdatedAug 11, 2025 -
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Anti-pattern-Detector Public
Forked from ise-uiuc/KNighterAutomatic checker synthesis for system-level static analysis
C++ Apache License 2.0 UpdatedJul 8, 2025 -
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Transformer Public
A handwritten Transformer framework for learning and research.
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CIFAR10-Image-Classification Public
Machine learning methods for image classification based on the CIFAR10 dataset
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